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6064 ixgbe needs X550 support
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--- old/usr/src/uts/common/io/ixgbe/ixgbe_stat.c
+++ new/usr/src/uts/common/io/ixgbe/ixgbe_stat.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
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19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 24 */
25 25
26 26 /*
27 27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 28 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
29 + * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
29 30 */
30 31
31 32 #include "ixgbe_sw.h"
32 33
33 34 /*
34 35 * Update driver private statistics.
35 36 */
36 37 static int
37 38 ixgbe_update_stats(kstat_t *ks, int rw)
38 39 {
39 40 ixgbe_t *ixgbe;
40 41 struct ixgbe_hw *hw;
41 42 ixgbe_stat_t *ixgbe_ks;
42 43 int i;
43 44
44 45 if (rw == KSTAT_WRITE)
45 46 return (EACCES);
46 47
47 48 ixgbe = (ixgbe_t *)ks->ks_private;
48 49 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
49 50 hw = &ixgbe->hw;
50 51
51 52 mutex_enter(&ixgbe->gen_lock);
52 53
53 54 /*
54 55 * Basic information
55 56 */
56 57 ixgbe_ks->link_speed.value.ui64 = ixgbe->link_speed;
57 58 ixgbe_ks->reset_count.value.ui64 = ixgbe->reset_count;
58 59 ixgbe_ks->lroc.value.ui64 = ixgbe->lro_pkt_count;
59 60
60 61 #ifdef IXGBE_DEBUG
61 62 ixgbe_ks->rx_frame_error.value.ui64 = 0;
62 63 ixgbe_ks->rx_cksum_error.value.ui64 = 0;
63 64 ixgbe_ks->rx_exceed_pkt.value.ui64 = 0;
64 65 for (i = 0; i < ixgbe->num_rx_rings; i++) {
65 66 ixgbe_ks->rx_frame_error.value.ui64 +=
66 67 ixgbe->rx_rings[i].stat_frame_error;
67 68 ixgbe_ks->rx_cksum_error.value.ui64 +=
68 69 ixgbe->rx_rings[i].stat_cksum_error;
69 70 ixgbe_ks->rx_exceed_pkt.value.ui64 +=
70 71 ixgbe->rx_rings[i].stat_exceed_pkt;
71 72 }
72 73
73 74 ixgbe_ks->tx_overload.value.ui64 = 0;
74 75 ixgbe_ks->tx_fail_no_tbd.value.ui64 = 0;
75 76 ixgbe_ks->tx_fail_no_tcb.value.ui64 = 0;
76 77 ixgbe_ks->tx_fail_dma_bind.value.ui64 = 0;
77 78 ixgbe_ks->tx_reschedule.value.ui64 = 0;
78 79 for (i = 0; i < ixgbe->num_tx_rings; i++) {
79 80 ixgbe_ks->tx_overload.value.ui64 +=
80 81 ixgbe->tx_rings[i].stat_overload;
81 82 ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
82 83 ixgbe->tx_rings[i].stat_fail_no_tbd;
83 84 ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
84 85 ixgbe->tx_rings[i].stat_fail_no_tcb;
85 86 ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
86 87 ixgbe->tx_rings[i].stat_fail_dma_bind;
87 88 ixgbe_ks->tx_reschedule.value.ui64 +=
88 89 ixgbe->tx_rings[i].stat_reschedule;
89 90 }
90 91 #endif
91 92
92 93 /*
93 94 * Hardware calculated statistics.
94 95 */
95 96 ixgbe_ks->gprc.value.ui64 = 0;
96 97 ixgbe_ks->gptc.value.ui64 = 0;
97 98 ixgbe_ks->tor.value.ui64 = 0;
98 99 ixgbe_ks->tot.value.ui64 = 0;
99 100 for (i = 0; i < 16; i++) {
100 101 ixgbe_ks->qprc[i].value.ui64 +=
101 102 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
102 103 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
103 104 ixgbe_ks->qptc[i].value.ui64 +=
104 105 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
105 106 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
106 107 ixgbe_ks->qbrc[i].value.ui64 +=
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107 108 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
108 109 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
109 110 switch (hw->mac.type) {
110 111 case ixgbe_mac_82598EB:
111 112 ixgbe_ks->qbtc[i].value.ui64 +=
112 113 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
113 114 break;
114 115
115 116 case ixgbe_mac_82599EB:
116 117 case ixgbe_mac_X540:
118 + case ixgbe_mac_X550:
119 + case ixgbe_mac_X550EM_x:
117 120 ixgbe_ks->qbtc[i].value.ui64 +=
118 121 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
119 122 ixgbe_ks->qbtc[i].value.ui64 +=
120 123 ((uint64_t)((IXGBE_READ_REG(hw,
121 124 IXGBE_QBTC_H(i))) & 0xF) << 32);
122 125 break;
123 126
124 127 default:
125 128 break;
126 129 }
127 130 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
128 131 }
129 132 /*
130 133 * This is a Workaround:
131 134 * Currently h/w GORCH, GOTCH, TORH registers are not
132 135 * correctly implemented. We found that the values in
133 136 * these registers are same as those in corresponding
134 137 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
135 138 * gor and got stat data will not be retrieved through
136 139 * GORC{H/L} and GOTC{H/L} registers but be obtained by
137 140 * simply assigning tor/tot stat data, so the gor/got
138 141 * stat data will not be accurate.
139 142 */
140 143 ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64;
141 144 ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64;
142 145
143 146 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
144 147 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
145 148 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
146 149 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
147 150 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
148 151 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
149 152 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
150 153 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
151 154 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
152 155 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
153 156 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
154 157 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
155 158
156 159 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
157 160 for (i = 0; i < 8; i++)
158 161 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
159 162 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
160 163 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
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161 164 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
162 165 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
163 166 switch (hw->mac.type) {
164 167 case ixgbe_mac_82598EB:
165 168 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
166 169 IXGBE_LXONRXC);
167 170 break;
168 171
169 172 case ixgbe_mac_82599EB:
170 173 case ixgbe_mac_X540:
174 + case ixgbe_mac_X550:
175 + case ixgbe_mac_X550EM_x:
171 176 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
172 177 IXGBE_LXONRXCNT);
173 178 break;
174 179
175 180 default:
176 181 break;
177 182 }
178 183 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
179 184 switch (hw->mac.type) {
180 185 case ixgbe_mac_82598EB:
181 186 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
182 187 IXGBE_LXOFFRXC);
183 188 break;
184 189
185 190 case ixgbe_mac_82599EB:
186 191 case ixgbe_mac_X540:
192 + case ixgbe_mac_X550:
193 + case ixgbe_mac_X550EM_x:
187 194 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
188 195 IXGBE_LXOFFRXCNT);
189 196 break;
190 197
191 198 default:
192 199 break;
193 200 }
194 201 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
195 202 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
196 203 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
197 204 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
198 205
199 206 mutex_exit(&ixgbe->gen_lock);
200 207
201 208 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
202 209 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
203 210
204 211 return (0);
205 212 }
206 213
207 214 /*
208 215 * Create and initialize the driver private statistics.
209 216 */
210 217 int
211 218 ixgbe_init_stats(ixgbe_t *ixgbe)
212 219 {
213 220 kstat_t *ks;
214 221 ixgbe_stat_t *ixgbe_ks;
215 222
216 223 /*
217 224 * Create and init kstat
218 225 */
219 226 ks = kstat_create(MODULE_NAME, ddi_get_instance(ixgbe->dip),
220 227 "statistics", "net", KSTAT_TYPE_NAMED,
221 228 sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0);
222 229
223 230 if (ks == NULL) {
224 231 ixgbe_error(ixgbe,
225 232 "Could not create kernel statistics");
226 233 return (IXGBE_FAILURE);
227 234 }
228 235
229 236 ixgbe->ixgbe_ks = ks;
230 237
231 238 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
232 239
233 240 /*
234 241 * Initialize all the statistics.
235 242 */
236 243 kstat_named_init(&ixgbe_ks->link_speed, "link_speed",
237 244 KSTAT_DATA_UINT64);
238 245 kstat_named_init(&ixgbe_ks->reset_count, "reset_count",
239 246 KSTAT_DATA_UINT64);
240 247
241 248 #ifdef IXGBE_DEBUG
242 249 kstat_named_init(&ixgbe_ks->rx_frame_error, "rx_frame_error",
243 250 KSTAT_DATA_UINT64);
244 251 kstat_named_init(&ixgbe_ks->rx_cksum_error, "rx_cksum_error",
245 252 KSTAT_DATA_UINT64);
246 253 kstat_named_init(&ixgbe_ks->rx_exceed_pkt, "rx_exceed_pkt",
247 254 KSTAT_DATA_UINT64);
248 255 kstat_named_init(&ixgbe_ks->tx_overload, "tx_overload",
249 256 KSTAT_DATA_UINT64);
250 257 kstat_named_init(&ixgbe_ks->tx_fail_no_tbd, "tx_fail_no_tbd",
251 258 KSTAT_DATA_UINT64);
252 259 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
253 260 KSTAT_DATA_UINT64);
254 261 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
255 262 KSTAT_DATA_UINT64);
256 263 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
257 264 KSTAT_DATA_UINT64);
258 265 #endif
259 266
260 267 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
261 268 KSTAT_DATA_UINT64);
262 269 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
263 270 KSTAT_DATA_UINT64);
264 271 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
265 272 KSTAT_DATA_UINT64);
266 273 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
267 274 KSTAT_DATA_UINT64);
268 275 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)",
269 276 KSTAT_DATA_UINT64);
270 277 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)",
271 278 KSTAT_DATA_UINT64);
272 279 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
273 280 KSTAT_DATA_UINT64);
274 281 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
275 282 KSTAT_DATA_UINT64);
276 283 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
277 284 KSTAT_DATA_UINT64);
278 285 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
279 286 KSTAT_DATA_UINT64);
280 287 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)",
281 288 KSTAT_DATA_UINT64);
282 289 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)",
283 290 KSTAT_DATA_UINT64);
284 291 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
285 292 KSTAT_DATA_UINT64);
286 293 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
287 294 KSTAT_DATA_UINT64);
288 295 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
289 296 KSTAT_DATA_UINT64);
290 297 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
291 298 KSTAT_DATA_UINT64);
292 299
293 300 kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]",
294 301 KSTAT_DATA_UINT64);
295 302 kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]",
296 303 KSTAT_DATA_UINT64);
297 304 kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]",
298 305 KSTAT_DATA_UINT64);
299 306 kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]",
300 307 KSTAT_DATA_UINT64);
301 308 kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]",
302 309 KSTAT_DATA_UINT64);
303 310 kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]",
304 311 KSTAT_DATA_UINT64);
305 312 kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]",
306 313 KSTAT_DATA_UINT64);
307 314 kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]",
308 315 KSTAT_DATA_UINT64);
309 316 kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]",
310 317 KSTAT_DATA_UINT64);
311 318 kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]",
312 319 KSTAT_DATA_UINT64);
313 320 kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]",
314 321 KSTAT_DATA_UINT64);
315 322 kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]",
316 323 KSTAT_DATA_UINT64);
317 324 kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]",
318 325 KSTAT_DATA_UINT64);
319 326 kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]",
320 327 KSTAT_DATA_UINT64);
321 328 kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]",
322 329 KSTAT_DATA_UINT64);
323 330 kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]",
324 331 KSTAT_DATA_UINT64);
325 332
326 333 kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]",
327 334 KSTAT_DATA_UINT64);
328 335 kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]",
329 336 KSTAT_DATA_UINT64);
330 337 kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]",
331 338 KSTAT_DATA_UINT64);
332 339 kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]",
333 340 KSTAT_DATA_UINT64);
334 341 kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]",
335 342 KSTAT_DATA_UINT64);
336 343 kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]",
337 344 KSTAT_DATA_UINT64);
338 345 kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]",
339 346 KSTAT_DATA_UINT64);
340 347 kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]",
341 348 KSTAT_DATA_UINT64);
342 349 kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]",
343 350 KSTAT_DATA_UINT64);
344 351 kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]",
345 352 KSTAT_DATA_UINT64);
346 353 kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]",
347 354 KSTAT_DATA_UINT64);
348 355 kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]",
349 356 KSTAT_DATA_UINT64);
350 357 kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]",
351 358 KSTAT_DATA_UINT64);
352 359 kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]",
353 360 KSTAT_DATA_UINT64);
354 361 kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]",
355 362 KSTAT_DATA_UINT64);
356 363 kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]",
357 364 KSTAT_DATA_UINT64);
358 365
359 366 kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]",
360 367 KSTAT_DATA_UINT64);
361 368 kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]",
362 369 KSTAT_DATA_UINT64);
363 370 kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]",
364 371 KSTAT_DATA_UINT64);
365 372 kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]",
366 373 KSTAT_DATA_UINT64);
367 374 kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]",
368 375 KSTAT_DATA_UINT64);
369 376 kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]",
370 377 KSTAT_DATA_UINT64);
371 378 kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]",
372 379 KSTAT_DATA_UINT64);
373 380 kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]",
374 381 KSTAT_DATA_UINT64);
375 382 kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]",
376 383 KSTAT_DATA_UINT64);
377 384 kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]",
378 385 KSTAT_DATA_UINT64);
379 386 kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]",
380 387 KSTAT_DATA_UINT64);
381 388 kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]",
382 389 KSTAT_DATA_UINT64);
383 390 kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]",
384 391 KSTAT_DATA_UINT64);
385 392 kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]",
386 393 KSTAT_DATA_UINT64);
387 394 kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]",
388 395 KSTAT_DATA_UINT64);
389 396 kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]",
390 397 KSTAT_DATA_UINT64);
391 398
392 399 kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]",
393 400 KSTAT_DATA_UINT64);
394 401 kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]",
395 402 KSTAT_DATA_UINT64);
396 403 kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]",
397 404 KSTAT_DATA_UINT64);
398 405 kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]",
399 406 KSTAT_DATA_UINT64);
400 407 kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]",
401 408 KSTAT_DATA_UINT64);
402 409 kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]",
403 410 KSTAT_DATA_UINT64);
404 411 kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]",
405 412 KSTAT_DATA_UINT64);
406 413 kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]",
407 414 KSTAT_DATA_UINT64);
408 415 kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]",
409 416 KSTAT_DATA_UINT64);
410 417 kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]",
411 418 KSTAT_DATA_UINT64);
412 419 kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]",
413 420 KSTAT_DATA_UINT64);
414 421 kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]",
415 422 KSTAT_DATA_UINT64);
416 423 kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]",
417 424 KSTAT_DATA_UINT64);
418 425 kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]",
419 426 KSTAT_DATA_UINT64);
420 427 kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]",
421 428 KSTAT_DATA_UINT64);
422 429 kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]",
423 430 KSTAT_DATA_UINT64);
424 431
425 432 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
426 433 KSTAT_DATA_UINT64);
427 434 kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
428 435 KSTAT_DATA_UINT64);
429 436 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
430 437 KSTAT_DATA_UINT64);
431 438 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
432 439 KSTAT_DATA_UINT64);
433 440 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
434 441 KSTAT_DATA_UINT64);
435 442 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
436 443 KSTAT_DATA_UINT64);
437 444 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
438 445 KSTAT_DATA_UINT64);
439 446 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
440 447 KSTAT_DATA_UINT64);
441 448 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
442 449 KSTAT_DATA_UINT64);
443 450 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
444 451 KSTAT_DATA_UINT64);
445 452 kstat_named_init(&ixgbe_ks->rfc, "recv_fragment",
446 453 KSTAT_DATA_UINT64);
447 454 kstat_named_init(&ixgbe_ks->roc, "recv_oversize",
448 455 KSTAT_DATA_UINT64);
449 456 kstat_named_init(&ixgbe_ks->rjc, "recv_jabber",
450 457 KSTAT_DATA_UINT64);
451 458 kstat_named_init(&ixgbe_ks->rnbc, "recv_no_buffer",
452 459 KSTAT_DATA_UINT64);
453 460 kstat_named_init(&ixgbe_ks->lroc, "lro_pkt_count",
454 461 KSTAT_DATA_UINT64);
455 462 /*
456 463 * Function to provide kernel stat update on demand
457 464 */
458 465 ks->ks_update = ixgbe_update_stats;
459 466
460 467 ks->ks_private = (void *)ixgbe;
461 468
462 469 /*
463 470 * Add kstat to systems kstat chain
464 471 */
465 472 kstat_install(ks);
466 473
467 474 return (IXGBE_SUCCESS);
468 475 }
469 476
470 477 /*
471 478 * Retrieve a value for one of the statistics.
472 479 */
473 480 int
474 481 ixgbe_m_stat(void *arg, uint_t stat, uint64_t *val)
475 482 {
476 483 ixgbe_t *ixgbe = (ixgbe_t *)arg;
477 484 struct ixgbe_hw *hw = &ixgbe->hw;
478 485 ixgbe_stat_t *ixgbe_ks;
479 486 int i;
480 487
481 488 ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data;
482 489
483 490 mutex_enter(&ixgbe->gen_lock);
484 491
485 492 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
486 493 mutex_exit(&ixgbe->gen_lock);
487 494 return (ECANCELED);
488 495 }
489 496
490 497 switch (stat) {
491 498 case MAC_STAT_IFSPEED:
492 499 *val = ixgbe->link_speed * 1000000ull;
493 500 break;
494 501
495 502 case MAC_STAT_MULTIRCV:
496 503 ixgbe_ks->mprc.value.ui64 +=
497 504 IXGBE_READ_REG(hw, IXGBE_MPRC);
498 505 *val = ixgbe_ks->mprc.value.ui64;
499 506 break;
500 507
501 508 case MAC_STAT_BRDCSTRCV:
502 509 ixgbe_ks->bprc.value.ui64 +=
503 510 IXGBE_READ_REG(hw, IXGBE_BPRC);
504 511 *val = ixgbe_ks->bprc.value.ui64;
505 512 break;
506 513
507 514 case MAC_STAT_MULTIXMT:
508 515 ixgbe_ks->mptc.value.ui64 +=
509 516 IXGBE_READ_REG(hw, IXGBE_MPTC);
510 517 *val = ixgbe_ks->mptc.value.ui64;
511 518 break;
512 519
513 520 case MAC_STAT_BRDCSTXMT:
514 521 ixgbe_ks->bptc.value.ui64 +=
515 522 IXGBE_READ_REG(hw, IXGBE_BPTC);
516 523 *val = ixgbe_ks->bptc.value.ui64;
517 524 break;
518 525
519 526 case MAC_STAT_NORCVBUF:
520 527 for (i = 0; i < 8; i++) {
521 528 ixgbe_ks->rnbc.value.ui64 +=
522 529 IXGBE_READ_REG(hw, IXGBE_RNBC(i));
523 530 }
524 531 *val = ixgbe_ks->rnbc.value.ui64;
525 532 break;
526 533
527 534 case MAC_STAT_IERRORS:
528 535 ixgbe_ks->crcerrs.value.ui64 +=
529 536 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
530 537 ixgbe_ks->illerrc.value.ui64 +=
531 538 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
532 539 ixgbe_ks->errbc.value.ui64 +=
533 540 IXGBE_READ_REG(hw, IXGBE_ERRBC);
534 541 ixgbe_ks->rlec.value.ui64 +=
535 542 IXGBE_READ_REG(hw, IXGBE_RLEC);
536 543 *val = ixgbe_ks->crcerrs.value.ui64 +
537 544 ixgbe_ks->illerrc.value.ui64 +
538 545 ixgbe_ks->errbc.value.ui64 +
539 546 ixgbe_ks->rlec.value.ui64;
540 547 break;
541 548
542 549 case MAC_STAT_RBYTES:
543 550 ixgbe_ks->tor.value.ui64 = 0;
544 551 for (i = 0; i < 16; i++) {
545 552 ixgbe_ks->qbrc[i].value.ui64 +=
546 553 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
547 554 ixgbe_ks->tor.value.ui64 +=
548 555 ixgbe_ks->qbrc[i].value.ui64;
549 556 }
550 557 *val = ixgbe_ks->tor.value.ui64;
551 558 break;
552 559
553 560 case MAC_STAT_OBYTES:
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554 561 ixgbe_ks->tot.value.ui64 = 0;
555 562 for (i = 0; i < 16; i++) {
556 563 switch (hw->mac.type) {
557 564 case ixgbe_mac_82598EB:
558 565 ixgbe_ks->qbtc[i].value.ui64 +=
559 566 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
560 567 break;
561 568
562 569 case ixgbe_mac_82599EB:
563 570 case ixgbe_mac_X540:
571 + case ixgbe_mac_X550:
572 + case ixgbe_mac_X550EM_x:
564 573 ixgbe_ks->qbtc[i].value.ui64 +=
565 574 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
566 575 ixgbe_ks->qbtc[i].value.ui64 +=
567 576 ((uint64_t)((IXGBE_READ_REG(hw,
568 577 IXGBE_QBTC_H(i))) & 0xF) << 32);
569 578 break;
570 579
571 580 default:
572 581 break;
573 582 }
574 583 ixgbe_ks->tot.value.ui64 +=
575 584 ixgbe_ks->qbtc[i].value.ui64;
576 585 }
577 586 *val = ixgbe_ks->tot.value.ui64;
578 587 break;
579 588
580 589 case MAC_STAT_IPACKETS:
581 590 ixgbe_ks->tpr.value.ui64 +=
582 591 IXGBE_READ_REG(hw, IXGBE_TPR);
583 592 *val = ixgbe_ks->tpr.value.ui64;
584 593 break;
585 594
586 595 case MAC_STAT_OPACKETS:
587 596 ixgbe_ks->tpt.value.ui64 +=
588 597 IXGBE_READ_REG(hw, IXGBE_TPT);
589 598 *val = ixgbe_ks->tpt.value.ui64;
590 599 break;
591 600
592 601 /* RFC 1643 stats */
593 602 case ETHER_STAT_FCS_ERRORS:
594 603 ixgbe_ks->crcerrs.value.ui64 +=
595 604 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
596 605 *val = ixgbe_ks->crcerrs.value.ui64;
597 606 break;
598 607
599 608 case ETHER_STAT_TOOLONG_ERRORS:
600 609 ixgbe_ks->roc.value.ui64 +=
601 610 IXGBE_READ_REG(hw, IXGBE_ROC);
602 611 *val = ixgbe_ks->roc.value.ui64;
603 612 break;
604 613
605 614 case ETHER_STAT_MACRCV_ERRORS:
606 615 ixgbe_ks->crcerrs.value.ui64 +=
607 616 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
608 617 ixgbe_ks->illerrc.value.ui64 +=
609 618 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
610 619 ixgbe_ks->errbc.value.ui64 +=
611 620 IXGBE_READ_REG(hw, IXGBE_ERRBC);
612 621 ixgbe_ks->rlec.value.ui64 +=
613 622 IXGBE_READ_REG(hw, IXGBE_RLEC);
614 623 *val = ixgbe_ks->crcerrs.value.ui64 +
615 624 ixgbe_ks->illerrc.value.ui64 +
616 625 ixgbe_ks->errbc.value.ui64 +
617 626 ixgbe_ks->rlec.value.ui64;
618 627 break;
619 628
620 629 /* MII/GMII stats */
621 630 case ETHER_STAT_XCVR_ADDR:
622 631 /* The Internal PHY's MDI address for each MAC is 1 */
623 632 *val = 1;
624 633 break;
625 634
626 635 case ETHER_STAT_XCVR_ID:
627 636 *val = hw->phy.id;
628 637 break;
629 638
630 639 case ETHER_STAT_XCVR_INUSE:
631 640 switch (ixgbe->link_speed) {
632 641 case IXGBE_LINK_SPEED_1GB_FULL:
633 642 *val =
634 643 (hw->phy.media_type == ixgbe_media_type_copper) ?
635 644 XCVR_1000T : XCVR_1000X;
636 645 break;
637 646 case IXGBE_LINK_SPEED_100_FULL:
638 647 *val = (hw->phy.media_type == ixgbe_media_type_copper) ?
639 648 XCVR_100T2 : XCVR_100X;
640 649 break;
641 650 default:
642 651 *val = XCVR_NONE;
643 652 break;
644 653 }
645 654 break;
646 655
647 656 case ETHER_STAT_CAP_10GFDX:
648 657 *val = 1;
649 658 break;
650 659
651 660 case ETHER_STAT_CAP_1000FDX:
652 661 *val = 1;
653 662 break;
654 663
655 664 case ETHER_STAT_CAP_100FDX:
656 665 *val = 1;
657 666 break;
658 667
659 668 case ETHER_STAT_CAP_ASMPAUSE:
660 669 *val = ixgbe->param_asym_pause_cap;
661 670 break;
662 671
663 672 case ETHER_STAT_CAP_PAUSE:
664 673 *val = ixgbe->param_pause_cap;
665 674 break;
666 675
667 676 case ETHER_STAT_CAP_AUTONEG:
668 677 *val = 1;
669 678 break;
670 679
671 680 case ETHER_STAT_ADV_CAP_10GFDX:
672 681 *val = ixgbe->param_adv_10000fdx_cap;
673 682 break;
674 683
675 684 case ETHER_STAT_ADV_CAP_1000FDX:
676 685 *val = ixgbe->param_adv_1000fdx_cap;
677 686 break;
678 687
679 688 case ETHER_STAT_ADV_CAP_100FDX:
680 689 *val = ixgbe->param_adv_100fdx_cap;
681 690 break;
682 691
683 692 case ETHER_STAT_ADV_CAP_ASMPAUSE:
684 693 *val = ixgbe->param_adv_asym_pause_cap;
685 694 break;
686 695
687 696 case ETHER_STAT_ADV_CAP_PAUSE:
688 697 *val = ixgbe->param_adv_pause_cap;
689 698 break;
690 699
691 700 case ETHER_STAT_ADV_CAP_AUTONEG:
692 701 *val = ixgbe->param_adv_autoneg_cap;
693 702 break;
694 703
695 704 case ETHER_STAT_LP_CAP_10GFDX:
696 705 *val = ixgbe->param_lp_10000fdx_cap;
697 706 break;
698 707
699 708 case ETHER_STAT_LP_CAP_1000FDX:
700 709 *val = ixgbe->param_lp_1000fdx_cap;
701 710 break;
702 711
703 712 case ETHER_STAT_LP_CAP_100FDX:
704 713 *val = ixgbe->param_lp_100fdx_cap;
705 714 break;
706 715
707 716 case ETHER_STAT_LP_CAP_ASMPAUSE:
708 717 *val = ixgbe->param_lp_asym_pause_cap;
709 718 break;
710 719
711 720 case ETHER_STAT_LP_CAP_PAUSE:
712 721 *val = ixgbe->param_lp_pause_cap;
713 722 break;
714 723
715 724 case ETHER_STAT_LP_CAP_AUTONEG:
716 725 *val = ixgbe->param_lp_autoneg_cap;
717 726 break;
718 727
719 728 case ETHER_STAT_LINK_ASMPAUSE:
720 729 *val = ixgbe->param_asym_pause_cap;
721 730 break;
722 731
723 732 case ETHER_STAT_LINK_PAUSE:
724 733 *val = ixgbe->param_pause_cap;
725 734 break;
726 735
727 736 case ETHER_STAT_LINK_AUTONEG:
728 737 *val = ixgbe->param_adv_autoneg_cap;
729 738 break;
730 739
731 740 case ETHER_STAT_LINK_DUPLEX:
732 741 *val = ixgbe->link_duplex;
733 742 break;
734 743
735 744 case ETHER_STAT_TOOSHORT_ERRORS:
736 745 ixgbe_ks->ruc.value.ui64 +=
737 746 IXGBE_READ_REG(hw, IXGBE_RUC);
738 747 *val = ixgbe_ks->ruc.value.ui64;
739 748 break;
740 749
741 750 case ETHER_STAT_CAP_REMFAULT:
742 751 *val = ixgbe->param_rem_fault;
743 752 break;
744 753
745 754 case ETHER_STAT_ADV_REMFAULT:
746 755 *val = ixgbe->param_adv_rem_fault;
747 756 break;
748 757
749 758 case ETHER_STAT_LP_REMFAULT:
750 759 *val = ixgbe->param_lp_rem_fault;
751 760 break;
752 761
753 762 case ETHER_STAT_JABBER_ERRORS:
754 763 ixgbe_ks->rjc.value.ui64 +=
755 764 IXGBE_READ_REG(hw, IXGBE_RJC);
756 765 *val = ixgbe_ks->rjc.value.ui64;
757 766 break;
758 767
759 768 default:
760 769 mutex_exit(&ixgbe->gen_lock);
761 770 return (ENOTSUP);
762 771 }
763 772
764 773 mutex_exit(&ixgbe->gen_lock);
765 774
766 775 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
767 776 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_DEGRADED);
768 777 return (EIO);
769 778 }
770 779
771 780 return (0);
772 781 }
773 782
774 783 /*
775 784 * Retrieve a value for one of the statistics for a particular rx ring
776 785 */
777 786 int
778 787 ixgbe_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
779 788 {
780 789 ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)rh;
781 790 ixgbe_t *ixgbe = rx_ring->ixgbe;
782 791
783 792 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
784 793 return (ECANCELED);
785 794 }
786 795
787 796 switch (stat) {
788 797 case MAC_STAT_RBYTES:
789 798 *val = rx_ring->stat_rbytes;
790 799 break;
791 800
792 801 case MAC_STAT_IPACKETS:
793 802 *val = rx_ring->stat_ipackets;
794 803 break;
795 804
796 805 default:
797 806 *val = 0;
798 807 return (ENOTSUP);
799 808 }
800 809
801 810 return (0);
802 811 }
803 812
804 813 /*
805 814 * Retrieve a value for one of the statistics for a particular tx ring
806 815 */
807 816 int
808 817 ixgbe_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
809 818 {
810 819 ixgbe_tx_ring_t *tx_ring = (ixgbe_tx_ring_t *)rh;
811 820 ixgbe_t *ixgbe = tx_ring->ixgbe;
812 821
813 822 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
814 823 return (ECANCELED);
815 824 }
816 825
817 826 switch (stat) {
818 827 case MAC_STAT_OBYTES:
819 828 *val = tx_ring->stat_obytes;
820 829 break;
821 830
822 831 case MAC_STAT_OPACKETS:
823 832 *val = tx_ring->stat_opackets;
824 833 break;
825 834
826 835 default:
827 836 *val = 0;
828 837 return (ENOTSUP);
829 838 }
830 839
831 840 return (0);
832 841 }
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