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6064 ixgbe needs X550 support


   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  * Copyright 2012 Nexenta Systems, Inc. All rights reserved.

  29  */
  30 
  31 #include "ixgbe_sw.h"
  32 
  33 /*
  34  * Update driver private statistics.
  35  */
  36 static int
  37 ixgbe_update_stats(kstat_t *ks, int rw)
  38 {
  39         ixgbe_t *ixgbe;
  40         struct ixgbe_hw *hw;
  41         ixgbe_stat_t *ixgbe_ks;
  42         int i;
  43 
  44         if (rw == KSTAT_WRITE)
  45                 return (EACCES);
  46 
  47         ixgbe = (ixgbe_t *)ks->ks_private;
  48         ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;


  97         ixgbe_ks->tor.value.ui64 = 0;
  98         ixgbe_ks->tot.value.ui64 = 0;
  99         for (i = 0; i < 16; i++) {
 100                 ixgbe_ks->qprc[i].value.ui64 +=
 101                     IXGBE_READ_REG(hw, IXGBE_QPRC(i));
 102                 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
 103                 ixgbe_ks->qptc[i].value.ui64 +=
 104                     IXGBE_READ_REG(hw, IXGBE_QPTC(i));
 105                 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
 106                 ixgbe_ks->qbrc[i].value.ui64 +=
 107                     IXGBE_READ_REG(hw, IXGBE_QBRC(i));
 108                 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
 109                 switch (hw->mac.type) {
 110                 case ixgbe_mac_82598EB:
 111                         ixgbe_ks->qbtc[i].value.ui64 +=
 112                             IXGBE_READ_REG(hw, IXGBE_QBTC(i));
 113                         break;
 114 
 115                 case ixgbe_mac_82599EB:
 116                 case ixgbe_mac_X540:


 117                         ixgbe_ks->qbtc[i].value.ui64 +=
 118                             IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
 119                         ixgbe_ks->qbtc[i].value.ui64 +=
 120                             ((uint64_t)((IXGBE_READ_REG(hw,
 121                             IXGBE_QBTC_H(i))) & 0xF) << 32);
 122                         break;
 123 
 124                 default:
 125                         break;
 126                 }
 127                 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
 128         }
 129         /*
 130          * This is a Workaround:
 131          * Currently h/w GORCH, GOTCH, TORH registers are not
 132          * correctly implemented. We found that the values in
 133          * these registers are same as those in corresponding
 134          * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
 135          * gor and got stat data will not be retrieved through
 136          * GORC{H/L} and GOTC{H/L} registers but be obtained by


 151         ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
 152         ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
 153         ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
 154         ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
 155 
 156         ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
 157         for (i = 0; i < 8; i++)
 158                 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
 159         ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
 160         ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
 161         ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
 162         ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
 163         switch (hw->mac.type) {
 164         case ixgbe_mac_82598EB:
 165                 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
 166                     IXGBE_LXONRXC);
 167                 break;
 168 
 169         case ixgbe_mac_82599EB:
 170         case ixgbe_mac_X540:


 171                 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
 172                     IXGBE_LXONRXCNT);
 173                 break;
 174 
 175         default:
 176                 break;
 177         }
 178         ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
 179         switch (hw->mac.type) {
 180         case ixgbe_mac_82598EB:
 181                 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
 182                     IXGBE_LXOFFRXC);
 183                 break;
 184 
 185         case ixgbe_mac_82599EB:
 186         case ixgbe_mac_X540:


 187                 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
 188                     IXGBE_LXOFFRXCNT);
 189                 break;
 190 
 191         default:
 192                 break;
 193         }
 194         ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
 195         ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
 196         ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
 197         ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
 198 
 199         mutex_exit(&ixgbe->gen_lock);
 200 
 201         if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
 202                 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
 203 
 204         return (0);
 205 }
 206 


 544                 for (i = 0; i < 16; i++) {
 545                         ixgbe_ks->qbrc[i].value.ui64 +=
 546                             IXGBE_READ_REG(hw, IXGBE_QBRC(i));
 547                         ixgbe_ks->tor.value.ui64 +=
 548                             ixgbe_ks->qbrc[i].value.ui64;
 549                 }
 550                 *val = ixgbe_ks->tor.value.ui64;
 551                 break;
 552 
 553         case MAC_STAT_OBYTES:
 554                 ixgbe_ks->tot.value.ui64 = 0;
 555                 for (i = 0; i < 16; i++) {
 556                         switch (hw->mac.type) {
 557                         case ixgbe_mac_82598EB:
 558                                 ixgbe_ks->qbtc[i].value.ui64 +=
 559                                     IXGBE_READ_REG(hw, IXGBE_QBTC(i));
 560                                 break;
 561 
 562                         case ixgbe_mac_82599EB:
 563                         case ixgbe_mac_X540:


 564                                 ixgbe_ks->qbtc[i].value.ui64 +=
 565                                     IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
 566                                 ixgbe_ks->qbtc[i].value.ui64 +=
 567                                     ((uint64_t)((IXGBE_READ_REG(hw,
 568                                     IXGBE_QBTC_H(i))) & 0xF) << 32);
 569                                 break;
 570 
 571                         default:
 572                                 break;
 573                         }
 574                         ixgbe_ks->tot.value.ui64 +=
 575                             ixgbe_ks->qbtc[i].value.ui64;
 576                 }
 577                 *val = ixgbe_ks->tot.value.ui64;
 578                 break;
 579 
 580         case MAC_STAT_IPACKETS:
 581                 ixgbe_ks->tpr.value.ui64 +=
 582                     IXGBE_READ_REG(hw, IXGBE_TPR);
 583                 *val = ixgbe_ks->tpr.value.ui64;




   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
  29  * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
  30  */
  31 
  32 #include "ixgbe_sw.h"
  33 
  34 /*
  35  * Update driver private statistics.
  36  */
  37 static int
  38 ixgbe_update_stats(kstat_t *ks, int rw)
  39 {
  40         ixgbe_t *ixgbe;
  41         struct ixgbe_hw *hw;
  42         ixgbe_stat_t *ixgbe_ks;
  43         int i;
  44 
  45         if (rw == KSTAT_WRITE)
  46                 return (EACCES);
  47 
  48         ixgbe = (ixgbe_t *)ks->ks_private;
  49         ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;


  98         ixgbe_ks->tor.value.ui64 = 0;
  99         ixgbe_ks->tot.value.ui64 = 0;
 100         for (i = 0; i < 16; i++) {
 101                 ixgbe_ks->qprc[i].value.ui64 +=
 102                     IXGBE_READ_REG(hw, IXGBE_QPRC(i));
 103                 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
 104                 ixgbe_ks->qptc[i].value.ui64 +=
 105                     IXGBE_READ_REG(hw, IXGBE_QPTC(i));
 106                 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
 107                 ixgbe_ks->qbrc[i].value.ui64 +=
 108                     IXGBE_READ_REG(hw, IXGBE_QBRC(i));
 109                 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
 110                 switch (hw->mac.type) {
 111                 case ixgbe_mac_82598EB:
 112                         ixgbe_ks->qbtc[i].value.ui64 +=
 113                             IXGBE_READ_REG(hw, IXGBE_QBTC(i));
 114                         break;
 115 
 116                 case ixgbe_mac_82599EB:
 117                 case ixgbe_mac_X540:
 118                 case ixgbe_mac_X550:
 119                 case ixgbe_mac_X550EM_x:
 120                         ixgbe_ks->qbtc[i].value.ui64 +=
 121                             IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
 122                         ixgbe_ks->qbtc[i].value.ui64 +=
 123                             ((uint64_t)((IXGBE_READ_REG(hw,
 124                             IXGBE_QBTC_H(i))) & 0xF) << 32);
 125                         break;
 126 
 127                 default:
 128                         break;
 129                 }
 130                 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
 131         }
 132         /*
 133          * This is a Workaround:
 134          * Currently h/w GORCH, GOTCH, TORH registers are not
 135          * correctly implemented. We found that the values in
 136          * these registers are same as those in corresponding
 137          * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
 138          * gor and got stat data will not be retrieved through
 139          * GORC{H/L} and GOTC{H/L} registers but be obtained by


 154         ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
 155         ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
 156         ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
 157         ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
 158 
 159         ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
 160         for (i = 0; i < 8; i++)
 161                 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
 162         ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
 163         ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
 164         ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
 165         ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
 166         switch (hw->mac.type) {
 167         case ixgbe_mac_82598EB:
 168                 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
 169                     IXGBE_LXONRXC);
 170                 break;
 171 
 172         case ixgbe_mac_82599EB:
 173         case ixgbe_mac_X540:
 174         case ixgbe_mac_X550:
 175         case ixgbe_mac_X550EM_x:
 176                 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
 177                     IXGBE_LXONRXCNT);
 178                 break;
 179 
 180         default:
 181                 break;
 182         }
 183         ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
 184         switch (hw->mac.type) {
 185         case ixgbe_mac_82598EB:
 186                 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
 187                     IXGBE_LXOFFRXC);
 188                 break;
 189 
 190         case ixgbe_mac_82599EB:
 191         case ixgbe_mac_X540:
 192         case ixgbe_mac_X550:
 193         case ixgbe_mac_X550EM_x:
 194                 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
 195                     IXGBE_LXOFFRXCNT);
 196                 break;
 197 
 198         default:
 199                 break;
 200         }
 201         ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
 202         ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
 203         ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
 204         ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
 205 
 206         mutex_exit(&ixgbe->gen_lock);
 207 
 208         if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
 209                 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
 210 
 211         return (0);
 212 }
 213 


 551                 for (i = 0; i < 16; i++) {
 552                         ixgbe_ks->qbrc[i].value.ui64 +=
 553                             IXGBE_READ_REG(hw, IXGBE_QBRC(i));
 554                         ixgbe_ks->tor.value.ui64 +=
 555                             ixgbe_ks->qbrc[i].value.ui64;
 556                 }
 557                 *val = ixgbe_ks->tor.value.ui64;
 558                 break;
 559 
 560         case MAC_STAT_OBYTES:
 561                 ixgbe_ks->tot.value.ui64 = 0;
 562                 for (i = 0; i < 16; i++) {
 563                         switch (hw->mac.type) {
 564                         case ixgbe_mac_82598EB:
 565                                 ixgbe_ks->qbtc[i].value.ui64 +=
 566                                     IXGBE_READ_REG(hw, IXGBE_QBTC(i));
 567                                 break;
 568 
 569                         case ixgbe_mac_82599EB:
 570                         case ixgbe_mac_X540:
 571                         case ixgbe_mac_X550:
 572                         case ixgbe_mac_X550EM_x:
 573                                 ixgbe_ks->qbtc[i].value.ui64 +=
 574                                     IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
 575                                 ixgbe_ks->qbtc[i].value.ui64 +=
 576                                     ((uint64_t)((IXGBE_READ_REG(hw,
 577                                     IXGBE_QBTC_H(i))) & 0xF) << 32);
 578                                 break;
 579 
 580                         default:
 581                                 break;
 582                         }
 583                         ixgbe_ks->tot.value.ui64 +=
 584                             ixgbe_ks->qbtc[i].value.ui64;
 585                 }
 586                 *val = ixgbe_ks->tot.value.ui64;
 587                 break;
 588 
 589         case MAC_STAT_IPACKETS:
 590                 ixgbe_ks->tpr.value.ui64 +=
 591                     IXGBE_READ_REG(hw, IXGBE_TPR);
 592                 *val = ixgbe_ks->tpr.value.ui64;