1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved. 24 */ 25 26 /* 27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved. 28 * Copyright 2012 Nexenta Systems, Inc. All rights reserved. 29 * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved. 30 */ 31 32 #include "ixgbe_sw.h" 33 34 /* 35 * Update driver private statistics. 36 */ 37 static int 38 ixgbe_update_stats(kstat_t *ks, int rw) 39 { 40 ixgbe_t *ixgbe; 41 struct ixgbe_hw *hw; 42 ixgbe_stat_t *ixgbe_ks; 43 int i; 44 45 if (rw == KSTAT_WRITE) 46 return (EACCES); 47 48 ixgbe = (ixgbe_t *)ks->ks_private; 49 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data; 50 hw = &ixgbe->hw; 51 52 mutex_enter(&ixgbe->gen_lock); 53 54 /* 55 * Basic information 56 */ 57 ixgbe_ks->link_speed.value.ui64 = ixgbe->link_speed; 58 ixgbe_ks->reset_count.value.ui64 = ixgbe->reset_count; 59 ixgbe_ks->lroc.value.ui64 = ixgbe->lro_pkt_count; 60 61 #ifdef IXGBE_DEBUG 62 ixgbe_ks->rx_frame_error.value.ui64 = 0; 63 ixgbe_ks->rx_cksum_error.value.ui64 = 0; 64 ixgbe_ks->rx_exceed_pkt.value.ui64 = 0; 65 for (i = 0; i < ixgbe->num_rx_rings; i++) { 66 ixgbe_ks->rx_frame_error.value.ui64 += 67 ixgbe->rx_rings[i].stat_frame_error; 68 ixgbe_ks->rx_cksum_error.value.ui64 += 69 ixgbe->rx_rings[i].stat_cksum_error; 70 ixgbe_ks->rx_exceed_pkt.value.ui64 += 71 ixgbe->rx_rings[i].stat_exceed_pkt; 72 } 73 74 ixgbe_ks->tx_overload.value.ui64 = 0; 75 ixgbe_ks->tx_fail_no_tbd.value.ui64 = 0; 76 ixgbe_ks->tx_fail_no_tcb.value.ui64 = 0; 77 ixgbe_ks->tx_fail_dma_bind.value.ui64 = 0; 78 ixgbe_ks->tx_reschedule.value.ui64 = 0; 79 for (i = 0; i < ixgbe->num_tx_rings; i++) { 80 ixgbe_ks->tx_overload.value.ui64 += 81 ixgbe->tx_rings[i].stat_overload; 82 ixgbe_ks->tx_fail_no_tbd.value.ui64 += 83 ixgbe->tx_rings[i].stat_fail_no_tbd; 84 ixgbe_ks->tx_fail_no_tcb.value.ui64 += 85 ixgbe->tx_rings[i].stat_fail_no_tcb; 86 ixgbe_ks->tx_fail_dma_bind.value.ui64 += 87 ixgbe->tx_rings[i].stat_fail_dma_bind; 88 ixgbe_ks->tx_reschedule.value.ui64 += 89 ixgbe->tx_rings[i].stat_reschedule; 90 } 91 #endif 92 93 /* 94 * Hardware calculated statistics. 95 */ 96 ixgbe_ks->gprc.value.ui64 = 0; 97 ixgbe_ks->gptc.value.ui64 = 0; 98 ixgbe_ks->tor.value.ui64 = 0; 99 ixgbe_ks->tot.value.ui64 = 0; 100 for (i = 0; i < 16; i++) { 101 ixgbe_ks->qprc[i].value.ui64 += 102 IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 103 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64; 104 ixgbe_ks->qptc[i].value.ui64 += 105 IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 106 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64; 107 ixgbe_ks->qbrc[i].value.ui64 += 108 IXGBE_READ_REG(hw, IXGBE_QBRC(i)); 109 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64; 110 switch (hw->mac.type) { 111 case ixgbe_mac_82598EB: 112 ixgbe_ks->qbtc[i].value.ui64 += 113 IXGBE_READ_REG(hw, IXGBE_QBTC(i)); 114 break; 115 116 case ixgbe_mac_82599EB: 117 case ixgbe_mac_X540: 118 case ixgbe_mac_X550: 119 case ixgbe_mac_X550EM_x: 120 ixgbe_ks->qbtc[i].value.ui64 += 121 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); 122 ixgbe_ks->qbtc[i].value.ui64 += 123 ((uint64_t)((IXGBE_READ_REG(hw, 124 IXGBE_QBTC_H(i))) & 0xF) << 32); 125 break; 126 127 default: 128 break; 129 } 130 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64; 131 } 132 /* 133 * This is a Workaround: 134 * Currently h/w GORCH, GOTCH, TORH registers are not 135 * correctly implemented. We found that the values in 136 * these registers are same as those in corresponding 137 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the 138 * gor and got stat data will not be retrieved through 139 * GORC{H/L} and GOTC{H/L} registers but be obtained by 140 * simply assigning tor/tot stat data, so the gor/got 141 * stat data will not be accurate. 142 */ 143 ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64; 144 ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64; 145 146 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64); 147 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127); 148 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255); 149 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511); 150 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023); 151 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522); 152 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64); 153 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127); 154 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255); 155 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511); 156 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023); 157 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522); 158 159 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC); 160 for (i = 0; i < 8; i++) 161 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i)); 162 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC); 163 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC); 164 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC); 165 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC); 166 switch (hw->mac.type) { 167 case ixgbe_mac_82598EB: 168 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw, 169 IXGBE_LXONRXC); 170 break; 171 172 case ixgbe_mac_82599EB: 173 case ixgbe_mac_X540: 174 case ixgbe_mac_X550: 175 case ixgbe_mac_X550EM_x: 176 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw, 177 IXGBE_LXONRXCNT); 178 break; 179 180 default: 181 break; 182 } 183 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 184 switch (hw->mac.type) { 185 case ixgbe_mac_82598EB: 186 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw, 187 IXGBE_LXOFFRXC); 188 break; 189 190 case ixgbe_mac_82599EB: 191 case ixgbe_mac_X540: 192 case ixgbe_mac_X550: 193 case ixgbe_mac_X550EM_x: 194 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw, 195 IXGBE_LXOFFRXCNT); 196 break; 197 198 default: 199 break; 200 } 201 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC); 202 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC); 203 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC); 204 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC); 205 206 mutex_exit(&ixgbe->gen_lock); 207 208 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) 209 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED); 210 211 return (0); 212 } 213 214 /* 215 * Create and initialize the driver private statistics. 216 */ 217 int 218 ixgbe_init_stats(ixgbe_t *ixgbe) 219 { 220 kstat_t *ks; 221 ixgbe_stat_t *ixgbe_ks; 222 223 /* 224 * Create and init kstat 225 */ 226 ks = kstat_create(MODULE_NAME, ddi_get_instance(ixgbe->dip), 227 "statistics", "net", KSTAT_TYPE_NAMED, 228 sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0); 229 230 if (ks == NULL) { 231 ixgbe_error(ixgbe, 232 "Could not create kernel statistics"); 233 return (IXGBE_FAILURE); 234 } 235 236 ixgbe->ixgbe_ks = ks; 237 238 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data; 239 240 /* 241 * Initialize all the statistics. 242 */ 243 kstat_named_init(&ixgbe_ks->link_speed, "link_speed", 244 KSTAT_DATA_UINT64); 245 kstat_named_init(&ixgbe_ks->reset_count, "reset_count", 246 KSTAT_DATA_UINT64); 247 248 #ifdef IXGBE_DEBUG 249 kstat_named_init(&ixgbe_ks->rx_frame_error, "rx_frame_error", 250 KSTAT_DATA_UINT64); 251 kstat_named_init(&ixgbe_ks->rx_cksum_error, "rx_cksum_error", 252 KSTAT_DATA_UINT64); 253 kstat_named_init(&ixgbe_ks->rx_exceed_pkt, "rx_exceed_pkt", 254 KSTAT_DATA_UINT64); 255 kstat_named_init(&ixgbe_ks->tx_overload, "tx_overload", 256 KSTAT_DATA_UINT64); 257 kstat_named_init(&ixgbe_ks->tx_fail_no_tbd, "tx_fail_no_tbd", 258 KSTAT_DATA_UINT64); 259 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb", 260 KSTAT_DATA_UINT64); 261 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind", 262 KSTAT_DATA_UINT64); 263 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule", 264 KSTAT_DATA_UINT64); 265 #endif 266 267 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd", 268 KSTAT_DATA_UINT64); 269 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd", 270 KSTAT_DATA_UINT64); 271 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd", 272 KSTAT_DATA_UINT64); 273 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd", 274 KSTAT_DATA_UINT64); 275 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)", 276 KSTAT_DATA_UINT64); 277 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)", 278 KSTAT_DATA_UINT64); 279 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)", 280 KSTAT_DATA_UINT64); 281 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)", 282 KSTAT_DATA_UINT64); 283 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)", 284 KSTAT_DATA_UINT64); 285 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)", 286 KSTAT_DATA_UINT64); 287 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)", 288 KSTAT_DATA_UINT64); 289 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)", 290 KSTAT_DATA_UINT64); 291 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)", 292 KSTAT_DATA_UINT64); 293 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)", 294 KSTAT_DATA_UINT64); 295 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)", 296 KSTAT_DATA_UINT64); 297 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)", 298 KSTAT_DATA_UINT64); 299 300 kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]", 301 KSTAT_DATA_UINT64); 302 kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]", 303 KSTAT_DATA_UINT64); 304 kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]", 305 KSTAT_DATA_UINT64); 306 kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]", 307 KSTAT_DATA_UINT64); 308 kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]", 309 KSTAT_DATA_UINT64); 310 kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]", 311 KSTAT_DATA_UINT64); 312 kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]", 313 KSTAT_DATA_UINT64); 314 kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]", 315 KSTAT_DATA_UINT64); 316 kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]", 317 KSTAT_DATA_UINT64); 318 kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]", 319 KSTAT_DATA_UINT64); 320 kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]", 321 KSTAT_DATA_UINT64); 322 kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]", 323 KSTAT_DATA_UINT64); 324 kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]", 325 KSTAT_DATA_UINT64); 326 kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]", 327 KSTAT_DATA_UINT64); 328 kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]", 329 KSTAT_DATA_UINT64); 330 kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]", 331 KSTAT_DATA_UINT64); 332 333 kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]", 334 KSTAT_DATA_UINT64); 335 kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]", 336 KSTAT_DATA_UINT64); 337 kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]", 338 KSTAT_DATA_UINT64); 339 kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]", 340 KSTAT_DATA_UINT64); 341 kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]", 342 KSTAT_DATA_UINT64); 343 kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]", 344 KSTAT_DATA_UINT64); 345 kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]", 346 KSTAT_DATA_UINT64); 347 kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]", 348 KSTAT_DATA_UINT64); 349 kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]", 350 KSTAT_DATA_UINT64); 351 kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]", 352 KSTAT_DATA_UINT64); 353 kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]", 354 KSTAT_DATA_UINT64); 355 kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]", 356 KSTAT_DATA_UINT64); 357 kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]", 358 KSTAT_DATA_UINT64); 359 kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]", 360 KSTAT_DATA_UINT64); 361 kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]", 362 KSTAT_DATA_UINT64); 363 kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]", 364 KSTAT_DATA_UINT64); 365 366 kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]", 367 KSTAT_DATA_UINT64); 368 kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]", 369 KSTAT_DATA_UINT64); 370 kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]", 371 KSTAT_DATA_UINT64); 372 kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]", 373 KSTAT_DATA_UINT64); 374 kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]", 375 KSTAT_DATA_UINT64); 376 kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]", 377 KSTAT_DATA_UINT64); 378 kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]", 379 KSTAT_DATA_UINT64); 380 kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]", 381 KSTAT_DATA_UINT64); 382 kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]", 383 KSTAT_DATA_UINT64); 384 kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]", 385 KSTAT_DATA_UINT64); 386 kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]", 387 KSTAT_DATA_UINT64); 388 kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]", 389 KSTAT_DATA_UINT64); 390 kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]", 391 KSTAT_DATA_UINT64); 392 kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]", 393 KSTAT_DATA_UINT64); 394 kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]", 395 KSTAT_DATA_UINT64); 396 kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]", 397 KSTAT_DATA_UINT64); 398 399 kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]", 400 KSTAT_DATA_UINT64); 401 kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]", 402 KSTAT_DATA_UINT64); 403 kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]", 404 KSTAT_DATA_UINT64); 405 kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]", 406 KSTAT_DATA_UINT64); 407 kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]", 408 KSTAT_DATA_UINT64); 409 kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]", 410 KSTAT_DATA_UINT64); 411 kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]", 412 KSTAT_DATA_UINT64); 413 kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]", 414 KSTAT_DATA_UINT64); 415 kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]", 416 KSTAT_DATA_UINT64); 417 kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]", 418 KSTAT_DATA_UINT64); 419 kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]", 420 KSTAT_DATA_UINT64); 421 kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]", 422 KSTAT_DATA_UINT64); 423 kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]", 424 KSTAT_DATA_UINT64); 425 kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]", 426 KSTAT_DATA_UINT64); 427 kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]", 428 KSTAT_DATA_UINT64); 429 kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]", 430 KSTAT_DATA_UINT64); 431 432 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard", 433 KSTAT_DATA_UINT64); 434 kstat_named_init(&ixgbe_ks->mpc, "missed_packets", 435 KSTAT_DATA_UINT64); 436 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault", 437 KSTAT_DATA_UINT64); 438 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault", 439 KSTAT_DATA_UINT64); 440 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err", 441 KSTAT_DATA_UINT64); 442 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd", 443 KSTAT_DATA_UINT64); 444 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd", 445 KSTAT_DATA_UINT64); 446 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd", 447 KSTAT_DATA_UINT64); 448 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd", 449 KSTAT_DATA_UINT64); 450 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize", 451 KSTAT_DATA_UINT64); 452 kstat_named_init(&ixgbe_ks->rfc, "recv_fragment", 453 KSTAT_DATA_UINT64); 454 kstat_named_init(&ixgbe_ks->roc, "recv_oversize", 455 KSTAT_DATA_UINT64); 456 kstat_named_init(&ixgbe_ks->rjc, "recv_jabber", 457 KSTAT_DATA_UINT64); 458 kstat_named_init(&ixgbe_ks->rnbc, "recv_no_buffer", 459 KSTAT_DATA_UINT64); 460 kstat_named_init(&ixgbe_ks->lroc, "lro_pkt_count", 461 KSTAT_DATA_UINT64); 462 /* 463 * Function to provide kernel stat update on demand 464 */ 465 ks->ks_update = ixgbe_update_stats; 466 467 ks->ks_private = (void *)ixgbe; 468 469 /* 470 * Add kstat to systems kstat chain 471 */ 472 kstat_install(ks); 473 474 return (IXGBE_SUCCESS); 475 } 476 477 /* 478 * Retrieve a value for one of the statistics. 479 */ 480 int 481 ixgbe_m_stat(void *arg, uint_t stat, uint64_t *val) 482 { 483 ixgbe_t *ixgbe = (ixgbe_t *)arg; 484 struct ixgbe_hw *hw = &ixgbe->hw; 485 ixgbe_stat_t *ixgbe_ks; 486 int i; 487 488 ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data; 489 490 mutex_enter(&ixgbe->gen_lock); 491 492 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) { 493 mutex_exit(&ixgbe->gen_lock); 494 return (ECANCELED); 495 } 496 497 switch (stat) { 498 case MAC_STAT_IFSPEED: 499 *val = ixgbe->link_speed * 1000000ull; 500 break; 501 502 case MAC_STAT_MULTIRCV: 503 ixgbe_ks->mprc.value.ui64 += 504 IXGBE_READ_REG(hw, IXGBE_MPRC); 505 *val = ixgbe_ks->mprc.value.ui64; 506 break; 507 508 case MAC_STAT_BRDCSTRCV: 509 ixgbe_ks->bprc.value.ui64 += 510 IXGBE_READ_REG(hw, IXGBE_BPRC); 511 *val = ixgbe_ks->bprc.value.ui64; 512 break; 513 514 case MAC_STAT_MULTIXMT: 515 ixgbe_ks->mptc.value.ui64 += 516 IXGBE_READ_REG(hw, IXGBE_MPTC); 517 *val = ixgbe_ks->mptc.value.ui64; 518 break; 519 520 case MAC_STAT_BRDCSTXMT: 521 ixgbe_ks->bptc.value.ui64 += 522 IXGBE_READ_REG(hw, IXGBE_BPTC); 523 *val = ixgbe_ks->bptc.value.ui64; 524 break; 525 526 case MAC_STAT_NORCVBUF: 527 for (i = 0; i < 8; i++) { 528 ixgbe_ks->rnbc.value.ui64 += 529 IXGBE_READ_REG(hw, IXGBE_RNBC(i)); 530 } 531 *val = ixgbe_ks->rnbc.value.ui64; 532 break; 533 534 case MAC_STAT_IERRORS: 535 ixgbe_ks->crcerrs.value.ui64 += 536 IXGBE_READ_REG(hw, IXGBE_CRCERRS); 537 ixgbe_ks->illerrc.value.ui64 += 538 IXGBE_READ_REG(hw, IXGBE_ILLERRC); 539 ixgbe_ks->errbc.value.ui64 += 540 IXGBE_READ_REG(hw, IXGBE_ERRBC); 541 ixgbe_ks->rlec.value.ui64 += 542 IXGBE_READ_REG(hw, IXGBE_RLEC); 543 *val = ixgbe_ks->crcerrs.value.ui64 + 544 ixgbe_ks->illerrc.value.ui64 + 545 ixgbe_ks->errbc.value.ui64 + 546 ixgbe_ks->rlec.value.ui64; 547 break; 548 549 case MAC_STAT_RBYTES: 550 ixgbe_ks->tor.value.ui64 = 0; 551 for (i = 0; i < 16; i++) { 552 ixgbe_ks->qbrc[i].value.ui64 += 553 IXGBE_READ_REG(hw, IXGBE_QBRC(i)); 554 ixgbe_ks->tor.value.ui64 += 555 ixgbe_ks->qbrc[i].value.ui64; 556 } 557 *val = ixgbe_ks->tor.value.ui64; 558 break; 559 560 case MAC_STAT_OBYTES: 561 ixgbe_ks->tot.value.ui64 = 0; 562 for (i = 0; i < 16; i++) { 563 switch (hw->mac.type) { 564 case ixgbe_mac_82598EB: 565 ixgbe_ks->qbtc[i].value.ui64 += 566 IXGBE_READ_REG(hw, IXGBE_QBTC(i)); 567 break; 568 569 case ixgbe_mac_82599EB: 570 case ixgbe_mac_X540: 571 case ixgbe_mac_X550: 572 case ixgbe_mac_X550EM_x: 573 ixgbe_ks->qbtc[i].value.ui64 += 574 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); 575 ixgbe_ks->qbtc[i].value.ui64 += 576 ((uint64_t)((IXGBE_READ_REG(hw, 577 IXGBE_QBTC_H(i))) & 0xF) << 32); 578 break; 579 580 default: 581 break; 582 } 583 ixgbe_ks->tot.value.ui64 += 584 ixgbe_ks->qbtc[i].value.ui64; 585 } 586 *val = ixgbe_ks->tot.value.ui64; 587 break; 588 589 case MAC_STAT_IPACKETS: 590 ixgbe_ks->tpr.value.ui64 += 591 IXGBE_READ_REG(hw, IXGBE_TPR); 592 *val = ixgbe_ks->tpr.value.ui64; 593 break; 594 595 case MAC_STAT_OPACKETS: 596 ixgbe_ks->tpt.value.ui64 += 597 IXGBE_READ_REG(hw, IXGBE_TPT); 598 *val = ixgbe_ks->tpt.value.ui64; 599 break; 600 601 /* RFC 1643 stats */ 602 case ETHER_STAT_FCS_ERRORS: 603 ixgbe_ks->crcerrs.value.ui64 += 604 IXGBE_READ_REG(hw, IXGBE_CRCERRS); 605 *val = ixgbe_ks->crcerrs.value.ui64; 606 break; 607 608 case ETHER_STAT_TOOLONG_ERRORS: 609 ixgbe_ks->roc.value.ui64 += 610 IXGBE_READ_REG(hw, IXGBE_ROC); 611 *val = ixgbe_ks->roc.value.ui64; 612 break; 613 614 case ETHER_STAT_MACRCV_ERRORS: 615 ixgbe_ks->crcerrs.value.ui64 += 616 IXGBE_READ_REG(hw, IXGBE_CRCERRS); 617 ixgbe_ks->illerrc.value.ui64 += 618 IXGBE_READ_REG(hw, IXGBE_ILLERRC); 619 ixgbe_ks->errbc.value.ui64 += 620 IXGBE_READ_REG(hw, IXGBE_ERRBC); 621 ixgbe_ks->rlec.value.ui64 += 622 IXGBE_READ_REG(hw, IXGBE_RLEC); 623 *val = ixgbe_ks->crcerrs.value.ui64 + 624 ixgbe_ks->illerrc.value.ui64 + 625 ixgbe_ks->errbc.value.ui64 + 626 ixgbe_ks->rlec.value.ui64; 627 break; 628 629 /* MII/GMII stats */ 630 case ETHER_STAT_XCVR_ADDR: 631 /* The Internal PHY's MDI address for each MAC is 1 */ 632 *val = 1; 633 break; 634 635 case ETHER_STAT_XCVR_ID: 636 *val = hw->phy.id; 637 break; 638 639 case ETHER_STAT_XCVR_INUSE: 640 switch (ixgbe->link_speed) { 641 case IXGBE_LINK_SPEED_1GB_FULL: 642 *val = 643 (hw->phy.media_type == ixgbe_media_type_copper) ? 644 XCVR_1000T : XCVR_1000X; 645 break; 646 case IXGBE_LINK_SPEED_100_FULL: 647 *val = (hw->phy.media_type == ixgbe_media_type_copper) ? 648 XCVR_100T2 : XCVR_100X; 649 break; 650 default: 651 *val = XCVR_NONE; 652 break; 653 } 654 break; 655 656 case ETHER_STAT_CAP_10GFDX: 657 *val = 1; 658 break; 659 660 case ETHER_STAT_CAP_1000FDX: 661 *val = 1; 662 break; 663 664 case ETHER_STAT_CAP_100FDX: 665 *val = 1; 666 break; 667 668 case ETHER_STAT_CAP_ASMPAUSE: 669 *val = ixgbe->param_asym_pause_cap; 670 break; 671 672 case ETHER_STAT_CAP_PAUSE: 673 *val = ixgbe->param_pause_cap; 674 break; 675 676 case ETHER_STAT_CAP_AUTONEG: 677 *val = 1; 678 break; 679 680 case ETHER_STAT_ADV_CAP_10GFDX: 681 *val = ixgbe->param_adv_10000fdx_cap; 682 break; 683 684 case ETHER_STAT_ADV_CAP_1000FDX: 685 *val = ixgbe->param_adv_1000fdx_cap; 686 break; 687 688 case ETHER_STAT_ADV_CAP_100FDX: 689 *val = ixgbe->param_adv_100fdx_cap; 690 break; 691 692 case ETHER_STAT_ADV_CAP_ASMPAUSE: 693 *val = ixgbe->param_adv_asym_pause_cap; 694 break; 695 696 case ETHER_STAT_ADV_CAP_PAUSE: 697 *val = ixgbe->param_adv_pause_cap; 698 break; 699 700 case ETHER_STAT_ADV_CAP_AUTONEG: 701 *val = ixgbe->param_adv_autoneg_cap; 702 break; 703 704 case ETHER_STAT_LP_CAP_10GFDX: 705 *val = ixgbe->param_lp_10000fdx_cap; 706 break; 707 708 case ETHER_STAT_LP_CAP_1000FDX: 709 *val = ixgbe->param_lp_1000fdx_cap; 710 break; 711 712 case ETHER_STAT_LP_CAP_100FDX: 713 *val = ixgbe->param_lp_100fdx_cap; 714 break; 715 716 case ETHER_STAT_LP_CAP_ASMPAUSE: 717 *val = ixgbe->param_lp_asym_pause_cap; 718 break; 719 720 case ETHER_STAT_LP_CAP_PAUSE: 721 *val = ixgbe->param_lp_pause_cap; 722 break; 723 724 case ETHER_STAT_LP_CAP_AUTONEG: 725 *val = ixgbe->param_lp_autoneg_cap; 726 break; 727 728 case ETHER_STAT_LINK_ASMPAUSE: 729 *val = ixgbe->param_asym_pause_cap; 730 break; 731 732 case ETHER_STAT_LINK_PAUSE: 733 *val = ixgbe->param_pause_cap; 734 break; 735 736 case ETHER_STAT_LINK_AUTONEG: 737 *val = ixgbe->param_adv_autoneg_cap; 738 break; 739 740 case ETHER_STAT_LINK_DUPLEX: 741 *val = ixgbe->link_duplex; 742 break; 743 744 case ETHER_STAT_TOOSHORT_ERRORS: 745 ixgbe_ks->ruc.value.ui64 += 746 IXGBE_READ_REG(hw, IXGBE_RUC); 747 *val = ixgbe_ks->ruc.value.ui64; 748 break; 749 750 case ETHER_STAT_CAP_REMFAULT: 751 *val = ixgbe->param_rem_fault; 752 break; 753 754 case ETHER_STAT_ADV_REMFAULT: 755 *val = ixgbe->param_adv_rem_fault; 756 break; 757 758 case ETHER_STAT_LP_REMFAULT: 759 *val = ixgbe->param_lp_rem_fault; 760 break; 761 762 case ETHER_STAT_JABBER_ERRORS: 763 ixgbe_ks->rjc.value.ui64 += 764 IXGBE_READ_REG(hw, IXGBE_RJC); 765 *val = ixgbe_ks->rjc.value.ui64; 766 break; 767 768 default: 769 mutex_exit(&ixgbe->gen_lock); 770 return (ENOTSUP); 771 } 772 773 mutex_exit(&ixgbe->gen_lock); 774 775 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) { 776 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_DEGRADED); 777 return (EIO); 778 } 779 780 return (0); 781 } 782 783 /* 784 * Retrieve a value for one of the statistics for a particular rx ring 785 */ 786 int 787 ixgbe_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val) 788 { 789 ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)rh; 790 ixgbe_t *ixgbe = rx_ring->ixgbe; 791 792 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) { 793 return (ECANCELED); 794 } 795 796 switch (stat) { 797 case MAC_STAT_RBYTES: 798 *val = rx_ring->stat_rbytes; 799 break; 800 801 case MAC_STAT_IPACKETS: 802 *val = rx_ring->stat_ipackets; 803 break; 804 805 default: 806 *val = 0; 807 return (ENOTSUP); 808 } 809 810 return (0); 811 } 812 813 /* 814 * Retrieve a value for one of the statistics for a particular tx ring 815 */ 816 int 817 ixgbe_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val) 818 { 819 ixgbe_tx_ring_t *tx_ring = (ixgbe_tx_ring_t *)rh; 820 ixgbe_t *ixgbe = tx_ring->ixgbe; 821 822 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) { 823 return (ECANCELED); 824 } 825 826 switch (stat) { 827 case MAC_STAT_OBYTES: 828 *val = tx_ring->stat_obytes; 829 break; 830 831 case MAC_STAT_OPACKETS: 832 *val = tx_ring->stat_opackets; 833 break; 834 835 default: 836 *val = 0; 837 return (ENOTSUP); 838 } 839 840 return (0); 841 }