1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 */
29 /*
30 * Copyright (c) 2012, Joyent, Inc. All rights reserved.
31 * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
32 */
33
34 #ifndef _IXGBE_OSDEP_H
35 #define _IXGBE_OSDEP_H
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 #include <sys/types.h>
42 #include <sys/byteorder.h>
43 #include <sys/conf.h>
44 #include <sys/debug.h>
45 #include <sys/stropts.h>
46 #include <sys/stream.h>
47 #include <sys/strlog.h>
48 #include <sys/kmem.h>
49 #include <sys/stat.h>
50 #include <sys/kstat.h>
51 #include <sys/modctl.h>
52 #include <sys/errno.h>
53 #include <sys/ddi.h>
54 #include <sys/dditypes.h>
55 #include <sys/sunddi.h>
56 #include <sys/pci.h>
57 #include <sys/atomic.h>
58 #include <sys/note.h>
59 #include "ixgbe_debug.h"
60
61 /* Cheesy hack for EWARN() */
62 #define EWARN(H, W, S) cmn_err(CE_NOTE, W)
63
64 /* function declarations */
65 struct ixgbe_hw;
66 uint16_t ixgbe_read_pci_cfg(struct ixgbe_hw *, uint32_t);
67 void ixgbe_write_pci_cfg(struct ixgbe_hw *, uint32_t, uint32_t);
68
69 #define usec_delay(x) drv_usecwait(x)
70 #define msec_delay(x) drv_usecwait(x * 1000)
71
72 #define OS_DEP(hw) ((struct ixgbe_osdep *)((hw)->back))
73
74 #define false B_FALSE
75 #define true B_TRUE
76 #define FALSE B_FALSE
77 #define TRUE B_TRUE
78
79 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
80 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
81 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
82 #define PCI_COMMAND_REGISTER 0x04
83 #define PCI_EX_CONF_CAP 0xE0
84 #define SPEED_10GB 10000
85 #define SPEED_1GB 1000
86 #define SPEED_100 100
87 #define FULL_DUPLEX 2
88
89 #define IXGBE_WRITE_FLUSH(a) (void) IXGBE_READ_REG(a, IXGBE_STATUS)
90
91 #define IXGBE_WRITE_REG(a, reg, value) \
92 ddi_put32((OS_DEP(a))->reg_handle, \
93 (uint32_t *)((uintptr_t)(a)->hw_addr + reg), (value))
94
95 #define IXGBE_WRITE_REG_ARRAY(a, reg, index, value) \
96 IXGBE_WRITE_REG(a, ((reg) + ((index) << 2)), (value))
97
98 #define IXGBE_READ_REG(a, reg) \
99 ddi_get32((OS_DEP(a))->reg_handle, \
100 (uint32_t *)((uintptr_t)(a)->hw_addr + reg))
101
102 #define IXGBE_READ_REG_ARRAY(a, reg, index) \
103 IXGBE_READ_REG(a, ((reg) + ((index) << 2)))
104
105 #define msec_delay_irq msec_delay
106 #define IXGBE_HTONL htonl
107 #define IXGBE_NTOHL ntohl
108 #define IXGBE_NTOHS ntohs
109
110 #ifdef _BIG_ENDIAN
111 #define IXGBE_CPU_TO_LE32 BSWAP_32
112 #define IXGBE_LE32_TO_CPUS BSWAP_32
113 #define IXGBE_CPU_TO_BE16 (x)
114 #define IXGBE_CPU_TO_BE32 (x)
115 #else
116 #define IXGBE_CPU_TO_LE32(x) (x)
117 #define IXGBE_LE32_TO_CPUS(x) (x)
118 #define IXGBE_CPU_TO_BE16 BSWAP_16
119 #define IXGBE_CPU_TO_BE32 BSWAP_32
120 #endif /* _BIG_ENDIAN */
121
122 #define UNREFERENCED_PARAMETER(x) _NOTE(ARGUNUSED(x))
123 #define UNREFERENCED_1PARAMETER(_p) UNREFERENCED_PARAMETER(_p)
124 #define UNREFERENCED_2PARAMETER(_p, _q) _NOTE(ARGUNUSED(_p, _q))
125 #define UNREFERENCED_3PARAMETER(_p, _q, _r) _NOTE(ARGUNUSED(_p, _q, _r))
126 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) _NOTE(ARGUNUSED(_p, _q,_r, _s))
127
128
129
130 typedef int8_t s8;
131 typedef int16_t s16;
132 typedef int32_t s32;
133 typedef int64_t s64;
134 typedef uint8_t u8;
135 typedef uint16_t u16;
136 typedef uint32_t u32;
137 typedef uint64_t u64;
138 typedef boolean_t bool;
139
140 /* shared code requires this */
141 #define __le16 u16
142 #define __le32 u32
143 #define __le64 u64
144 #define __be16 u16
145 #define __be32 u32
146 #define __be64 u64
147
148 struct ixgbe_osdep {
149 ddi_acc_handle_t reg_handle;
150 ddi_acc_handle_t cfg_handle;
151 struct ixgbe *ixgbe;
152 };
153
154 #ifdef __cplusplus
155 }
156 #endif
157
158 #endif /* _IXGBE_OSDEP_H */