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Initial modifications using the code changes present between
the LSI source code for FreeBSD drivers. Specifically the changes
between from mpslsi-source-17.00.00.00 -> mpslsi-source-03.00.00.00.
This mainly involves using a different scatter/gather element in
frame setup.
*** 18,29 ****
*
* CDDL HEADER END
*/
/*
! * Copyright (c) 2000 to 2009, LSI Corporation.
! * All rights reserved.
*
* Redistribution and use in source and binary forms of all code within
* this file that is exclusively owned by LSI, with or without
* modification, is permitted provided that, in addition to the CDDL 1.0
* License requirements, the following conditions are met:
--- 18,28 ----
*
* CDDL HEADER END
*/
/*
! * Copyright (c) 2000-2012 LSI Corporation.
*
* Redistribution and use in source and binary forms of all code within
* this file that is exclusively owned by LSI, with or without
* modification, is permitted provided that, in addition to the CDDL 1.0
* License requirements, the following conditions are met:
*** 49,59 ****
/*
* Name: mpi2_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: October 11, 2006
*
! * mpi2_ioc.h Version: 02.00.12
*
* Version History
* ---------------
*
* Date Version Description
--- 48,63 ----
/*
* Name: mpi2_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: October 11, 2006
*
! * mpi2_ioc.h Version: 02.00.xx
! *
! * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
! * prefix are for use only on MPI v2.5 products, and must not be used
! * with MPI v2.0 products. Unless otherwise noted, names beginning with
! * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
*** 130,139 ****
--- 134,160 ----
* Event.
* Added new event: SAS PHY Counter.
* 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
* Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Added new product id family for 2208.
+ * 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
+ * Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
+ * Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
+ * Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
+ * Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
+ * Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
+ * Added Host Based Discovery Phy Event data.
+ * Added defines for ProductID Product field
+ * (MPI2_FW_HEADER_PID_).
+ * Modified values for SAS ProductID Family
+ * (MPI2_FW_HEADER_PID_FAMILY_).
+ * 02-10-10 02.00.14 Added SAS Quiesce Event structure and defines.
+ * Added PowerManagementControl Request structures and
+ * defines.
+ * 05-12-10 02.00.15 Marked Task Set Full Event as obsolete.
+ * Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
+ * 11-10-10 02.00.16 Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_IOC_H
#define MPI2_IOC_H
*** 162,173 ****
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 MsgVersion; /* 0x0C */
U16 HeaderVersion; /* 0x0E */
U32 Reserved5; /* 0x10 */
! U32 Reserved6; /* 0x14 */
! U16 Reserved7; /* 0x18 */
U16 SystemRequestFrameSize; /* 0x1A */
U16 ReplyDescriptorPostQueueDepth; /* 0x1C */
U16 ReplyFreeQueueDepth; /* 0x1E */
U32 SenseBufferAddressHigh; /* 0x20 */
U32 SystemReplyAddressHigh; /* 0x24 */
--- 183,196 ----
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 MsgVersion; /* 0x0C */
U16 HeaderVersion; /* 0x0E */
U32 Reserved5; /* 0x10 */
! U16 Reserved6; /* 0x14 */
! U8 Reserved7; /* 0x16 */
! U8 HostMSIxVectors; /* 0x17 */
! U16 Reserved8; /* 0x18 */
U16 SystemRequestFrameSize; /* 0x1A */
U16 ReplyDescriptorPostQueueDepth; /* 0x1C */
U16 ReplyFreeQueueDepth; /* 0x1E */
U32 SenseBufferAddressHigh; /* 0x20 */
U32 SystemReplyAddressHigh; /* 0x24 */
*** 258,268 ****
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 MaxChainDepth; /* 0x14 */
U8 WhoInit; /* 0x15 */
U8 NumberOfPorts; /* 0x16 */
! U8 Reserved2; /* 0x17 */
U16 RequestCredit; /* 0x18 */
U16 ProductID; /* 0x1A */
U32 IOCCapabilities; /* 0x1C */
MPI2_VERSION_UNION FWVersion; /* 0x20 */
U16 IOCRequestFrameSize; /* 0x24 */
--- 281,291 ----
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 MaxChainDepth; /* 0x14 */
U8 WhoInit; /* 0x15 */
U8 NumberOfPorts; /* 0x16 */
! U8 MaxMSIxVectors; /* 0x17 */
U16 RequestCredit; /* 0x18 */
U16 ProductID; /* 0x1A */
U32 IOCCapabilities; /* 0x1C */
MPI2_VERSION_UNION FWVersion; /* 0x20 */
U16 IOCRequestFrameSize; /* 0x24 */
*** 276,286 ****
U16 MaxReplyDescriptorPostQueueDepth; /* 0x34 */
U8 ReplyFrameSize; /* 0x36 */
U8 MaxVolumes; /* 0x37 */
U16 MaxDevHandle; /* 0x38 */
U16 MaxPersistentEntries; /* 0x3A */
! U32 Reserved4; /* 0x3C */
} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
/* MsgVersion */
#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
--- 299,310 ----
U16 MaxReplyDescriptorPostQueueDepth; /* 0x34 */
U8 ReplyFrameSize; /* 0x36 */
U8 MaxVolumes; /* 0x37 */
U16 MaxDevHandle; /* 0x38 */
U16 MaxPersistentEntries; /* 0x3A */
! U16 MinDevHandle; /* 0x3C */
! U16 Reserved4; /* 0x3E */
} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
/* MsgVersion */
#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
*** 312,321 ****
--- 336,347 ----
/* defines for WhoInit field are after the IOCInit Request */
/* ProductID field uses MPI2_FW_HEADER_PID_ */
/* IOCCapabilities */
+ #define MPI25_IOCFACTS_CAPABILITY_FAST_PATH_CAPABLE (0x00020000)
+ #define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY (0x00010000)
#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX (0x00008000)
#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR (0x00004000)
#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000)
#define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID (0x00001000)
#define MPI2_IOCFACTS_CAPABILITY_TLR (0x00000800)
*** 481,491 ****
/* Event */
#define MPI2_EVENT_LOG_DATA (0x0001)
#define MPI2_EVENT_STATE_CHANGE (0x0002)
#define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005)
#define MPI2_EVENT_EVENT_CHANGE (0x000A)
! #define MPI2_EVENT_TASK_SET_FULL (0x000E)
#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F)
#define MPI2_EVENT_IR_OPERATION_STATUS (0x0014)
#define MPI2_EVENT_SAS_DISCOVERY (0x0016)
#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017)
#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018)
--- 507,517 ----
/* Event */
#define MPI2_EVENT_LOG_DATA (0x0001)
#define MPI2_EVENT_STATE_CHANGE (0x0002)
#define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005)
#define MPI2_EVENT_EVENT_CHANGE (0x000A)
! #define MPI2_EVENT_TASK_SET_FULL (0x000E) /* obsolete */
#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F)
#define MPI2_EVENT_IR_OPERATION_STATUS (0x0014)
#define MPI2_EVENT_SAS_DISCOVERY (0x0016)
#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017)
#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018)
*** 496,505 ****
--- 522,533 ----
#define MPI2_EVENT_IR_PHYSICAL_DISK (0x001F)
#define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST (0x0020)
#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021)
#define MPI2_EVENT_SAS_PHY_COUNTER (0x0022)
#define MPI2_EVENT_GPIO_INTERRUPT (0x0023)
+ #define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY (0x0024)
+ #define MPI2_EVENT_SAS_QUIESCE (0x0025)
/* Log Entry Added Event data */
/* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
*** 541,550 ****
--- 569,579 ----
MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
Mpi2EventDataHardResetReceived_t,
MPI2_POINTER pMpi2EventDataHardResetReceived_t;
/* Task Set Full Event data */
+ /* this event is obsolete */
typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
{
U16 DevHandle; /* 0x00 */
U16 CurrentDepth; /* 0x02 */
*** 837,846 ****
--- 866,876 ----
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
Mpi2EventDataSasTopologyChangeList_t,
MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
/* values for the ExpStatus field */
+ #define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00)
#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01)
#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02)
#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03)
#define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04)
*** 854,866 ****
--- 884,898 ----
#define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01)
#define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02)
#define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03)
#define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04)
#define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05)
+ #define MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5 (0x08)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0 (0x09)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A)
+ #define MPI25_EVENT_SAS_TOPO_LR_RATE_12_0 (0x0B)
/* values for the PhyStatus field */
#define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT (0x80)
#define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE (0x10)
/* values for the PhyStatus ReasonCode sub-field */
*** 921,930 ****
--- 953,1019 ----
/* use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the TimeUnits field */
/* use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the ThresholdFlags field */
+ /* SAS Quiesce Event data */
+
+ typedef struct _MPI2_EVENT_DATA_SAS_QUIESCE
+ {
+ U8 ReasonCode; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U16 Reserved2; /* 0x02 */
+ U32 Reserved3; /* 0x04 */
+ } MPI2_EVENT_DATA_SAS_QUIESCE,
+ MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_QUIESCE,
+ Mpi2EventDataSasQuiesce_t, MPI2_POINTER pMpi2EventDataSasQuiesce_t;
+
+ /* SAS Quiesce Event data ReasonCode values */
+ #define MPI2_EVENT_SAS_QUIESCE_RC_STARTED (0x01)
+ #define MPI2_EVENT_SAS_QUIESCE_RC_COMPLETED (0x02)
+
+
+ /* Host Based Discovery Phy Event data */
+
+ typedef struct _MPI2_EVENT_HBD_PHY_SAS
+ {
+ U8 Flags; /* 0x00 */
+ U8 NegotiatedLinkRate; /* 0x01 */
+ U8 PhyNum; /* 0x02 */
+ U8 PhysicalPort; /* 0x03 */
+ U32 Reserved1; /* 0x04 */
+ U8 InitialFrame[28]; /* 0x08 */
+ } MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS,
+ Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t;
+
+ /* values for the Flags field */
+ #define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID (0x02)
+ #define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME (0x01)
+
+ /* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for the NegotiatedLinkRate field */
+
+ typedef union _MPI2_EVENT_HBD_DESCRIPTOR
+ {
+ MPI2_EVENT_HBD_PHY_SAS Sas;
+ } MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR,
+ Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t;
+
+ typedef struct _MPI2_EVENT_DATA_HBD_PHY
+ {
+ U8 DescriptorType; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U16 Reserved2; /* 0x02 */
+ U32 Reserved3; /* 0x04 */
+ MPI2_EVENT_HBD_DESCRIPTOR Descriptor; /* 0x08 */
+ } MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY,
+ Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t;
+
+ /* values for the DescriptorType field */
+ #define MPI2_EVENT_HBD_DT_SAS (0x01)
+
+
+
/****************************************************************************
* EventAck message
****************************************************************************/
/* EventAck Request message */
*** 967,977 ****
/****************************************************************************
* FWDownload message
****************************************************************************/
! /* FWDownload Request message */
typedef struct _MPI2_FW_DOWNLOAD_REQUEST
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
--- 1056,1066 ----
/****************************************************************************
* FWDownload message
****************************************************************************/
! /* MPI v2.0 FWDownload Request message */
typedef struct _MPI2_FW_DOWNLOAD_REQUEST
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
*** 994,1006 ****
#define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02)
#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
! /* FWDownload TransactionContext Element */
typedef struct _MPI2_FW_DOWNLOAD_TCSGE
{
U8 Reserved1; /* 0x00 */
U8 ContextSize; /* 0x01 */
U8 DetailsLength; /* 0x02 */
--- 1083,1097 ----
#define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02)
#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
+ #define MPI2_FW_DOWNLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
+ #define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)
! /* MPI v2.0 FWDownload TransactionContext Element */
typedef struct _MPI2_FW_DOWNLOAD_TCSGE
{
U8 Reserved1; /* 0x00 */
U8 ContextSize; /* 0x01 */
U8 DetailsLength; /* 0x02 */
*** 1009,1018 ****
--- 1100,1133 ----
U32 ImageOffset; /* 0x08 */
U32 ImageSize; /* 0x0C */
} MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
+
+ /* MPI v2.5 FWDownload Request message */
+ typedef struct _MPI25_FW_DOWNLOAD_REQUEST
+ {
+ U8 ImageType; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U8 ChainOffset; /* 0x02 */
+ U8 Function; /* 0x03 */
+ U16 Reserved2; /* 0x04 */
+ U8 Reserved3; /* 0x06 */
+ U8 MsgFlags; /* 0x07 */
+ U8 VP_ID; /* 0x08 */
+ U8 VF_ID; /* 0x09 */
+ U16 Reserved4; /* 0x0A */
+ U32 TotalImageSize; /* 0x0C */
+ U32 Reserved5; /* 0x10 */
+ U32 Reserved6; /* 0x14 */
+ U32 ImageOffset; /* 0x18 */
+ U32 ImageSize; /* 0x1C */
+ MPI25_SGE_IO_UNION SGL; /* 0x20 */
+ } MPI25_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI25_FW_DOWNLOAD_REQUEST,
+ Mpi25FWDownloadRequest, MPI2_POINTER pMpi25FWDownloadRequest;
+
+
/* FWDownload Reply message */
typedef struct _MPI2_FW_DOWNLOAD_REPLY
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
*** 1033,1043 ****
/****************************************************************************
* FWUpload message
****************************************************************************/
! /* FWUpload Request message */
typedef struct _MPI2_FW_UPLOAD_REQUEST
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
--- 1148,1158 ----
/****************************************************************************
* FWUpload message
****************************************************************************/
! /* MPI v2.0 FWUpload Request message */
typedef struct _MPI2_FW_UPLOAD_REQUEST
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
*** 1063,1072 ****
--- 1178,1188 ----
#define MPI2_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
+ /* MPI v2.0 FWUpload TransactionContext Element */
typedef struct _MPI2_FW_UPLOAD_TCSGE
{
U8 Reserved1; /* 0x00 */
U8 ContextSize; /* 0x01 */
U8 DetailsLength; /* 0x02 */
*** 1075,1084 ****
--- 1191,1224 ----
U32 ImageOffset; /* 0x08 */
U32 ImageSize; /* 0x0C */
} MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
+
+ /* MPI v2.5 FWUpload Request message */
+ typedef struct _MPI25_FW_UPLOAD_REQUEST
+ {
+ U8 ImageType; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U8 ChainOffset; /* 0x02 */
+ U8 Function; /* 0x03 */
+ U16 Reserved2; /* 0x04 */
+ U8 Reserved3; /* 0x06 */
+ U8 MsgFlags; /* 0x07 */
+ U8 VP_ID; /* 0x08 */
+ U8 VF_ID; /* 0x09 */
+ U16 Reserved4; /* 0x0A */
+ U32 Reserved5; /* 0x0C */
+ U32 Reserved6; /* 0x10 */
+ U32 Reserved7; /* 0x14 */
+ U32 ImageOffset; /* 0x18 */
+ U32 ImageSize; /* 0x1C */
+ MPI25_SGE_IO_UNION SGL; /* 0x20 */
+ } MPI25_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI25_FW_UPLOAD_REQUEST,
+ Mpi25FWUploadRequest_t, MPI2_POINTER pMpi25FWUploadRequest_t;
+
+
/* FWUpload Reply message */
typedef struct _MPI2_FW_UPLOAD_REPLY
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
*** 1171,1185 ****
#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000)
#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000)
#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00)
#define MPI2_FW_HEADER_PID_PROD_A (0x0000)
#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF)
! /* SAS */
! #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0010)
! #define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0011)
/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
/* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
--- 1311,1328 ----
#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000)
#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000)
#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00)
#define MPI2_FW_HEADER_PID_PROD_A (0x0000)
+ #define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
+ #define MPI2_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF)
! /* SAS ProductID Family bits */
! #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013)
! #define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014)
! #define MPI25_FW_HEADER_PID_FAMILY_3108_SAS (0x0021)
/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
/* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
*** 1391,1397 ****
--- 1534,1636 ----
/* defines for the ResetVector field */
#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET (0x14)
+ /****************************************************************************
+ * PowerManagementControl message
+ ****************************************************************************/
+
+ /* PowerManagementControl Request message */
+ typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST
+ {
+ U8 Feature; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U8 ChainOffset; /* 0x02 */
+ U8 Function; /* 0x03 */
+ U16 Reserved2; /* 0x04 */
+ U8 Reserved3; /* 0x06 */
+ U8 MsgFlags; /* 0x07 */
+ U8 VP_ID; /* 0x08 */
+ U8 VF_ID; /* 0x09 */
+ U16 Reserved4; /* 0x0A */
+ U8 Parameter1; /* 0x0C */
+ U8 Parameter2; /* 0x0D */
+ U8 Parameter3; /* 0x0E */
+ U8 Parameter4; /* 0x0F */
+ U32 Reserved5; /* 0x10 */
+ U32 Reserved6; /* 0x14 */
+ } MPI2_PWR_MGMT_CONTROL_REQUEST, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REQUEST,
+ Mpi2PwrMgmtControlRequest_t, MPI2_POINTER pMpi2PwrMgmtControlRequest_t;
+
+ /* defines for the Feature field */
+ #define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND (0x01)
+ #define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION (0x02)
+ #define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03)
+ #define MPI2_PM_CONTROL_FEATURE_IOC_SPEED (0x04)
+ #define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC (0x80)
+ #define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC (0xFF)
+
+ /* parameter usage for the MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND Feature */
+ /* Parameter1 contains a PHY number */
+ /* Parameter2 indicates power condition action using these defines */
+ #define MPI2_PM_CONTROL_PARAM2_PARTIAL (0x01)
+ #define MPI2_PM_CONTROL_PARAM2_SLUMBER (0x02)
+ #define MPI2_PM_CONTROL_PARAM2_EXIT_PWR_MGMT (0x03)
+ /* Parameter3 and Parameter4 are reserved */
+
+ /* parameter usage for the MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION Feature */
+ /* Parameter1 contains SAS port width modulation group number */
+ /* Parameter2 indicates IOC action using these defines */
+ #define MPI2_PM_CONTROL_PARAM2_REQUEST_OWNERSHIP (0x01)
+ #define MPI2_PM_CONTROL_PARAM2_CHANGE_MODULATION (0x02)
+ #define MPI2_PM_CONTROL_PARAM2_RELINQUISH_OWNERSHIP (0x03)
+ /* Parameter3 indicates desired modulation level using these defines */
+ #define MPI2_PM_CONTROL_PARAM3_25_PERCENT (0x00)
+ #define MPI2_PM_CONTROL_PARAM3_50_PERCENT (0x01)
+ #define MPI2_PM_CONTROL_PARAM3_75_PERCENT (0x02)
+ #define MPI2_PM_CONTROL_PARAM3_100_PERCENT (0x03)
+ /* Parameter4 is reserved */
+
+ /* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */
+ /* Parameter1 indicates desired PCIe link speed using these defines */
+ #define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00)
+ #define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01)
+ #define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02)
+ /* Parameter2 indicates desired PCIe link width using these defines */
+ #define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01)
+ #define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02)
+ #define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04)
+ #define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08)
+ /* Parameter3 and Parameter4 are reserved */
+
+ /* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */
+ /* Parameter1 indicates desired IOC hardware clock speed using these defines */
+ #define MPI2_PM_CONTROL_PARAM1_FULL_IOC_SPEED (0x01)
+ #define MPI2_PM_CONTROL_PARAM1_HALF_IOC_SPEED (0x02)
+ #define MPI2_PM_CONTROL_PARAM1_QUARTER_IOC_SPEED (0x04)
+ #define MPI2_PM_CONTROL_PARAM1_EIGHTH_IOC_SPEED (0x08)
+ /* Parameter2, Parameter3, and Parameter4 are reserved */
+
+
+ /* PowerManagementControl Reply message */
+ typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY
+ {
+ U8 Feature; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U8 MsgLength; /* 0x02 */
+ U8 Function; /* 0x03 */
+ U16 Reserved2; /* 0x04 */
+ U8 Reserved3; /* 0x06 */
+ U8 MsgFlags; /* 0x07 */
+ U8 VP_ID; /* 0x08 */
+ U8 VF_ID; /* 0x09 */
+ U16 Reserved4; /* 0x0A */
+ U16 Reserved5; /* 0x0C */
+ U16 IOCStatus; /* 0x0E */
+ U32 IOCLogInfo; /* 0x10 */
+ } MPI2_PWR_MGMT_CONTROL_REPLY, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REPLY,
+ Mpi2PwrMgmtControlReply_t, MPI2_POINTER pMpi2PwrMgmtControlReply_t;
+
+
#endif