Print this page
Initial modifications using the code changes present between
the LSI source code for FreeBSD drivers. Specifically the changes
between from mpslsi-source-17.00.00.00 -> mpslsi-source-03.00.00.00.
This mainly involves using a different scatter/gather element in
frame setup.
*** 18,29 ****
*
* CDDL HEADER END
*/
/*
! * Copyright (c) 2000 to 2009, LSI Corporation.
! * All rights reserved.
*
* Redistribution and use in source and binary forms of all code within
* this file that is exclusively owned by LSI, with or without
* modification, is permitted provided that, in addition to the CDDL 1.0
* License requirements, the following conditions are met:
--- 18,28 ----
*
* CDDL HEADER END
*/
/*
! * Copyright (c) 2000-2012 LSI Corporation.
*
* Redistribution and use in source and binary forms of all code within
* this file that is exclusively owned by LSI, with or without
* modification, is permitted provided that, in addition to the CDDL 1.0
* License requirements, the following conditions are met:
*** 49,59 ****
/*
* Name: mpi2_cnfg.h
* Title: MPI Configuration messages and pages
* Creation Date: November 10, 2006
*
! * mpi2_cnfg.h Version: 02.00.12
*
* Version History
* ---------------
*
* Date Version Description
--- 48,63 ----
/*
* Name: mpi2_cnfg.h
* Title: MPI Configuration messages and pages
* Creation Date: November 10, 2006
*
! * mpi2_cnfg.h Version: 02.00.xx
! *
! * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
! * prefix are for use only on MPI v2.5 products, and must not be used
! * with MPI v2.0 products. Unless otherwise noted, names beginning with
! * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
*** 150,159 ****
--- 154,190 ----
* Added SAS IO Unit Page 5.
* Added partial and slumber power management capable flags
* to SAS Device Page 0 Flags field.
* Added PhyInfo defines for power condition.
* Added Ethernet configuration pages.
+ * 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY.
+ * Added SAS PHY Page 4 structure and defines.
+ * 02-10-10 02.00.14 Modified the comments for the configuration page
+ * structures that contain an array of data. The host
+ * should use the "count" field in the page data (e.g. the
+ * NumPhys field) to determine the number of valid elements
+ * in the array.
+ * Added/modified some MPI2_MFGPAGE_DEVID_SAS defines.
+ * Added PowerManagementCapabilities to IO Unit Page 7.
+ * Added PortWidthModGroup field to
+ * MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS.
+ * Added MPI2_CONFIG_PAGE_SASIOUNIT_6 and related defines.
+ * Added MPI2_CONFIG_PAGE_SASIOUNIT_7 and related defines.
+ * Added MPI2_CONFIG_PAGE_SASIOUNIT_8 and related defines.
+ * 05-12-10 02.00.15 Added MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT
+ * define.
+ * Added MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE define.
+ * Added MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY define.
+ * 08-11-10 02.00.16 Removed IO Unit Page 1 device path (multi-pathing)
+ * defines.
+ * 11-10-10 02.00.17 Added ReceptacleID field (replacing Reserved1) to
+ * MPI2_MANPAGE7_CONNECTOR_INFO and reworked defines for
+ * the Pinout field.
+ * Added BoardTemperature and BoardTemperatureUnits fields
+ * to MPI2_CONFIG_PAGE_IO_UNIT_7.
+ * Added MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING define
+ * and MPI2_CONFIG_PAGE_EXT_MAN_PS structure.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_CNFG_H
#define MPI2_CNFG_H
*** 233,242 ****
--- 264,274 ----
#define MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15)
#define MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG (0x16)
#define MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING (0x17)
#define MPI2_CONFIG_EXTPAGETYPE_SAS_PORT (0x18)
#define MPI2_CONFIG_EXTPAGETYPE_ETHERNET (0x19)
+ #define MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING (0x1A)
/*****************************************************************************
* PageAddress defines
*****************************************************************************/
*** 399,426 ****
* Manufacturing Config pages
****************************************************************************/
#define MPI2_MFGPAGE_VENDORID_LSI (0x1000)
! /* SAS */
#define MPI2_MFGPAGE_DEVID_SAS2004 (0x0070)
#define MPI2_MFGPAGE_DEVID_SAS2008 (0x0072)
#define MPI2_MFGPAGE_DEVID_SAS2108_1 (0x0074)
#define MPI2_MFGPAGE_DEVID_SAS2108_2 (0x0076)
#define MPI2_MFGPAGE_DEVID_SAS2108_3 (0x0077)
#define MPI2_MFGPAGE_DEVID_SAS2116_1 (0x0064)
#define MPI2_MFGPAGE_DEVID_SAS2116_2 (0x0065)
#define MPI2_MFGPAGE_DEVID_SAS2208_1 (0x0080)
#define MPI2_MFGPAGE_DEVID_SAS2208_2 (0x0081)
#define MPI2_MFGPAGE_DEVID_SAS2208_3 (0x0082)
#define MPI2_MFGPAGE_DEVID_SAS2208_4 (0x0083)
#define MPI2_MFGPAGE_DEVID_SAS2208_5 (0x0084)
#define MPI2_MFGPAGE_DEVID_SAS2208_6 (0x0085)
#define MPI2_MFGPAGE_DEVID_SAS2208_7 (0x0086)
#define MPI2_MFGPAGE_DEVID_SAS2208_8 (0x0087)
!
/* Manufacturing Page 0 */
typedef struct _MPI2_CONFIG_PAGE_MAN_0
{
--- 431,472 ----
* Manufacturing Config pages
****************************************************************************/
#define MPI2_MFGPAGE_VENDORID_LSI (0x1000)
! /* MPI v2.0 SAS products */
#define MPI2_MFGPAGE_DEVID_SAS2004 (0x0070)
#define MPI2_MFGPAGE_DEVID_SAS2008 (0x0072)
#define MPI2_MFGPAGE_DEVID_SAS2108_1 (0x0074)
#define MPI2_MFGPAGE_DEVID_SAS2108_2 (0x0076)
#define MPI2_MFGPAGE_DEVID_SAS2108_3 (0x0077)
#define MPI2_MFGPAGE_DEVID_SAS2116_1 (0x0064)
#define MPI2_MFGPAGE_DEVID_SAS2116_2 (0x0065)
+ #define MPI2_MFGPAGE_DEVID_SSS6200 (0x007E)
+
#define MPI2_MFGPAGE_DEVID_SAS2208_1 (0x0080)
#define MPI2_MFGPAGE_DEVID_SAS2208_2 (0x0081)
#define MPI2_MFGPAGE_DEVID_SAS2208_3 (0x0082)
#define MPI2_MFGPAGE_DEVID_SAS2208_4 (0x0083)
#define MPI2_MFGPAGE_DEVID_SAS2208_5 (0x0084)
#define MPI2_MFGPAGE_DEVID_SAS2208_6 (0x0085)
#define MPI2_MFGPAGE_DEVID_SAS2208_7 (0x0086)
#define MPI2_MFGPAGE_DEVID_SAS2208_8 (0x0087)
! #define MPI2_MFGPAGE_DEVID_SAS2308_1 (0x0086)
! #define MPI2_MFGPAGE_DEVID_SAS2308_2 (0x0087)
! #define MPI2_MFGPAGE_DEVID_SAS2308_3 (0x006E)
!
! /* MPI v2.5 SAS products */
! #define MPI25_MFGPAGE_DEVID_SAS3004 (0x0096)
! #define MPI25_MFGPAGE_DEVID_SAS3008 (0x0097)
! #define MPI25_MFGPAGE_DEVID_SAS3108_1 (0x0090)
! #define MPI25_MFGPAGE_DEVID_SAS3108_2 (0x0091)
! #define MPI25_MFGPAGE_DEVID_SAS3108_3 (0x0092)
! #define MPI25_MFGPAGE_DEVID_SAS3108_4 (0x0093)
! #define MPI25_MFGPAGE_DEVID_SAS3108_5 (0x0094)
! #define MPI25_MFGPAGE_DEVID_SAS3108_6 (0x0095)
/* Manufacturing Page 0 */
typedef struct _MPI2_CONFIG_PAGE_MAN_0
{
*** 630,640 ****
typedef struct _MPI2_MANPAGE7_CONNECTOR_INFO
{
U32 Pinout; /* 0x00 */
U8 Connector[16]; /* 0x04 */
U8 Location; /* 0x14 */
! U8 Reserved1; /* 0x15 */
U16 Slot; /* 0x16 */
U32 Reserved2; /* 0x18 */
} MPI2_MANPAGE7_CONNECTOR_INFO, MPI2_POINTER PTR_MPI2_MANPAGE7_CONNECTOR_INFO,
Mpi2ManPage7ConnectorInfo_t, MPI2_POINTER pMpi2ManPage7ConnectorInfo_t;
--- 676,686 ----
typedef struct _MPI2_MANPAGE7_CONNECTOR_INFO
{
U32 Pinout; /* 0x00 */
U8 Connector[16]; /* 0x04 */
U8 Location; /* 0x14 */
! U8 ReceptacleID; /* 0x15 */
U16 Slot; /* 0x16 */
U32 Reserved2; /* 0x18 */
} MPI2_MANPAGE7_CONNECTOR_INFO, MPI2_POINTER PTR_MPI2_MANPAGE7_CONNECTOR_INFO,
Mpi2ManPage7ConnectorInfo_t, MPI2_POINTER pMpi2ManPage7ConnectorInfo_t;
*** 680,690 ****
MPI2_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI2_MANPAGE7_CONNECTOR_INFO_MAX]; /* 0x24 */
} MPI2_CONFIG_PAGE_MAN_7,
MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_7,
Mpi2ManufacturingPage7_t, MPI2_POINTER pMpi2ManufacturingPage7_t;
! #define MPI2_MANUFACTURING7_PAGEVERSION (0x00)
/* defines for the Flags field */
#define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001)
--- 726,736 ----
MPI2_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI2_MANPAGE7_CONNECTOR_INFO_MAX]; /* 0x24 */
} MPI2_CONFIG_PAGE_MAN_7,
MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_7,
Mpi2ManufacturingPage7_t, MPI2_POINTER pMpi2ManufacturingPage7_t;
! #define MPI2_MANUFACTURING7_PAGEVERSION (0x01)
/* defines for the Flags field */
#define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001)
*** 755,765 ****
--- 801,815 ----
Mpi2IOUnitPage1_t, MPI2_POINTER pMpi2IOUnitPage1_t;
#define MPI2_IOUNITPAGE1_PAGEVERSION (0x04)
/* IO Unit Page 1 Flags defines */
+ #define MPI25_IOUNITPAGE1_NEW_DEVICE_FAST_PATH_DISABLE (0x00002000)
+ #define MPI25_IOUNITPAGE1_DISABLE_FAST_PATH (0x00001000)
+ #define MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY (0x00000800)
#define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600)
+ #define MPI2_IOUNITPAGE1_SATA_WRITE_CACHE_SHIFT (9)
#define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000)
#define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200)
#define MPI2_IOUNITPAGE1_UNCHANGED_SATA_WRITE_CACHE (0x00000400)
#define MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100)
#define MPI2_IOUNITPAGE1_DISABLE_IR (0x00000040)
*** 865,883 ****
MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
U16 Reserved1; /* 0x04 */
U8 PCIeWidth; /* 0x06 */
U8 PCIeSpeed; /* 0x07 */
U32 ProcessorState; /* 0x08 */
! U32 Reserved2; /* 0x0C */
U16 IOCTemperature; /* 0x10 */
U8 IOCTemperatureUnits; /* 0x12 */
U8 IOCSpeed; /* 0x13 */
! U32 Reserved3; /* 0x14 */
} MPI2_CONFIG_PAGE_IO_UNIT_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_7,
Mpi2IOUnitPage7_t, MPI2_POINTER pMpi2IOUnitPage7_t;
! #define MPI2_IOUNITPAGE7_PAGEVERSION (0x00)
/* defines for IO Unit Page 7 PCIeWidth field */
#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X1 (0x01)
#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X2 (0x02)
#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X4 (0x04)
--- 915,935 ----
MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
U16 Reserved1; /* 0x04 */
U8 PCIeWidth; /* 0x06 */
U8 PCIeSpeed; /* 0x07 */
U32 ProcessorState; /* 0x08 */
! U32 PowerManagementCapabilities; /* 0x0C */
U16 IOCTemperature; /* 0x10 */
U8 IOCTemperatureUnits; /* 0x12 */
U8 IOCSpeed; /* 0x13 */
! U16 BoardTemperature; /* 0x14 */
! U8 BoardTemperatureUnits; /* 0x16 */
! U8 Reserved3; /* 0x17 */
} MPI2_CONFIG_PAGE_IO_UNIT_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_7,
Mpi2IOUnitPage7_t, MPI2_POINTER pMpi2IOUnitPage7_t;
! #define MPI2_IOUNITPAGE7_PAGEVERSION (0x02)
/* defines for IO Unit Page 7 PCIeWidth field */
#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X1 (0x01)
#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X2 (0x02)
#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X4 (0x04)
*** 894,903 ****
--- 946,962 ----
#define MPI2_IOUNITPAGE7_PSTATE_NOT_PRESENT (0x00)
#define MPI2_IOUNITPAGE7_PSTATE_DISABLED (0x01)
#define MPI2_IOUNITPAGE7_PSTATE_ENABLED (0x02)
+ /* defines for IO Unit Page 7 PowerManagementCapabilities field */
+ #define MPI2_IOUNITPAGE7_PMCAP_12_5_PCT_IOCSPEED (0x00000400)
+ #define MPI2_IOUNITPAGE7_PMCAP_25_0_PCT_IOCSPEED (0x00000200)
+ #define MPI2_IOUNITPAGE7_PMCAP_50_0_PCT_IOCSPEED (0x00000100)
+ #define MPI2_IOUNITPAGE7_PMCAP_PCIE_WIDTH_CHANGE (0x00000008)
+ #define MPI2_IOUNITPAGE7_PMCAP_PCIE_SPEED_CHANGE (0x00000004)
+
/* defines for IO Unit Page 7 IOCTemperatureUnits field */
#define MPI2_IOUNITPAGE7_IOC_TEMP_NOT_PRESENT (0x00)
#define MPI2_IOUNITPAGE7_IOC_TEMP_FAHRENHEIT (0x01)
#define MPI2_IOUNITPAGE7_IOC_TEMP_CELSIUS (0x02)
*** 905,914 ****
--- 964,977 ----
#define MPI2_IOUNITPAGE7_IOC_SPEED_FULL (0x01)
#define MPI2_IOUNITPAGE7_IOC_SPEED_HALF (0x02)
#define MPI2_IOUNITPAGE7_IOC_SPEED_QUARTER (0x04)
#define MPI2_IOUNITPAGE7_IOC_SPEED_EIGHTH (0x08)
+ /* defines for IO Unit Page 7 BoardTemperatureUnits field */
+ #define MPI2_IOUNITPAGE7_BOARD_TEMP_NOT_PRESENT (0x00)
+ #define MPI2_IOUNITPAGE7_BOARD_TEMP_FAHRENHEIT (0x01)
+ #define MPI2_IOUNITPAGE7_BOARD_TEMP_CELSIUS (0x02)
/****************************************************************************
* IOC Config Pages
****************************************************************************/
*** 1368,1377 ****
--- 1431,1441 ----
#define MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB (0x00100000)
#define MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK (0x00080000)
#define MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION (0x00040000)
#define MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT (0x00020000)
#define MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x00010000)
+ #define MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT (0x00000080)
#define MPI2_RAIDVOL0_STATUS_FLAG_OCE_ALLOWED (0x00000040)
#define MPI2_RAIDVOL0_STATUS_FLAG_BGI_COMPLETE (0x00000020)
#define MPI2_RAIDVOL0_STATUS_FLAG_1E_OFFSET_MIRROR (0x00000000)
#define MPI2_RAIDVOL0_STATUS_FLAG_1E_ADJACENT_MIRROR (0x00000010)
#define MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x00000008)
*** 1490,1504 ****
--- 1554,1571 ----
#define MPI2_PHYSDISK0_INCOMPATIBLE_PROTOCOL (0x01)
#define MPI2_PHYSDISK0_INCOMPATIBLE_BLOCKSIZE (0x02)
#define MPI2_PHYSDISK0_INCOMPATIBLE_MAX_LBA (0x03)
#define MPI2_PHYSDISK0_INCOMPATIBLE_SATA_EXTENDED_CMD (0x04)
#define MPI2_PHYSDISK0_INCOMPATIBLE_REMOVEABLE_MEDIA (0x05)
+ #define MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE (0x06)
#define MPI2_PHYSDISK0_INCOMPATIBLE_UNKNOWN (0xFF)
/* PhysDiskAttributes defines */
#define MPI2_PHYSDISK0_ATTRIB_SOLID_STATE_DRIVE (0x08)
#define MPI2_PHYSDISK0_ATTRIB_HARD_DISK_DRIVE (0x04)
+
+ #define MPI2_PHYSDISK0_ATTRIB_PROTOCOL_MASK (0x03)
#define MPI2_PHYSDISK0_ATTRIB_SAS_PROTOCOL (0x02)
#define MPI2_PHYSDISK0_ATTRIB_SATA_PROTOCOL (0x01)
/* PhysDiskStatusFlags defines */
#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED (0x00000040)
*** 1566,1578 ****
--- 1633,1647 ----
#define MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED (0x01)
#define MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED (0x02)
#define MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE (0x03)
#define MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR (0x04)
#define MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS (0x05)
+ #define MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY (0x06)
#define MPI2_SAS_NEG_LINK_RATE_1_5 (0x08)
#define MPI2_SAS_NEG_LINK_RATE_3_0 (0x09)
#define MPI2_SAS_NEG_LINK_RATE_6_0 (0x0A)
+ #define MPI25_SAS_NEG_LINK_RATE_12_0 (0x0B)
/* values for AttachedPhyInfo fields */
#define MPI2_SAS_APHYINFO_INSIDE_ZPSDS_PERSISTENT (0x00000040)
#define MPI2_SAS_APHYINFO_REQUESTED_INSIDE_ZPSDS (0x00000020)
*** 1592,1601 ****
--- 1661,1671 ----
/* values for PhyInfo fields */
#define MPI2_SAS_PHYINFO_PHY_VACANT (0x80000000)
#define MPI2_SAS_PHYINFO_PHY_POWER_CONDITION_MASK (0x18000000)
+ #define MPI2_SAS_PHYINFO_SHIFT_PHY_POWER_CONDITION (27)
#define MPI2_SAS_PHYINFO_PHY_POWER_ACTIVE (0x00000000)
#define MPI2_SAS_PHYINFO_PHY_POWER_PARTIAL (0x08000000)
#define MPI2_SAS_PHYINFO_PHY_POWER_SLUMBER (0x10000000)
#define MPI2_SAS_PHYINFO_CHANGED_REQ_INSIDE_ZPSDS (0x04000000)
*** 1639,1648 ****
--- 1709,1719 ----
#define MPI2_SAS_PRATE_MIN_RATE_MASK (0x0F)
#define MPI2_SAS_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00)
#define MPI2_SAS_PRATE_MIN_RATE_1_5 (0x08)
#define MPI2_SAS_PRATE_MIN_RATE_3_0 (0x09)
#define MPI2_SAS_PRATE_MIN_RATE_6_0 (0x0A)
+ #define MPI25_SAS_PRATE_MIN_RATE_12_0 (0x0B)
/* values for SAS HwLinkRate fields */
#define MPI2_SAS_HWRATE_MAX_RATE_MASK (0xF0)
#define MPI2_SAS_HWRATE_MAX_RATE_1_5 (0x80)
*** 1650,1659 ****
--- 1721,1731 ----
#define MPI2_SAS_HWRATE_MAX_RATE_6_0 (0xA0)
#define MPI2_SAS_HWRATE_MIN_RATE_MASK (0x0F)
#define MPI2_SAS_HWRATE_MIN_RATE_1_5 (0x08)
#define MPI2_SAS_HWRATE_MIN_RATE_3_0 (0x09)
#define MPI2_SAS_HWRATE_MIN_RATE_6_0 (0x0A)
+ #define MPI25_SAS_HWRATE_MIN_RATE_12_0 (0x0B)
/****************************************************************************
* SAS IO Unit Config Pages
*** 1817,1830 ****
--- 1889,1904 ----
/* values for SAS IO Unit Page 1 MaxMinLinkRate */
#define MPI2_SASIOUNIT1_MAX_RATE_MASK (0xF0)
#define MPI2_SASIOUNIT1_MAX_RATE_1_5 (0x80)
#define MPI2_SASIOUNIT1_MAX_RATE_3_0 (0x90)
#define MPI2_SASIOUNIT1_MAX_RATE_6_0 (0xA0)
+ #define MPI25_SASIOUNIT1_MAX_RATE_12_0 (0xB0)
#define MPI2_SASIOUNIT1_MIN_RATE_MASK (0x0F)
#define MPI2_SASIOUNIT1_MIN_RATE_1_5 (0x08)
#define MPI2_SASIOUNIT1_MIN_RATE_3_0 (0x09)
#define MPI2_SASIOUNIT1_MIN_RATE_6_0 (0x0A)
+ #define MPI25_SASIOUNIT1_MIN_RATE_12_0 (0x0B)
/* see mpi2_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
/* SAS IO Unit Page 4 */
*** 1876,1886 ****
/* SAS IO Unit Page 5 */
typedef struct _MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS
{
U8 ControlFlags; /* 0x00 */
! U8 Reserved1; /* 0x01 */
U16 InactivityTimerExponent; /* 0x02 */
U8 SATAPartialTimeout; /* 0x04 */
U8 Reserved2; /* 0x05 */
U8 SATASlumberTimeout; /* 0x06 */
U8 Reserved3; /* 0x07 */
--- 1950,1960 ----
/* SAS IO Unit Page 5 */
typedef struct _MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS
{
U8 ControlFlags; /* 0x00 */
! U8 PortWidthModGroup; /* 0x01 */
U16 InactivityTimerExponent; /* 0x02 */
U8 SATAPartialTimeout; /* 0x04 */
U8 Reserved2; /* 0x05 */
U8 SATASlumberTimeout; /* 0x06 */
U8 Reserved3; /* 0x07 */
*** 1896,1905 ****
--- 1970,1982 ----
#define MPI2_SASIOUNIT5_CONTROL_SAS_SLUMBER_ENABLE (0x08)
#define MPI2_SASIOUNIT5_CONTROL_SAS_PARTIAL_ENABLE (0x04)
#define MPI2_SASIOUNIT5_CONTROL_SATA_SLUMBER_ENABLE (0x02)
#define MPI2_SASIOUNIT5_CONTROL_SATA_PARTIAL_ENABLE (0x01)
+ /* defines for PortWidthModeGroup field */
+ #define MPI2_SASIOUNIT5_PWMG_DISABLE (0xFF)
+
/* defines for InactivityTimerExponent field */
#define MPI2_SASIOUNIT5_ITE_MASK_SAS_SLUMBER (0x7000)
#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_SLUMBER (12)
#define MPI2_SASIOUNIT5_ITE_MASK_SAS_PARTIAL (0x0700)
#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_PARTIAL (8)
*** 1935,1945 ****
MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS SASPhyPowerManagementSettings[MPI2_SAS_IOUNIT5_PHY_MAX]; /* 0x10 */
} MPI2_CONFIG_PAGE_SASIOUNIT_5,
MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_5,
Mpi2SasIOUnitPage5_t, MPI2_POINTER pMpi2SasIOUnitPage5_t;
! #define MPI2_SASIOUNITPAGE5_PAGEVERSION (0x00)
/****************************************************************************
--- 2012,2152 ----
MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS SASPhyPowerManagementSettings[MPI2_SAS_IOUNIT5_PHY_MAX]; /* 0x10 */
} MPI2_CONFIG_PAGE_SASIOUNIT_5,
MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_5,
Mpi2SasIOUnitPage5_t, MPI2_POINTER pMpi2SasIOUnitPage5_t;
! #define MPI2_SASIOUNITPAGE5_PAGEVERSION (0x01)
!
!
! /* SAS IO Unit Page 6 */
!
! typedef struct _MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS
! {
! U8 CurrentStatus; /* 0x00 */
! U8 CurrentModulation; /* 0x01 */
! U8 CurrentUtilization; /* 0x02 */
! U8 Reserved1; /* 0x03 */
! U32 Reserved2; /* 0x04 */
! } MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS,
! MPI2_POINTER PTR_MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS,
! Mpi2SasIOUnit6PortWidthModGroupStatus_t,
! MPI2_POINTER pMpi2SasIOUnit6PortWidthModGroupStatus_t;
!
! /* defines for CurrentStatus field */
! #define MPI2_SASIOUNIT6_STATUS_UNAVAILABLE (0x00)
! #define MPI2_SASIOUNIT6_STATUS_UNCONFIGURED (0x01)
! #define MPI2_SASIOUNIT6_STATUS_INVALID_CONFIG (0x02)
! #define MPI2_SASIOUNIT6_STATUS_LINK_DOWN (0x03)
! #define MPI2_SASIOUNIT6_STATUS_OBSERVATION_ONLY (0x04)
! #define MPI2_SASIOUNIT6_STATUS_INACTIVE (0x05)
! #define MPI2_SASIOUNIT6_STATUS_ACTIVE_IOUNIT (0x06)
! #define MPI2_SASIOUNIT6_STATUS_ACTIVE_HOST (0x07)
!
! /* defines for CurrentModulation field */
! #define MPI2_SASIOUNIT6_MODULATION_25_PERCENT (0x00)
! #define MPI2_SASIOUNIT6_MODULATION_50_PERCENT (0x01)
! #define MPI2_SASIOUNIT6_MODULATION_75_PERCENT (0x02)
! #define MPI2_SASIOUNIT6_MODULATION_100_PERCENT (0x03)
!
! /*
! * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
! * one and check the value returned for NumGroups at runtime.
! */
! #ifndef MPI2_SAS_IOUNIT6_GROUP_MAX
! #define MPI2_SAS_IOUNIT6_GROUP_MAX (1)
! #endif
!
! typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_6
! {
! MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
! U32 Reserved1; /* 0x08 */
! U32 Reserved2; /* 0x0C */
! U8 NumGroups; /* 0x10 */
! U8 Reserved3; /* 0x11 */
! U16 Reserved4; /* 0x12 */
! MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS
! PortWidthModulationGroupStatus[MPI2_SAS_IOUNIT6_GROUP_MAX]; /* 0x14 */
! } MPI2_CONFIG_PAGE_SASIOUNIT_6,
! MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_6,
! Mpi2SasIOUnitPage6_t, MPI2_POINTER pMpi2SasIOUnitPage6_t;
!
! #define MPI2_SASIOUNITPAGE6_PAGEVERSION (0x00)
!
!
! /* SAS IO Unit Page 7 */
!
! typedef struct _MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS
! {
! U8 Flags; /* 0x00 */
! U8 Reserved1; /* 0x01 */
! U16 Reserved2; /* 0x02 */
! U8 Threshold75Pct; /* 0x04 */
! U8 Threshold50Pct; /* 0x05 */
! U8 Threshold25Pct; /* 0x06 */
! U8 Reserved3; /* 0x07 */
! } MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS,
! MPI2_POINTER PTR_MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS,
! Mpi2SasIOUnit7PortWidthModGroupSettings_t,
! MPI2_POINTER pMpi2SasIOUnit7PortWidthModGroupSettings_t;
!
! /* defines for Flags field */
! #define MPI2_SASIOUNIT7_FLAGS_ENABLE_PORT_WIDTH_MODULATION (0x01)
!
!
! /*
! * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
! * one and check the value returned for NumGroups at runtime.
! */
! #ifndef MPI2_SAS_IOUNIT7_GROUP_MAX
! #define MPI2_SAS_IOUNIT7_GROUP_MAX (1)
! #endif
!
! typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_7
! {
! MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
! U8 SamplingInterval; /* 0x08 */
! U8 WindowLength; /* 0x09 */
! U16 Reserved1; /* 0x0A */
! U32 Reserved2; /* 0x0C */
! U32 Reserved3; /* 0x10 */
! U8 NumGroups; /* 0x14 */
! U8 Reserved4; /* 0x15 */
! U16 Reserved5; /* 0x16 */
! MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS
! PortWidthModulationGroupSettings[MPI2_SAS_IOUNIT7_GROUP_MAX]; /* 0x18 */
! } MPI2_CONFIG_PAGE_SASIOUNIT_7,
! MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_7,
! Mpi2SasIOUnitPage7_t, MPI2_POINTER pMpi2SasIOUnitPage7_t;
!
! #define MPI2_SASIOUNITPAGE7_PAGEVERSION (0x00)
!
!
! /* SAS IO Unit Page 8 */
!
! typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_8
! {
! MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
! U32 Reserved1; /* 0x08 */
! U32 PowerManagementCapabilities; /* 0x0C */
! U32 Reserved2; /* 0x10 */
! } MPI2_CONFIG_PAGE_SASIOUNIT_8,
! MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_8,
! Mpi2SasIOUnitPage8_t, MPI2_POINTER pMpi2SasIOUnitPage8_t;
!
! #define MPI2_SASIOUNITPAGE8_PAGEVERSION (0x00)
!
! /* defines for PowerManagementCapabilities field */
! #define MPI2_SASIOUNIT8_PM_HOST_PORT_WIDTH_MOD (0x000001000)
! #define MPI2_SASIOUNIT8_PM_HOST_SAS_SLUMBER_MODE (0x000000800)
! #define MPI2_SASIOUNIT8_PM_HOST_SAS_PARTIAL_MODE (0x000000400)
! #define MPI2_SASIOUNIT8_PM_HOST_SATA_SLUMBER_MODE (0x000000200)
! #define MPI2_SASIOUNIT8_PM_HOST_SATA_PARTIAL_MODE (0x000000100)
! #define MPI2_SASIOUNIT8_PM_IOUNIT_PORT_WIDTH_MOD (0x000000010)
! #define MPI2_SASIOUNIT8_PM_IOUNIT_SAS_SLUMBER_MODE (0x000000008)
! #define MPI2_SASIOUNIT8_PM_IOUNIT_SAS_PARTIAL_MODE (0x000000004)
! #define MPI2_SASIOUNIT8_PM_IOUNIT_SATA_SLUMBER_MODE (0x000000002)
! #define MPI2_SASIOUNIT8_PM_IOUNIT_SATA_PARTIAL_MODE (0x000000001)
/****************************************************************************
*** 2122,2131 ****
--- 2329,2340 ----
#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MAX (0x1F)
/* see mpi2_sas.h for values for SAS Device Page 0 DeviceInfo values */
/* values for SAS Device Page 0 Flags field */
+ #define MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH (0x4000)
+ #define MPI25_SAS_DEVICE0_FLAGS_FAST_PATH_CAPABLE (0x2000)
#define MPI2_SAS_DEVICE0_FLAGS_SLUMBER_PM_CAPABLE (0x1000)
#define MPI2_SAS_DEVICE0_FLAGS_PARTIAL_PM_CAPABLE (0x0800)
#define MPI2_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY (0x0400)
#define MPI2_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200)
#define MPI2_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100)
*** 2339,2348 ****
--- 2548,2578 ----
Mpi2SasPhyPage3_t, MPI2_POINTER pMpi2SasPhyPage3_t;
#define MPI2_SASPHY3_PAGEVERSION (0x00)
+ /* SAS PHY Page 4 */
+
+ typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_4
+ {
+ MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
+ U16 Reserved1; /* 0x08 */
+ U8 Reserved2; /* 0x0A */
+ U8 Flags; /* 0x0B */
+ U8 InitialFrame[28]; /* 0x0C */
+ } MPI2_CONFIG_PAGE_SAS_PHY_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_4,
+ Mpi2SasPhyPage4_t, MPI2_POINTER pMpi2SasPhyPage4_t;
+
+ #define MPI2_SASPHY4_PAGEVERSION (0x00)
+
+ /* values for the Flags field */
+ #define MPI2_SASPHY4_FLAGS_FRAME_VALID (0x02)
+ #define MPI2_SASPHY4_FLAGS_SATA_FRAME (0x01)
+
+
+
+
/****************************************************************************
* SAS Port Config Pages
****************************************************************************/
/* SAS Port Page 0 */
*** 2660,2666 ****
--- 2890,2916 ----
#define MPI2_ETHPG1_MS_DATA_RATE_10MBIT (0x01)
#define MPI2_ETHPG1_MS_DATA_RATE_100MBIT (0x02)
#define MPI2_ETHPG1_MS_DATA_RATE_1GBIT (0x03)
+ /****************************************************************************
+ * Extended Manufacturing Config Pages
+ ****************************************************************************/
+
+ /*
+ * Generic structure to use for product-specific extended manufacturing pages
+ * (currently Extended Manufacturing Page 40 through Extended Manufacturing
+ * Page 60).
+ */
+
+ typedef struct _MPI2_CONFIG_PAGE_EXT_MAN_PS
+ {
+ MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
+ U32 ProductSpecificInfo; /* 0x08 */
+ } MPI2_CONFIG_PAGE_EXT_MAN_PS,
+ MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXT_MAN_PS,
+ Mpi2ExtManufacturingPagePS_t, MPI2_POINTER pMpi2ExtManufacturingPagePS_t;
+
+ /* PageVersion should be provided by product-specific code */
+
#endif