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Add support for more than 8 MSI-X interrupts.
Tidy up interrupt assignement and card ID messages.
Initial modifications using the code changes present between
the LSI source code for FreeBSD drivers. Specifically the changes
between from mpslsi-source-17.00.00.00 -> mpslsi-source-03.00.00.00.
This mainly involves using a different scatter/gather element in
frame setup.


   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright (c) 2000 to 2009, LSI Corporation.
  24  * All rights reserved.
  25  *
  26  * Redistribution and use in source and binary forms of all code within
  27  * this file that is exclusively owned by LSI, with or without
  28  * modification, is permitted provided that, in addition to the CDDL 1.0
  29  * License requirements, the following conditions are met:
  30  *
  31  *    Neither the name of the author nor the names of its contributors may be
  32  *    used to endorse or promote products derived from this software without
  33  *    specific prior written permission.
  34  *
  35  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  36  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  37  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  38  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  39  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  40  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  41  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  42  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  43  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  44  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  45  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
  46  * DAMAGE.
  47  */
  48 
  49 /*
  50  *           Name:  mpi2.h
  51  *          Title:  MPI Message independent structures and definitions
  52  *                  including System Interface Register Set and
  53  *                  scatter/gather formats.
  54  *  Creation Date:  June 21, 2006
  55  *
  56  *  mpi2.h Version:  02.00.13





  57  *
  58  *  Version History
  59  *  ---------------
  60  *
  61  *  Date      Version   Description
  62  *  --------  --------  ------------------------------------------------------
  63  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
  64  *  06-04-07  02.00.01  Bumped MPI2_HEADER_VERSION_UNIT.
  65  *  06-26-07  02.00.02  Bumped MPI2_HEADER_VERSION_UNIT.
  66  *  08-31-07  02.00.03  Bumped MPI2_HEADER_VERSION_UNIT.
  67  *                      Moved ReplyPostHostIndex register to offset 0x6C of the
  68  *                      MPI2_SYSTEM_INTERFACE_REGS and modified the define for
  69  *                      MPI2_REPLY_POST_HOST_INDEX_OFFSET.
  70  *                      Added union of request descriptors.
  71  *                      Added union of reply descriptors.
  72  *  10-31-07  02.00.04  Bumped MPI2_HEADER_VERSION_UNIT.
  73  *                      Added define for MPI2_VERSION_02_00.
  74  *                      Fixed the size of the FunctionDependent5 field in the
  75  *                      MPI2_DEFAULT_REPLY structure.
  76  *  12-18-07  02.00.05  Bumped MPI2_HEADER_VERSION_UNIT.


  94  *                      In all request and reply descriptors, replaced VF_ID
  95  *                      field with MSIxIndex field.
  96  *                      Removed DevHandle field from
  97  *                      MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
  98  *                      bytes reserved.
  99  *                      Added RAID Accelerator functionality.
 100  *  07-30-09  02.00.13  Bumped MPI2_HEADER_VERSION_UNIT.
 101  *  --------------------------------------------------------------------------
 102  */
 103 
 104 #ifndef MPI2_H
 105 #define MPI2_H
 106 
 107 
 108 /*****************************************************************************
 109 *
 110 *        MPI Version Definitions
 111 *
 112 *****************************************************************************/
 113 
 114 #define MPI2_VERSION_MAJOR                  (0x02)
 115 #define MPI2_VERSION_MINOR                  (0x00)
 116 #define MPI2_VERSION_MAJOR_MASK             (0xFF00)
 117 #define MPI2_VERSION_MAJOR_SHIFT            (8)
 118 #define MPI2_VERSION_MINOR_MASK             (0x00FF)
 119 #define MPI2_VERSION_MINOR_SHIFT            (0)






 120 #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) |   \
 121                                       MPI2_VERSION_MINOR)
 122 
 123 #define MPI2_VERSION_02_00                  (0x0200)
 124 
 125 /* versioning for this MPI header set */
 126 #define MPI2_HEADER_VERSION_UNIT            (0x0D)








 127 #define MPI2_HEADER_VERSION_DEV             (0x00)
 128 #define MPI2_HEADER_VERSION_UNIT_MASK       (0xFF00)
 129 #define MPI2_HEADER_VERSION_UNIT_SHIFT      (8)
 130 #define MPI2_HEADER_VERSION_DEV_MASK        (0x00FF)
 131 #define MPI2_HEADER_VERSION_DEV_SHIFT       (0)
 132 #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
 133 
 134 
 135 /*****************************************************************************
 136 *
 137 *        IOC State Definitions
 138 *
 139 *****************************************************************************/
 140 
 141 #define MPI2_IOC_STATE_RESET               (0x00000000)
 142 #define MPI2_IOC_STATE_READY               (0x10000000)
 143 #define MPI2_IOC_STATE_OPERATIONAL         (0x20000000)
 144 #define MPI2_IOC_STATE_FAULT               (0x40000000)
 145 
 146 #define MPI2_IOC_STATE_MASK                (0xF0000000)


 166     U32         DiagRWData;                 /* 0x10 */
 167     U32         DiagRWAddressLow;           /* 0x14 */
 168     U32         DiagRWAddressHigh;          /* 0x18 */
 169     U32         Reserved2[5];               /* 0x1C */
 170     U32         HostInterruptStatus;        /* 0x30 */
 171     U32         HostInterruptMask;          /* 0x34 */
 172     U32         DCRData;                    /* 0x38 */
 173     U32         DCRAddress;                 /* 0x3C */
 174     U32         Reserved3[2];               /* 0x40 */
 175     U32         ReplyFreeHostIndex;         /* 0x48 */
 176     U32         Reserved4[8];               /* 0x4C */
 177     U32         ReplyPostHostIndex;         /* 0x6C */
 178     U32         Reserved5;                  /* 0x70 */
 179     U32         HCBSize;                    /* 0x74 */
 180     U32         HCBAddressLow;              /* 0x78 */
 181     U32         HCBAddressHigh;             /* 0x7C */
 182     U32         Reserved6[16];              /* 0x80 */
 183     U32         RequestDescriptorPostLow;   /* 0xC0 */
 184     U32         RequestDescriptorPostHigh;  /* 0xC4 */
 185     U32         Reserved7[14];              /* 0xC8 */



 186 } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
 187   Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
 188 
 189 /*
 190  * Defines for working with the Doorbell register.
 191  */
 192 #define MPI2_DOORBELL_OFFSET                    (0x00000000)
 193 
 194 /* IOC --> System values */
 195 #define MPI2_DOORBELL_USED                      (0x08000000)
 196 #define MPI2_DOORBELL_WHO_INIT_MASK             (0x07000000)
 197 #define MPI2_DOORBELL_WHO_INIT_SHIFT            (24)
 198 #define MPI2_DOORBELL_FAULT_CODE_MASK           (0x0000FFFF)
 199 #define MPI2_DOORBELL_DATA_MASK                 (0x0000FFFF)
 200 
 201 /* System --> IOC values */
 202 #define MPI2_DOORBELL_FUNCTION_MASK             (0xFF000000)
 203 #define MPI2_DOORBELL_FUNCTION_SHIFT            (24)
 204 #define MPI2_DOORBELL_ADD_DWORDS_MASK           (0x00FF0000)
 205 #define MPI2_DOORBELL_ADD_DWORDS_SHIFT          (16)


 263 #define MPI2_HIM_REPLY_INT_MASK                 (0x00000008)
 264 #define MPI2_HIM_RIM                            MPI2_HIM_REPLY_INT_MASK
 265 #define MPI2_HIM_IOC2SYS_DB_MASK                (0x00000001)
 266 #define MPI2_HIM_DIM                            MPI2_HIM_IOC2SYS_DB_MASK
 267 
 268 /*
 269  * Offsets for DCRData and address
 270  */
 271 #define MPI2_DCR_DATA_OFFSET                    (0x00000038)
 272 #define MPI2_DCR_ADDRESS_OFFSET                 (0x0000003C)
 273 
 274 /*
 275  * Offset for the Reply Free Queue
 276  */
 277 #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET       (0x00000048)
 278 
 279 /*
 280  * Offset for the Reply Descriptor Post Queue
 281  */
 282 #define MPI2_REPLY_POST_HOST_INDEX_OFFSET       (0x0000006C)



 283 
 284 /*
 285  * Defines for the HCBSize and address
 286  */
 287 #define MPI2_HCB_SIZE_OFFSET                    (0x00000074)
 288 #define MPI2_HCB_SIZE_SIZE_MASK                 (0xFFFFF000)
 289 #define MPI2_HCB_SIZE_HCB_ENABLE                (0x00000001)
 290 
 291 #define MPI2_HCB_ADDRESS_LOW_OFFSET             (0x00000078)
 292 #define MPI2_HCB_ADDRESS_HIGH_OFFSET            (0x0000007C)
 293 
 294 /*
 295  * Offsets for the Request Queue
 296  */
 297 #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET     (0x000000C0)
 298 #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET    (0x000000C4)
 299 






 300 
 301 /*****************************************************************************
 302 *
 303 *        Message Descriptors
 304 *
 305 *****************************************************************************/
 306 
 307 /* Request Descriptors */
 308 
 309 /* Default Request Descriptor */
 310 typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
 311 {
 312     U8              RequestFlags;               /* 0x00 */
 313     U8              MSIxIndex;                  /* 0x01 */
 314     U16             SMID;                       /* 0x02 */
 315     U16             LMID;                       /* 0x04 */
 316     U16             DescriptorTypeDependent;    /* 0x06 */
 317 } MPI2_DEFAULT_REQUEST_DESCRIPTOR,
 318   MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
 319   Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
 320 
 321 /* defines for the RequestFlags field */
 322 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK               (0x0E)
 323 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO                 (0x00)
 324 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET             (0x02)
 325 #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY           (0x06)
 326 #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE            (0x08)
 327 #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR        (0x0A)

 328 
 329 #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
 330 
 331 
 332 /* High Priority Request Descriptor */
 333 typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
 334 {
 335     U8              RequestFlags;               /* 0x00 */
 336     U8              MSIxIndex;                  /* 0x01 */
 337     U16             SMID;                       /* 0x02 */
 338     U16             LMID;                       /* 0x04 */
 339     U16             Reserved1;                  /* 0x06 */
 340 } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
 341   MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
 342   Mpi2HighPriorityRequestDescriptor_t,
 343   MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
 344 
 345 
 346 /* SCSI IO Request Descriptor */
 347 typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR


 367 } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
 368   MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
 369   Mpi2SCSITargetRequestDescriptor_t,
 370   MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
 371 
 372 
 373 /* RAID Accelerator Request Descriptor */
 374 typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR
 375 {
 376     U8              RequestFlags;               /* 0x00 */
 377     U8              MSIxIndex;                  /* 0x01 */
 378     U16             SMID;                       /* 0x02 */
 379     U16             LMID;                       /* 0x04 */
 380     U16             Reserved;                   /* 0x06 */
 381 } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
 382   MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
 383   Mpi2RAIDAcceleratorRequestDescriptor_t,
 384   MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
 385 
 386 








 387 /* union of Request Descriptors */
 388 typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
 389 {
 390     MPI2_DEFAULT_REQUEST_DESCRIPTOR             Default;
 391     MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR       HighPriority;
 392     MPI2_SCSI_IO_REQUEST_DESCRIPTOR             SCSIIO;
 393     MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR         SCSITarget;
 394     MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR          RAIDAccelerator;

 395     U64                                         Words;
 396 } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
 397   Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
 398 
 399 
 400 /* Reply Descriptors */
 401 
 402 /* Default Reply Descriptor */
 403 typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
 404 {
 405     U8              ReplyFlags;                 /* 0x00 */
 406     U8              MSIxIndex;                  /* 0x01 */
 407     U16             DescriptorTypeDependent1;   /* 0x02 */
 408     U32             DescriptorTypeDependent2;   /* 0x04 */
 409 } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
 410   Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
 411 
 412 /* defines for the ReplyFlags field */
 413 #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK                   (0x0F)
 414 #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS             (0x00)
 415 #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY               (0x01)
 416 #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS        (0x02)
 417 #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER       (0x03)
 418 #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS    (0x05)

 419 #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED                      (0x0F)
 420 
 421 /* values for marking a reply descriptor as unused */
 422 #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK             (0xFFFFFFFF)
 423 #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK             (0xFFFFFFFF)
 424 
 425 /* Address Reply Descriptor */
 426 typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
 427 {
 428     U8              ReplyFlags;                 /* 0x00 */
 429     U8              MSIxIndex;                  /* 0x01 */
 430     U16             SMID;                       /* 0x02 */
 431     U32             ReplyFrameAddress;          /* 0x04 */
 432 } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
 433   Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
 434 
 435 #define MPI2_ADDRESS_REPLY_SMID_INVALID                 (0x00)
 436 
 437 
 438 /* SCSI IO Success Reply Descriptor */


 478   Mpi2TargetCommandBufferReplyDescriptor_t,
 479   MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
 480 
 481 /* defines for Flags field */
 482 #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK     (0x3F)
 483 
 484 
 485 /* RAID Accelerator Success Reply Descriptor */
 486 typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR
 487 {
 488     U8              ReplyFlags;                 /* 0x00 */
 489     U8              MSIxIndex;                  /* 0x01 */
 490     U16             SMID;                       /* 0x02 */
 491     U32             Reserved;                   /* 0x04 */
 492 } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
 493   MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
 494   Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
 495   MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
 496 
 497 








 498 /* union of Reply Descriptors */
 499 typedef union _MPI2_REPLY_DESCRIPTORS_UNION
 500 {
 501     MPI2_DEFAULT_REPLY_DESCRIPTOR                   Default;
 502     MPI2_ADDRESS_REPLY_DESCRIPTOR                   AddressReply;
 503     MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR           SCSIIOSuccess;
 504     MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR      TargetAssistSuccess;
 505     MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR     TargetCommandBuffer;
 506     MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR  RAIDAcceleratorSuccess;

 507     U64                                             Words;
 508 } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
 509   Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
 510 
 511 
 512 
 513 /*****************************************************************************
 514 *
 515 *        Message Functions
 516 *              0x80 -> 0x8F reserved for private message use per product
 517 *
 518 *
 519 *****************************************************************************/
 520 
 521 #define MPI2_FUNCTION_SCSI_IO_REQUEST               (0x00) /* SCSI IO */
 522 #define MPI2_FUNCTION_SCSI_TASK_MGMT                (0x01) /* SCSI Task Management */
 523 #define MPI2_FUNCTION_IOC_INIT                      (0x02) /* IOC Init */
 524 #define MPI2_FUNCTION_IOC_FACTS                     (0x03) /* IOC Facts */
 525 #define MPI2_FUNCTION_CONFIG                        (0x04) /* Configuration */
 526 #define MPI2_FUNCTION_PORT_FACTS                    (0x05) /* Port Facts */
 527 #define MPI2_FUNCTION_PORT_ENABLE                   (0x06) /* Port Enable */
 528 #define MPI2_FUNCTION_EVENT_NOTIFICATION            (0x07) /* Event Notification */
 529 #define MPI2_FUNCTION_EVENT_ACK                     (0x08) /* Event Acknowledge */
 530 #define MPI2_FUNCTION_FW_DOWNLOAD                   (0x09) /* FW Download */
 531 #define MPI2_FUNCTION_TARGET_ASSIST                 (0x0B) /* Target Assist */
 532 #define MPI2_FUNCTION_TARGET_STATUS_SEND            (0x0C) /* Target Status Send */
 533 #define MPI2_FUNCTION_TARGET_MODE_ABORT             (0x0D) /* Target Mode Abort */
 534 #define MPI2_FUNCTION_FW_UPLOAD                     (0x12) /* FW Upload */
 535 #define MPI2_FUNCTION_RAID_ACTION                   (0x15) /* RAID Action */
 536 #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH      (0x16) /* SCSI IO RAID Passthrough */
 537 #define MPI2_FUNCTION_TOOLBOX                       (0x17) /* Toolbox */
 538 #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR      (0x18) /* SCSI Enclosure Processor */
 539 #define MPI2_FUNCTION_SMP_PASSTHROUGH               (0x1A) /* SMP Passthrough */
 540 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL           (0x1B) /* SAS IO Unit Control */
 541 #define MPI2_FUNCTION_SATA_PASSTHROUGH              (0x1C) /* SATA Passthrough */
 542 #define MPI2_FUNCTION_DIAG_BUFFER_POST              (0x1D) /* Diagnostic Buffer Post */
 543 #define MPI2_FUNCTION_DIAG_RELEASE                  (0x1E) /* Diagnostic Release */
 544 #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST      (0x24) /* Target Command Buffer Post Base */
 545 #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST      (0x25) /* Target Command Buffer Post List */
 546 #define MPI2_FUNCTION_RAID_ACCELERATOR              (0x2C) /* RAID Accelerator */




 547 
 548 
 549 
 550 /* Doorbell functions */
 551 #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET        (0x40)
 552 /* #define MPI2_FUNCTION_IO_UNIT_RESET                 (0x41) */
 553 #define MPI2_FUNCTION_HANDSHAKE                     (0x42)
 554 
 555 
 556 /*****************************************************************************
 557 *
 558 *        IOC Status Values
 559 *
 560 *****************************************************************************/
 561 
 562 /* mask for IOCStatus status value */
 563 #define MPI2_IOCSTATUS_MASK                     (0x7FFF)
 564 
 565 /****************************************************************************
 566 *  Common IOCStatus values for all replies
 567 ****************************************************************************/
 568 
 569 #define MPI2_IOCSTATUS_SUCCESS                      (0x0000)
 570 #define MPI2_IOCSTATUS_INVALID_FUNCTION             (0x0001)
 571 #define MPI2_IOCSTATUS_BUSY                         (0x0002)
 572 #define MPI2_IOCSTATUS_INVALID_SGL                  (0x0003)


 760 typedef struct _MPI2_SGE_SIMPLE64
 761 {
 762     U32                     FlagsLength;
 763     U64                     Address;
 764 } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
 765   Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
 766 
 767 typedef struct _MPI2_SGE_SIMPLE_UNION
 768 {
 769     U32                     FlagsLength;
 770     union
 771     {
 772         U32                 Address32;
 773         U64                 Address64;
 774     } u;
 775 } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
 776   Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
 777 
 778 
 779 /****************************************************************************
 780 *  MPI Chain Element structures
 781 ****************************************************************************/
 782 
 783 typedef struct _MPI2_SGE_CHAIN32
 784 {
 785     U16                     Length;
 786     U8                      NextChainOffset;
 787     U8                      Flags;
 788     U32                     Address;
 789 } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
 790   Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
 791 
 792 typedef struct _MPI2_SGE_CHAIN64
 793 {
 794     U16                     Length;
 795     U8                      NextChainOffset;
 796     U8                      Flags;
 797     U64                     Address;
 798 } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
 799   Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
 800 
 801 typedef struct _MPI2_SGE_CHAIN_UNION
 802 {
 803     U16                     Length;
 804     U8                      NextChainOffset;
 805     U8                      Flags;
 806     union
 807     {
 808         U32                 Address32;
 809         U64                 Address64;
 810     } u;
 811 } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
 812   Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
 813 
 814 
 815 /****************************************************************************
 816 *  MPI Transaction Context Element structures
 817 ****************************************************************************/
 818 
 819 typedef struct _MPI2_SGE_TRANSACTION32
 820 {
 821     U8                      Reserved;
 822     U8                      ContextSize;
 823     U8                      DetailsLength;
 824     U8                      Flags;
 825     U32                     TransactionContext[1];
 826     U32                     TransactionDetails[1];
 827 } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
 828   Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
 829 
 830 typedef struct _MPI2_SGE_TRANSACTION64
 831 {
 832     U8                      Reserved;
 833     U8                      ContextSize;
 834     U8                      DetailsLength;
 835     U8                      Flags;
 836     U32                     TransactionContext[2];


 862 
 863 typedef struct _MPI2_SGE_TRANSACTION_UNION
 864 {
 865     U8                      Reserved;
 866     U8                      ContextSize;
 867     U8                      DetailsLength;
 868     U8                      Flags;
 869     union
 870     {
 871         U32                 TransactionContext32[1];
 872         U32                 TransactionContext64[2];
 873         U32                 TransactionContext96[3];
 874         U32                 TransactionContext128[4];
 875     } u;
 876     U32                     TransactionDetails[1];
 877 } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
 878   Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
 879 
 880 
 881 /****************************************************************************
 882 *  MPI SGE union for IO SGL's
 883 ****************************************************************************/
 884 
 885 typedef struct _MPI2_MPI_SGE_IO_UNION
 886 {
 887     union
 888     {
 889         MPI2_SGE_SIMPLE_UNION   Simple;
 890         MPI2_SGE_CHAIN_UNION    Chain;
 891     } u;
 892 } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
 893   Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
 894 
 895 
 896 /****************************************************************************
 897 *  MPI SGE union for SGL's with Simple and Transaction elements
 898 ****************************************************************************/
 899 
 900 typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
 901 {
 902     union
 903     {
 904         MPI2_SGE_SIMPLE_UNION       Simple;
 905         MPI2_SGE_TRANSACTION_UNION  Transaction;
 906     } u;
 907 } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
 908   Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
 909 
 910 
 911 /****************************************************************************
 912 *  All MPI SGE types union
 913 ****************************************************************************/
 914 
 915 typedef struct _MPI2_MPI_SGE_UNION
 916 {
 917     union


 928 *  MPI SGE field definition and masks
 929 ****************************************************************************/
 930 
 931 /* Flags field bit definitions */
 932 
 933 #define MPI2_SGE_FLAGS_LAST_ELEMENT             (0x80)
 934 #define MPI2_SGE_FLAGS_END_OF_BUFFER            (0x40)
 935 #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK        (0x30)
 936 #define MPI2_SGE_FLAGS_LOCAL_ADDRESS            (0x08)
 937 #define MPI2_SGE_FLAGS_DIRECTION                (0x04)
 938 #define MPI2_SGE_FLAGS_ADDRESS_SIZE             (0x02)
 939 #define MPI2_SGE_FLAGS_END_OF_LIST              (0x01)
 940 
 941 #define MPI2_SGE_FLAGS_SHIFT                    (24)
 942 
 943 #define MPI2_SGE_LENGTH_MASK                    (0x00FFFFFF)
 944 #define MPI2_SGE_CHAIN_LENGTH_MASK              (0x0000FFFF)
 945 
 946 /* Element Type */
 947 
 948 #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT      (0x00)
 949 #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT           (0x10)
 950 #define MPI2_SGE_FLAGS_CHAIN_ELEMENT            (0x30)
 951 #define MPI2_SGE_FLAGS_ELEMENT_MASK             (0x30)
 952 
 953 /* Address location */
 954 
 955 #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS           (0x00)
 956 
 957 /* Direction */
 958 
 959 #define MPI2_SGE_FLAGS_IOC_TO_HOST              (0x00)
 960 #define MPI2_SGE_FLAGS_HOST_TO_IOC              (0x04)
 961 



 962 /* Address Size */
 963 
 964 #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING        (0x00)
 965 #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING        (0x02)
 966 
 967 /* Context Size */
 968 
 969 #define MPI2_SGE_FLAGS_32_BIT_CONTEXT           (0x00)
 970 #define MPI2_SGE_FLAGS_64_BIT_CONTEXT           (0x02)
 971 #define MPI2_SGE_FLAGS_96_BIT_CONTEXT           (0x04)
 972 #define MPI2_SGE_FLAGS_128_BIT_CONTEXT          (0x06)
 973 
 974 #define MPI2_SGE_CHAIN_OFFSET_MASK              (0x00FF0000)
 975 #define MPI2_SGE_CHAIN_OFFSET_SHIFT             (16)
 976 
 977 /****************************************************************************
 978 *  MPI SGE operation Macros
 979 ****************************************************************************/
 980 
 981 /* SIMPLE FlagsLength manipulations... */


 990 #define MPI2_pSGE_GET_LENGTH(psg)           MPI2_SGE_LENGTH((psg)->FlagsLength)
 991 #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
 992 
 993 /* CAUTION - The following are READ-MODIFY-WRITE! */
 994 #define MPI2_pSGE_SET_FLAGS(psg,f)      (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
 995 #define MPI2_pSGE_SET_LENGTH(psg,l)     (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
 996 
 997 #define MPI2_GET_CHAIN_OFFSET(x)    ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
 998 
 999 
1000 /*****************************************************************************
1001 *
1002 *        Fusion-MPT IEEE Scatter Gather Elements
1003 *
1004 *****************************************************************************/
1005 
1006 /****************************************************************************
1007 *  IEEE Simple Element structures
1008 ****************************************************************************/
1009 

1010 typedef struct _MPI2_IEEE_SGE_SIMPLE32
1011 {
1012     U32                     Address;
1013     U32                     FlagsLength;
1014 } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
1015   Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
1016 
1017 typedef struct _MPI2_IEEE_SGE_SIMPLE64
1018 {
1019     U64                     Address;
1020     U32                     Length;
1021     U16                     Reserved1;
1022     U8                      Reserved2;
1023     U8                      Flags;
1024 } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
1025   Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
1026 
1027 typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
1028 {
1029     MPI2_IEEE_SGE_SIMPLE32  Simple32;
1030     MPI2_IEEE_SGE_SIMPLE64  Simple64;
1031 } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
1032   Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
1033 
1034 
1035 /****************************************************************************
1036 *  IEEE Chain Element structures
1037 ****************************************************************************/
1038 

1039 typedef MPI2_IEEE_SGE_SIMPLE32  MPI2_IEEE_SGE_CHAIN32;
1040 

1041 typedef MPI2_IEEE_SGE_SIMPLE64  MPI2_IEEE_SGE_CHAIN64;
1042 
1043 typedef union _MPI2_IEEE_SGE_CHAIN_UNION
1044 {
1045     MPI2_IEEE_SGE_CHAIN32   Chain32;
1046     MPI2_IEEE_SGE_CHAIN64   Chain64;
1047 } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
1048   Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
1049 











1050 
1051 /****************************************************************************
1052 *  All IEEE SGE types union
1053 ****************************************************************************/
1054 

1055 typedef struct _MPI2_IEEE_SGE_UNION
1056 {
1057     union
1058     {
1059         MPI2_IEEE_SGE_SIMPLE_UNION  Simple;
1060         MPI2_IEEE_SGE_CHAIN_UNION   Chain;
1061     } u;
1062 } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
1063   Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
1064 
1065 
1066 /****************************************************************************












1067 *  IEEE SGE field definitions and masks
1068 ****************************************************************************/
1069 
1070 /* Flags field bit definitions */
1071 
1072 #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK   (0x80)

1073 
1074 #define MPI2_IEEE32_SGE_FLAGS_SHIFT             (24)
1075 
1076 #define MPI2_IEEE32_SGE_LENGTH_MASK             (0x00FFFFFF)
1077 
1078 /* Element Type */
1079 
1080 #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT      (0x00)
1081 #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT       (0x80)
1082 
1083 /* Data Location Address Space */
1084 
1085 #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK           (0x03)
1086 #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR         (0x00)
1087 #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR         (0x01)
1088 #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR         (0x02)
1089 #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR      (0x03)

1090 
1091 
1092 /****************************************************************************
1093 *  IEEE SGE operation Macros
1094 ****************************************************************************/
1095 
1096 /* SIMPLE FlagsLength manipulations... */
1097 #define MPI2_IEEE32_SGE_SET_FLAGS(f)     ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1098 #define MPI2_IEEE32_SGE_GET_FLAGS(f)     (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1099 #define MPI2_IEEE32_SGE_LENGTH(f)        ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1100 
1101 #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l)      (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1102 
1103 #define MPI2_IEEE32_pSGE_GET_FLAGS(psg)             MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1104 #define MPI2_IEEE32_pSGE_GET_LENGTH(psg)            MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1105 #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l)  (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1106 
1107 /* CAUTION - The following are READ-MODIFY-WRITE! */
1108 #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f)    (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1109 #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l)   (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)




   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  *  Copyright (c) 2000-2012 LSI Corporation.

  24  *
  25  * Redistribution and use in source and binary forms of all code within
  26  * this file that is exclusively owned by LSI, with or without
  27  * modification, is permitted provided that, in addition to the CDDL 1.0
  28  * License requirements, the following conditions are met:
  29  *
  30  *    Neither the name of the author nor the names of its contributors may be
  31  *    used to endorse or promote products derived from this software without
  32  *    specific prior written permission.
  33  *
  34  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  37  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  38  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  39  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  40  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  41  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  42  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  43  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  44  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
  45  * DAMAGE.
  46  */
  47 
  48 /*
  49  *           Name:  mpi2.h
  50  *          Title:  MPI Message independent structures and definitions
  51  *                  including System Interface Register Set and
  52  *                  scatter/gather formats.
  53  *  Creation Date:  June 21, 2006
  54  *
  55  *  mpi2.h Version:  02.00.xx
  56  *
  57  *  NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
  58  *        prefix are for use only on MPI v2.5 products, and must not be used
  59  *        with MPI v2.0 products. Unless otherwise noted, names beginning with
  60  *        MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
  61  *
  62  *  Version History
  63  *  ---------------
  64  *
  65  *  Date      Version   Description
  66  *  --------  --------  ------------------------------------------------------
  67  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
  68  *  06-04-07  02.00.01  Bumped MPI2_HEADER_VERSION_UNIT.
  69  *  06-26-07  02.00.02  Bumped MPI2_HEADER_VERSION_UNIT.
  70  *  08-31-07  02.00.03  Bumped MPI2_HEADER_VERSION_UNIT.
  71  *                      Moved ReplyPostHostIndex register to offset 0x6C of the
  72  *                      MPI2_SYSTEM_INTERFACE_REGS and modified the define for
  73  *                      MPI2_REPLY_POST_HOST_INDEX_OFFSET.
  74  *                      Added union of request descriptors.
  75  *                      Added union of reply descriptors.
  76  *  10-31-07  02.00.04  Bumped MPI2_HEADER_VERSION_UNIT.
  77  *                      Added define for MPI2_VERSION_02_00.
  78  *                      Fixed the size of the FunctionDependent5 field in the
  79  *                      MPI2_DEFAULT_REPLY structure.
  80  *  12-18-07  02.00.05  Bumped MPI2_HEADER_VERSION_UNIT.


  98  *                      In all request and reply descriptors, replaced VF_ID
  99  *                      field with MSIxIndex field.
 100  *                      Removed DevHandle field from
 101  *                      MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
 102  *                      bytes reserved.
 103  *                      Added RAID Accelerator functionality.
 104  *  07-30-09  02.00.13  Bumped MPI2_HEADER_VERSION_UNIT.
 105  *  --------------------------------------------------------------------------
 106  */
 107 
 108 #ifndef MPI2_H
 109 #define MPI2_H
 110 
 111 
 112 /*****************************************************************************
 113 *
 114 *        MPI Version Definitions
 115 *
 116 *****************************************************************************/
 117 


 118 #define MPI2_VERSION_MAJOR_MASK             (0xFF00)
 119 #define MPI2_VERSION_MAJOR_SHIFT            (8)
 120 #define MPI2_VERSION_MINOR_MASK             (0x00FF)
 121 #define MPI2_VERSION_MINOR_SHIFT            (0)
 122 
 123 /* major version for all MPI v2.x */
 124 #define MPI2_VERSION_MAJOR                  (0x02)
 125 
 126 /* minor version for MPI v2.0 compatible products */
 127 #define MPI2_VERSION_MINOR                  (0x00)
 128 #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) |   \
 129                                       MPI2_VERSION_MINOR)

 130 #define MPI2_VERSION_02_00                  (0x0200)
 131 
 132 
 133 /* minor version for MPI v2.5 compatible products */
 134 #define MPI25_VERSION_MINOR                 (0x05)
 135 #define MPI25_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) |   \
 136                                       MPI25_VERSION_MINOR)
 137 #define MPI2_VERSION_02_05                  (0x0205)
 138 
 139 
 140 /* Unit and Dev versioning for this MPI header set */
 141 #define MPI2_HEADER_VERSION_UNIT            (0x12)
 142 #define MPI2_HEADER_VERSION_DEV             (0x00)
 143 #define MPI2_HEADER_VERSION_UNIT_MASK       (0xFF00)
 144 #define MPI2_HEADER_VERSION_UNIT_SHIFT      (8)
 145 #define MPI2_HEADER_VERSION_DEV_MASK        (0x00FF)
 146 #define MPI2_HEADER_VERSION_DEV_SHIFT       (0)
 147 #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
 148 
 149 
 150 /*****************************************************************************
 151 *
 152 *        IOC State Definitions
 153 *
 154 *****************************************************************************/
 155 
 156 #define MPI2_IOC_STATE_RESET               (0x00000000)
 157 #define MPI2_IOC_STATE_READY               (0x10000000)
 158 #define MPI2_IOC_STATE_OPERATIONAL         (0x20000000)
 159 #define MPI2_IOC_STATE_FAULT               (0x40000000)
 160 
 161 #define MPI2_IOC_STATE_MASK                (0xF0000000)


 181     U32         DiagRWData;                 /* 0x10 */
 182     U32         DiagRWAddressLow;           /* 0x14 */
 183     U32         DiagRWAddressHigh;          /* 0x18 */
 184     U32         Reserved2[5];               /* 0x1C */
 185     U32         HostInterruptStatus;        /* 0x30 */
 186     U32         HostInterruptMask;          /* 0x34 */
 187     U32         DCRData;                    /* 0x38 */
 188     U32         DCRAddress;                 /* 0x3C */
 189     U32         Reserved3[2];               /* 0x40 */
 190     U32         ReplyFreeHostIndex;         /* 0x48 */
 191     U32         Reserved4[8];               /* 0x4C */
 192     U32         ReplyPostHostIndex;         /* 0x6C */
 193     U32         Reserved5;                  /* 0x70 */
 194     U32         HCBSize;                    /* 0x74 */
 195     U32         HCBAddressLow;              /* 0x78 */
 196     U32         HCBAddressHigh;             /* 0x7C */
 197     U32         Reserved6[16];              /* 0x80 */
 198     U32         RequestDescriptorPostLow;   /* 0xC0 */
 199     U32         RequestDescriptorPostHigh;  /* 0xC4 */
 200     U32         Reserved7[14];              /* 0xC8 */
 201     U32         Reserved8[128];             /* 0x100 */
 202     U32         Reserved10[3];              /* 0x300 */
 203     U32         SuppReplyPostHostIndex[32]; /* 0x30C */
 204 } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
 205   Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
 206 
 207 /*
 208  * Defines for working with the Doorbell register.
 209  */
 210 #define MPI2_DOORBELL_OFFSET                    (0x00000000)
 211 
 212 /* IOC --> System values */
 213 #define MPI2_DOORBELL_USED                      (0x08000000)
 214 #define MPI2_DOORBELL_WHO_INIT_MASK             (0x07000000)
 215 #define MPI2_DOORBELL_WHO_INIT_SHIFT            (24)
 216 #define MPI2_DOORBELL_FAULT_CODE_MASK           (0x0000FFFF)
 217 #define MPI2_DOORBELL_DATA_MASK                 (0x0000FFFF)
 218 
 219 /* System --> IOC values */
 220 #define MPI2_DOORBELL_FUNCTION_MASK             (0xFF000000)
 221 #define MPI2_DOORBELL_FUNCTION_SHIFT            (24)
 222 #define MPI2_DOORBELL_ADD_DWORDS_MASK           (0x00FF0000)
 223 #define MPI2_DOORBELL_ADD_DWORDS_SHIFT          (16)


 281 #define MPI2_HIM_REPLY_INT_MASK                 (0x00000008)
 282 #define MPI2_HIM_RIM                            MPI2_HIM_REPLY_INT_MASK
 283 #define MPI2_HIM_IOC2SYS_DB_MASK                (0x00000001)
 284 #define MPI2_HIM_DIM                            MPI2_HIM_IOC2SYS_DB_MASK
 285 
 286 /*
 287  * Offsets for DCRData and address
 288  */
 289 #define MPI2_DCR_DATA_OFFSET                    (0x00000038)
 290 #define MPI2_DCR_ADDRESS_OFFSET                 (0x0000003C)
 291 
 292 /*
 293  * Offset for the Reply Free Queue
 294  */
 295 #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET       (0x00000048)
 296 
 297 /*
 298  * Offset for the Reply Descriptor Post Queue
 299  */
 300 #define MPI2_REPLY_POST_HOST_INDEX_OFFSET       (0x0000006C)
 301 #define MPI2_REPLY_POST_HOST_INDEX_MASK         (0x00FFFFFF)
 302 #define MPI2_RPHI_MSIX_INDEX_MASK               (0xFF000000)
 303 #define MPI2_RPHI_MSIX_INDEX_SHIFT              (24)
 304 
 305 /*
 306  * Defines for the HCBSize and address
 307  */
 308 #define MPI2_HCB_SIZE_OFFSET                    (0x00000074)
 309 #define MPI2_HCB_SIZE_SIZE_MASK                 (0xFFFFF000)
 310 #define MPI2_HCB_SIZE_HCB_ENABLE                (0x00000001)
 311 
 312 #define MPI2_HCB_ADDRESS_LOW_OFFSET             (0x00000078)
 313 #define MPI2_HCB_ADDRESS_HIGH_OFFSET            (0x0000007C)
 314 
 315 /*
 316  * Offsets for the Request Queue
 317  */
 318 #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET     (0x000000C0)
 319 #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET    (0x000000C4)
 320 
 321 /*
 322  * Offset for the Supplimentary Host Index Base
 323  * For use with more than 8 MSI-X interrupts.
 324  */
 325 #define MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET   (0x0000030C)
 326 
 327 
 328 /*****************************************************************************
 329 *
 330 *        Message Descriptors
 331 *
 332 *****************************************************************************/
 333 
 334 /* Request Descriptors */
 335 
 336 /* Default Request Descriptor */
 337 typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
 338 {
 339     U8              RequestFlags;               /* 0x00 */
 340     U8              MSIxIndex;                  /* 0x01 */
 341     U16             SMID;                       /* 0x02 */
 342     U16             LMID;                       /* 0x04 */
 343     U16             DescriptorTypeDependent;    /* 0x06 */
 344 } MPI2_DEFAULT_REQUEST_DESCRIPTOR,
 345   MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
 346   Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
 347 
 348 /* defines for the RequestFlags field */
 349 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK               (0x0E)
 350 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO                 (0x00)
 351 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET             (0x02)
 352 #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY           (0x06)
 353 #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE            (0x08)
 354 #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR        (0x0A)
 355 #define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO      (0x0C)
 356 
 357 #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
 358 
 359 
 360 /* High Priority Request Descriptor */
 361 typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
 362 {
 363     U8              RequestFlags;               /* 0x00 */
 364     U8              MSIxIndex;                  /* 0x01 */
 365     U16             SMID;                       /* 0x02 */
 366     U16             LMID;                       /* 0x04 */
 367     U16             Reserved1;                  /* 0x06 */
 368 } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
 369   MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
 370   Mpi2HighPriorityRequestDescriptor_t,
 371   MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
 372 
 373 
 374 /* SCSI IO Request Descriptor */
 375 typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR


 395 } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
 396   MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
 397   Mpi2SCSITargetRequestDescriptor_t,
 398   MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
 399 
 400 
 401 /* RAID Accelerator Request Descriptor */
 402 typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR
 403 {
 404     U8              RequestFlags;               /* 0x00 */
 405     U8              MSIxIndex;                  /* 0x01 */
 406     U16             SMID;                       /* 0x02 */
 407     U16             LMID;                       /* 0x04 */
 408     U16             Reserved;                   /* 0x06 */
 409 } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
 410   MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
 411   Mpi2RAIDAcceleratorRequestDescriptor_t,
 412   MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
 413 
 414 
 415 /* Fast Path SCSI IO Request Descriptor */
 416 typedef MPI2_SCSI_IO_REQUEST_DESCRIPTOR
 417     MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
 418     MPI2_POINTER PTR_MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
 419     Mpi25FastPathSCSIIORequestDescriptor_t,
 420     MPI2_POINTER pMpi25FastPathSCSIIORequestDescriptor_t;
 421 
 422 
 423 /* union of Request Descriptors */
 424 typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
 425 {
 426     MPI2_DEFAULT_REQUEST_DESCRIPTOR             Default;
 427     MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR       HighPriority;
 428     MPI2_SCSI_IO_REQUEST_DESCRIPTOR             SCSIIO;
 429     MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR         SCSITarget;
 430     MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR          RAIDAccelerator;
 431     MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR         FastPathSCSIIO;
 432     U64                                         Words;
 433 } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
 434   Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
 435 
 436 
 437 /* Reply Descriptors */
 438 
 439 /* Default Reply Descriptor */
 440 typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
 441 {
 442     U8              ReplyFlags;                 /* 0x00 */
 443     U8              MSIxIndex;                  /* 0x01 */
 444     U16             DescriptorTypeDependent1;   /* 0x02 */
 445     U32             DescriptorTypeDependent2;   /* 0x04 */
 446 } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
 447   Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
 448 
 449 /* defines for the ReplyFlags field */
 450 #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK                   (0x0F)
 451 #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS             (0x00)
 452 #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY               (0x01)
 453 #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS        (0x02)
 454 #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER       (0x03)
 455 #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS    (0x05)
 456 #define MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS  (0x06)
 457 #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED                      (0x0F)
 458 
 459 /* values for marking a reply descriptor as unused */
 460 #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK             (0xFFFFFFFF)
 461 #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK             (0xFFFFFFFF)
 462 
 463 /* Address Reply Descriptor */
 464 typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
 465 {
 466     U8              ReplyFlags;                 /* 0x00 */
 467     U8              MSIxIndex;                  /* 0x01 */
 468     U16             SMID;                       /* 0x02 */
 469     U32             ReplyFrameAddress;          /* 0x04 */
 470 } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
 471   Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
 472 
 473 #define MPI2_ADDRESS_REPLY_SMID_INVALID                 (0x00)
 474 
 475 
 476 /* SCSI IO Success Reply Descriptor */


 516   Mpi2TargetCommandBufferReplyDescriptor_t,
 517   MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
 518 
 519 /* defines for Flags field */
 520 #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK     (0x3F)
 521 
 522 
 523 /* RAID Accelerator Success Reply Descriptor */
 524 typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR
 525 {
 526     U8              ReplyFlags;                 /* 0x00 */
 527     U8              MSIxIndex;                  /* 0x01 */
 528     U16             SMID;                       /* 0x02 */
 529     U32             Reserved;                   /* 0x04 */
 530 } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
 531   MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
 532   Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
 533   MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
 534 
 535 
 536 /* Fast Path SCSI IO Success Reply Descriptor */
 537 typedef MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
 538     MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
 539     MPI2_POINTER PTR_MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
 540     Mpi25FastPathSCSIIOSuccessReplyDescriptor_t,
 541     MPI2_POINTER pMpi25FastPathSCSIIOSuccessReplyDescriptor_t;
 542 
 543 
 544 /* union of Reply Descriptors */
 545 typedef union _MPI2_REPLY_DESCRIPTORS_UNION
 546 {
 547     MPI2_DEFAULT_REPLY_DESCRIPTOR                   Default;
 548     MPI2_ADDRESS_REPLY_DESCRIPTOR                   AddressReply;
 549     MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR           SCSIIOSuccess;
 550     MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR      TargetAssistSuccess;
 551     MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR     TargetCommandBuffer;
 552     MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR  RAIDAcceleratorSuccess;
 553     MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR       FastPathSCSIIOSuccess;
 554     U64                                             Words;
 555 } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
 556   Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
 557 
 558 
 559 
 560 /*****************************************************************************
 561 *
 562 *        Message Functions
 563 *              0x80 -> 0x8F reserved for private message use per product
 564 *
 565 *
 566 *****************************************************************************/
 567 
 568 #define MPI2_FUNCTION_SCSI_IO_REQUEST               (0x00) /* SCSI IO */
 569 #define MPI2_FUNCTION_SCSI_TASK_MGMT                (0x01) /* SCSI Task Management */
 570 #define MPI2_FUNCTION_IOC_INIT                      (0x02) /* IOC Init */
 571 #define MPI2_FUNCTION_IOC_FACTS                     (0x03) /* IOC Facts */
 572 #define MPI2_FUNCTION_CONFIG                        (0x04) /* Configuration */
 573 #define MPI2_FUNCTION_PORT_FACTS                    (0x05) /* Port Facts */
 574 #define MPI2_FUNCTION_PORT_ENABLE                   (0x06) /* Port Enable */
 575 #define MPI2_FUNCTION_EVENT_NOTIFICATION            (0x07) /* Event Notification */
 576 #define MPI2_FUNCTION_EVENT_ACK                     (0x08) /* Event Acknowledge */
 577 #define MPI2_FUNCTION_FW_DOWNLOAD                   (0x09) /* FW Download */
 578 #define MPI2_FUNCTION_TARGET_ASSIST                 (0x0B) /* Target Assist */
 579 #define MPI2_FUNCTION_TARGET_STATUS_SEND            (0x0C) /* Target Status Send */
 580 #define MPI2_FUNCTION_TARGET_MODE_ABORT             (0x0D) /* Target Mode Abort */
 581 #define MPI2_FUNCTION_FW_UPLOAD                     (0x12) /* FW Upload */
 582 #define MPI2_FUNCTION_RAID_ACTION                   (0x15) /* RAID Action */
 583 #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH      (0x16) /* SCSI IO RAID Passthrough */
 584 #define MPI2_FUNCTION_TOOLBOX                       (0x17) /* Toolbox */
 585 #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR      (0x18) /* SCSI Enclosure Processor */
 586 #define MPI2_FUNCTION_SMP_PASSTHROUGH               (0x1A) /* SMP Passthrough */
 587 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL           (0x1B) /* SAS IO Unit Control */
 588 #define MPI2_FUNCTION_SATA_PASSTHROUGH              (0x1C) /* SATA Passthrough */
 589 #define MPI2_FUNCTION_DIAG_BUFFER_POST              (0x1D) /* Diagnostic Buffer Post */
 590 #define MPI2_FUNCTION_DIAG_RELEASE                  (0x1E) /* Diagnostic Release */
 591 #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST      (0x24) /* Target Command Buffer Post Base */
 592 #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST      (0x25) /* Target Command Buffer Post List */
 593 #define MPI2_FUNCTION_RAID_ACCELERATOR              (0x2C) /* RAID Accelerator */
 594 #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION   (0x2F) /* Host Based Discovery Action */
 595 #define MPI2_FUNCTION_PWR_MGMT_CONTROL              (0x30) /* Power Management Control */
 596 #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC          (0xF0) /* beginning of product-specific range */
 597 #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC          (0xFF) /* end of product-specific range */
 598 
 599 
 600 
 601 /* Doorbell functions */
 602 #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET        (0x40)

 603 #define MPI2_FUNCTION_HANDSHAKE                     (0x42)
 604 
 605 
 606 /*****************************************************************************
 607 *
 608 *        IOC Status Values
 609 *
 610 *****************************************************************************/
 611 
 612 /* mask for IOCStatus status value */
 613 #define MPI2_IOCSTATUS_MASK                     (0x7FFF)
 614 
 615 /****************************************************************************
 616 *  Common IOCStatus values for all replies
 617 ****************************************************************************/
 618 
 619 #define MPI2_IOCSTATUS_SUCCESS                      (0x0000)
 620 #define MPI2_IOCSTATUS_INVALID_FUNCTION             (0x0001)
 621 #define MPI2_IOCSTATUS_BUSY                         (0x0002)
 622 #define MPI2_IOCSTATUS_INVALID_SGL                  (0x0003)


 810 typedef struct _MPI2_SGE_SIMPLE64
 811 {
 812     U32                     FlagsLength;
 813     U64                     Address;
 814 } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
 815   Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
 816 
 817 typedef struct _MPI2_SGE_SIMPLE_UNION
 818 {
 819     U32                     FlagsLength;
 820     union
 821     {
 822         U32                 Address32;
 823         U64                 Address64;
 824     } u;
 825 } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
 826   Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
 827 
 828 
 829 /****************************************************************************
 830 *  MPI Chain Element structures - for MPI v2.0 products only
 831 ****************************************************************************/
 832 
 833 typedef struct _MPI2_SGE_CHAIN32
 834 {
 835     U16                     Length;
 836     U8                      NextChainOffset;
 837     U8                      Flags;
 838     U32                     Address;
 839 } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
 840   Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
 841 
 842 typedef struct _MPI2_SGE_CHAIN64
 843 {
 844     U16                     Length;
 845     U8                      NextChainOffset;
 846     U8                      Flags;
 847     U64                     Address;
 848 } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
 849   Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
 850 
 851 typedef struct _MPI2_SGE_CHAIN_UNION
 852 {
 853     U16                     Length;
 854     U8                      NextChainOffset;
 855     U8                      Flags;
 856     union
 857     {
 858         U32                 Address32;
 859         U64                 Address64;
 860     } u;
 861 } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
 862   Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
 863 
 864 
 865 /****************************************************************************
 866 *  MPI Transaction Context Element structures - for MPI v2.0 products only
 867 ****************************************************************************/
 868 
 869 typedef struct _MPI2_SGE_TRANSACTION32
 870 {
 871     U8                      Reserved;
 872     U8                      ContextSize;
 873     U8                      DetailsLength;
 874     U8                      Flags;
 875     U32                     TransactionContext[1];
 876     U32                     TransactionDetails[1];
 877 } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
 878   Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
 879 
 880 typedef struct _MPI2_SGE_TRANSACTION64
 881 {
 882     U8                      Reserved;
 883     U8                      ContextSize;
 884     U8                      DetailsLength;
 885     U8                      Flags;
 886     U32                     TransactionContext[2];


 912 
 913 typedef struct _MPI2_SGE_TRANSACTION_UNION
 914 {
 915     U8                      Reserved;
 916     U8                      ContextSize;
 917     U8                      DetailsLength;
 918     U8                      Flags;
 919     union
 920     {
 921         U32                 TransactionContext32[1];
 922         U32                 TransactionContext64[2];
 923         U32                 TransactionContext96[3];
 924         U32                 TransactionContext128[4];
 925     } u;
 926     U32                     TransactionDetails[1];
 927 } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
 928   Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
 929 
 930 
 931 /****************************************************************************
 932 *  MPI SGE union for IO SGL's - for MPI v2.0 products only
 933 ****************************************************************************/
 934 
 935 typedef struct _MPI2_MPI_SGE_IO_UNION
 936 {
 937     union
 938     {
 939         MPI2_SGE_SIMPLE_UNION   Simple;
 940         MPI2_SGE_CHAIN_UNION    Chain;
 941     } u;
 942 } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
 943   Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
 944 
 945 
 946 /****************************************************************************
 947 *  MPI SGE union for SGL's with Simple and Transaction elements - for MPI v2.0 products only
 948 ****************************************************************************/
 949 
 950 typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
 951 {
 952     union
 953     {
 954         MPI2_SGE_SIMPLE_UNION       Simple;
 955         MPI2_SGE_TRANSACTION_UNION  Transaction;
 956     } u;
 957 } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
 958   Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
 959 
 960 
 961 /****************************************************************************
 962 *  All MPI SGE types union
 963 ****************************************************************************/
 964 
 965 typedef struct _MPI2_MPI_SGE_UNION
 966 {
 967     union


 978 *  MPI SGE field definition and masks
 979 ****************************************************************************/
 980 
 981 /* Flags field bit definitions */
 982 
 983 #define MPI2_SGE_FLAGS_LAST_ELEMENT             (0x80)
 984 #define MPI2_SGE_FLAGS_END_OF_BUFFER            (0x40)
 985 #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK        (0x30)
 986 #define MPI2_SGE_FLAGS_LOCAL_ADDRESS            (0x08)
 987 #define MPI2_SGE_FLAGS_DIRECTION                (0x04)
 988 #define MPI2_SGE_FLAGS_ADDRESS_SIZE             (0x02)
 989 #define MPI2_SGE_FLAGS_END_OF_LIST              (0x01)
 990 
 991 #define MPI2_SGE_FLAGS_SHIFT                    (24)
 992 
 993 #define MPI2_SGE_LENGTH_MASK                    (0x00FFFFFF)
 994 #define MPI2_SGE_CHAIN_LENGTH_MASK              (0x0000FFFF)
 995 
 996 /* Element Type */
 997 
 998 #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT      (0x00) /* for MPI v2.0 products only */
 999 #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT           (0x10)
1000 #define MPI2_SGE_FLAGS_CHAIN_ELEMENT            (0x30) /* for MPI v2.0 products only */
1001 #define MPI2_SGE_FLAGS_ELEMENT_MASK             (0x30)
1002 
1003 /* Address location */
1004 
1005 #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS           (0x00)
1006 
1007 /* Direction */
1008 
1009 #define MPI2_SGE_FLAGS_IOC_TO_HOST              (0x00)
1010 #define MPI2_SGE_FLAGS_HOST_TO_IOC              (0x04)
1011 
1012 #define MPI2_SGE_FLAGS_DEST                     (MPI2_SGE_FLAGS_IOC_TO_HOST)
1013 #define MPI2_SGE_FLAGS_SOURCE                   (MPI2_SGE_FLAGS_HOST_TO_IOC)
1014 
1015 /* Address Size */
1016 
1017 #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING        (0x00)
1018 #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING        (0x02)
1019 
1020 /* Context Size */
1021 
1022 #define MPI2_SGE_FLAGS_32_BIT_CONTEXT           (0x00)
1023 #define MPI2_SGE_FLAGS_64_BIT_CONTEXT           (0x02)
1024 #define MPI2_SGE_FLAGS_96_BIT_CONTEXT           (0x04)
1025 #define MPI2_SGE_FLAGS_128_BIT_CONTEXT          (0x06)
1026 
1027 #define MPI2_SGE_CHAIN_OFFSET_MASK              (0x00FF0000)
1028 #define MPI2_SGE_CHAIN_OFFSET_SHIFT             (16)
1029 
1030 /****************************************************************************
1031 *  MPI SGE operation Macros
1032 ****************************************************************************/
1033 
1034 /* SIMPLE FlagsLength manipulations... */


1043 #define MPI2_pSGE_GET_LENGTH(psg)           MPI2_SGE_LENGTH((psg)->FlagsLength)
1044 #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
1045 
1046 /* CAUTION - The following are READ-MODIFY-WRITE! */
1047 #define MPI2_pSGE_SET_FLAGS(psg,f)      (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
1048 #define MPI2_pSGE_SET_LENGTH(psg,l)     (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
1049 
1050 #define MPI2_GET_CHAIN_OFFSET(x)    ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
1051 
1052 
1053 /*****************************************************************************
1054 *
1055 *        Fusion-MPT IEEE Scatter Gather Elements
1056 *
1057 *****************************************************************************/
1058 
1059 /****************************************************************************
1060 *  IEEE Simple Element structures
1061 ****************************************************************************/
1062 
1063 /* MPI2_IEEE_SGE_SIMPLE32 is for MPI v2.0 products only */
1064 typedef struct _MPI2_IEEE_SGE_SIMPLE32
1065 {
1066     U32                     Address;
1067     U32                     FlagsLength;
1068 } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
1069   Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
1070 
1071 typedef struct _MPI2_IEEE_SGE_SIMPLE64
1072 {
1073     U64                     Address;
1074     U32                     Length;
1075     U16                     Reserved1;
1076     U8                      Reserved2;
1077     U8                      Flags;
1078 } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
1079   Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
1080 
1081 typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
1082 {
1083     MPI2_IEEE_SGE_SIMPLE32  Simple32;
1084     MPI2_IEEE_SGE_SIMPLE64  Simple64;
1085 } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
1086   Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
1087 
1088 
1089 /****************************************************************************
1090 *  IEEE Chain Element structures
1091 ****************************************************************************/
1092 
1093 /* MPI2_IEEE_SGE_CHAIN32 is for MPI v2.0 products only */
1094 typedef MPI2_IEEE_SGE_SIMPLE32  MPI2_IEEE_SGE_CHAIN32;
1095 
1096 /* MPI2_IEEE_SGE_CHAIN64 is for MPI v2.0 products only */
1097 typedef MPI2_IEEE_SGE_SIMPLE64  MPI2_IEEE_SGE_CHAIN64;
1098 
1099 typedef union _MPI2_IEEE_SGE_CHAIN_UNION
1100 {
1101     MPI2_IEEE_SGE_CHAIN32   Chain32;
1102     MPI2_IEEE_SGE_CHAIN64   Chain64;
1103 } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
1104   Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
1105 
1106 /* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */
1107 typedef struct _MPI25_IEEE_SGE_CHAIN64
1108 {
1109     U64                     Address;
1110     U32                     Length;
1111     U16                     Reserved1;
1112     U8                      NextChainOffset;
1113     U8                      Flags;
1114 } MPI25_IEEE_SGE_CHAIN64, MPI2_POINTER PTR_MPI25_IEEE_SGE_CHAIN64,
1115   Mpi25IeeeSgeChain64_t, MPI2_POINTER pMpi25IeeeSgeChain64_t;
1116 
1117 
1118 /****************************************************************************
1119 *  All IEEE SGE types union
1120 ****************************************************************************/
1121 
1122 /* MPI2_IEEE_SGE_UNION is for MPI v2.0 products only */
1123 typedef struct _MPI2_IEEE_SGE_UNION
1124 {
1125     union
1126     {
1127         MPI2_IEEE_SGE_SIMPLE_UNION  Simple;
1128         MPI2_IEEE_SGE_CHAIN_UNION   Chain;
1129     } u;
1130 } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
1131   Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
1132 
1133 
1134 /****************************************************************************
1135 *  IEEE SGE union for IO SGL's
1136 ****************************************************************************/
1137 
1138 typedef union _MPI25_SGE_IO_UNION
1139 {
1140     MPI2_IEEE_SGE_SIMPLE64      IeeeSimple;
1141     MPI25_IEEE_SGE_CHAIN64      IeeeChain;
1142 } MPI25_SGE_IO_UNION, MPI2_POINTER PTR_MPI25_SGE_IO_UNION,
1143   Mpi25SGEIOUnion_t, MPI2_POINTER pMpi25SGEIOUnion_t;
1144 
1145 
1146 /****************************************************************************
1147 *  IEEE SGE field definitions and masks
1148 ****************************************************************************/
1149 
1150 /* Flags field bit definitions */
1151 
1152 #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK   (0x80)
1153 #define MPI25_IEEE_SGE_FLAGS_END_OF_LIST        (0x40)
1154 
1155 #define MPI2_IEEE32_SGE_FLAGS_SHIFT             (24)
1156 
1157 #define MPI2_IEEE32_SGE_LENGTH_MASK             (0x00FFFFFF)
1158 
1159 /* Element Type */
1160 
1161 #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT      (0x00)
1162 #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT       (0x80)
1163 
1164 /* Data Location Address Space */
1165 
1166 #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK           (0x03)
1167 #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR         (0x00) /* IEEE Simple Element only */
1168 #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR         (0x01) /* IEEE Simple Element only */
1169 #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR         (0x02)
1170 #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR      (0x03) /* IEEE Simple Element only */
1171 #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR   (0x03) /* IEEE Chain Element only */
1172 
1173 
1174 /****************************************************************************
1175 *  IEEE SGE operation Macros
1176 ****************************************************************************/
1177 
1178 /* SIMPLE FlagsLength manipulations... */
1179 #define MPI2_IEEE32_SGE_SET_FLAGS(f)     ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1180 #define MPI2_IEEE32_SGE_GET_FLAGS(f)     (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1181 #define MPI2_IEEE32_SGE_LENGTH(f)        ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1182 
1183 #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l)      (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1184 
1185 #define MPI2_IEEE32_pSGE_GET_FLAGS(psg)             MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1186 #define MPI2_IEEE32_pSGE_GET_LENGTH(psg)            MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1187 #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l)  (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1188 
1189 /* CAUTION - The following are READ-MODIFY-WRITE! */
1190 #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f)    (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1191 #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l)   (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)