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Add support for more than 8 MSI-X interrupts.
Tidy up interrupt assignement and card ID messages.
Initial modifications using the code changes present between
the LSI source code for FreeBSD drivers. Specifically the changes
between from mpslsi-source-17.00.00.00 -> mpslsi-source-03.00.00.00.
This mainly involves using a different scatter/gather element in
frame setup.

*** 18,29 **** * * CDDL HEADER END */ /* ! * Copyright (c) 2000 to 2009, LSI Corporation. ! * All rights reserved. * * Redistribution and use in source and binary forms of all code within * this file that is exclusively owned by LSI, with or without * modification, is permitted provided that, in addition to the CDDL 1.0 * License requirements, the following conditions are met: --- 18,28 ---- * * CDDL HEADER END */ /* ! * Copyright (c) 2000-2012 LSI Corporation. * * Redistribution and use in source and binary forms of all code within * this file that is exclusively owned by LSI, with or without * modification, is permitted provided that, in addition to the CDDL 1.0 * License requirements, the following conditions are met:
*** 51,61 **** * Title: MPI Message independent structures and definitions * including System Interface Register Set and * scatter/gather formats. * Creation Date: June 21, 2006 * ! * mpi2.h Version: 02.00.13 * * Version History * --------------- * * Date Version Description --- 50,65 ---- * Title: MPI Message independent structures and definitions * including System Interface Register Set and * scatter/gather formats. * Creation Date: June 21, 2006 * ! * mpi2.h Version: 02.00.xx ! * ! * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 ! * prefix are for use only on MPI v2.5 products, and must not be used ! * with MPI v2.0 products. Unless otherwise noted, names beginning with ! * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. * * Version History * --------------- * * Date Version Description
*** 109,131 **** * * MPI Version Definitions * *****************************************************************************/ - #define MPI2_VERSION_MAJOR (0x02) - #define MPI2_VERSION_MINOR (0x00) #define MPI2_VERSION_MAJOR_MASK (0xFF00) #define MPI2_VERSION_MAJOR_SHIFT (8) #define MPI2_VERSION_MINOR_MASK (0x00FF) #define MPI2_VERSION_MINOR_SHIFT (0) #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ MPI2_VERSION_MINOR) - #define MPI2_VERSION_02_00 (0x0200) ! /* versioning for this MPI header set */ ! #define MPI2_HEADER_VERSION_UNIT (0x0D) #define MPI2_HEADER_VERSION_DEV (0x00) #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) #define MPI2_HEADER_VERSION_UNIT_SHIFT (8) #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF) #define MPI2_HEADER_VERSION_DEV_SHIFT (0) --- 113,146 ---- * * MPI Version Definitions * *****************************************************************************/ #define MPI2_VERSION_MAJOR_MASK (0xFF00) #define MPI2_VERSION_MAJOR_SHIFT (8) #define MPI2_VERSION_MINOR_MASK (0x00FF) #define MPI2_VERSION_MINOR_SHIFT (0) + + /* major version for all MPI v2.x */ + #define MPI2_VERSION_MAJOR (0x02) + + /* minor version for MPI v2.0 compatible products */ + #define MPI2_VERSION_MINOR (0x00) #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ MPI2_VERSION_MINOR) #define MPI2_VERSION_02_00 (0x0200) ! ! /* minor version for MPI v2.5 compatible products */ ! #define MPI25_VERSION_MINOR (0x05) ! #define MPI25_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ ! MPI25_VERSION_MINOR) ! #define MPI2_VERSION_02_05 (0x0205) ! ! ! /* Unit and Dev versioning for this MPI header set */ ! #define MPI2_HEADER_VERSION_UNIT (0x12) #define MPI2_HEADER_VERSION_DEV (0x00) #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) #define MPI2_HEADER_VERSION_UNIT_SHIFT (8) #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF) #define MPI2_HEADER_VERSION_DEV_SHIFT (0)
*** 181,190 **** --- 196,208 ---- U32 HCBAddressHigh; /* 0x7C */ U32 Reserved6[16]; /* 0x80 */ U32 RequestDescriptorPostLow; /* 0xC0 */ U32 RequestDescriptorPostHigh; /* 0xC4 */ U32 Reserved7[14]; /* 0xC8 */ + U32 Reserved8[128]; /* 0x100 */ + U32 Reserved10[3]; /* 0x300 */ + U32 SuppReplyPostHostIndex[32]; /* 0x30C */ } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS, Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t; /* * Defines for working with the Doorbell register.
*** 278,287 **** --- 296,308 ---- /* * Offset for the Reply Descriptor Post Queue */ #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C) + #define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF) + #define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000) + #define MPI2_RPHI_MSIX_INDEX_SHIFT (24) /* * Defines for the HCBSize and address */ #define MPI2_HCB_SIZE_OFFSET (0x00000074)
*** 295,304 **** --- 316,331 ---- * Offsets for the Request Queue */ #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0) #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4) + /* + * Offset for the Supplimentary Host Index Base + * For use with more than 8 MSI-X interrupts. + */ + #define MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET (0x0000030C) + /***************************************************************************** * * Message Descriptors *
*** 323,332 **** --- 350,360 ---- #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00) #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02) #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06) #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08) #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A) + #define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO (0x0C) #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01) /* High Priority Request Descriptor */
*** 382,399 **** --- 410,436 ---- MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, Mpi2RAIDAcceleratorRequestDescriptor_t, MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t; + /* Fast Path SCSI IO Request Descriptor */ + typedef MPI2_SCSI_IO_REQUEST_DESCRIPTOR + MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR, + MPI2_POINTER PTR_MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR, + Mpi25FastPathSCSIIORequestDescriptor_t, + MPI2_POINTER pMpi25FastPathSCSIIORequestDescriptor_t; + + /* union of Request Descriptors */ typedef union _MPI2_REQUEST_DESCRIPTOR_UNION { MPI2_DEFAULT_REQUEST_DESCRIPTOR Default; MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority; MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO; MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget; MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator; + MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR FastPathSCSIIO; U64 Words; } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION, Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
*** 414,423 **** --- 451,461 ---- #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00) #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01) #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02) #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03) #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05) + #define MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS (0x06) #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F) /* values for marking a reply descriptor as unused */ #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF) #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
*** 493,511 **** --- 531,558 ---- MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, Mpi2RAIDAcceleratorSuccessReplyDescriptor_t, MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t; + /* Fast Path SCSI IO Success Reply Descriptor */ + typedef MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR + MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, + MPI2_POINTER PTR_MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, + Mpi25FastPathSCSIIOSuccessReplyDescriptor_t, + MPI2_POINTER pMpi25FastPathSCSIIOSuccessReplyDescriptor_t; + + /* union of Reply Descriptors */ typedef union _MPI2_REPLY_DESCRIPTORS_UNION { MPI2_DEFAULT_REPLY_DESCRIPTOR Default; MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply; MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess; MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess; MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer; MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess; + MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR FastPathSCSIIOSuccess; U64 Words; } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION, Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
*** 542,557 **** #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */ #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */ #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ #define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator */ /* Doorbell functions */ #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) - /* #define MPI2_FUNCTION_IO_UNIT_RESET (0x41) */ #define MPI2_FUNCTION_HANDSHAKE (0x42) /***************************************************************************** * --- 589,607 ---- #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */ #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */ #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ #define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator */ + #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F) /* Host Based Discovery Action */ + #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30) /* Power Management Control */ + #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0) /* beginning of product-specific range */ + #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF) /* end of product-specific range */ /* Doorbell functions */ #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) #define MPI2_FUNCTION_HANDSHAKE (0x42) /***************************************************************************** *
*** 775,785 **** } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; /**************************************************************************** ! * MPI Chain Element structures ****************************************************************************/ typedef struct _MPI2_SGE_CHAIN32 { U16 Length; --- 825,835 ---- } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; /**************************************************************************** ! * MPI Chain Element structures - for MPI v2.0 products only ****************************************************************************/ typedef struct _MPI2_SGE_CHAIN32 { U16 Length;
*** 811,821 **** } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; /**************************************************************************** ! * MPI Transaction Context Element structures ****************************************************************************/ typedef struct _MPI2_SGE_TRANSACTION32 { U8 Reserved; --- 861,871 ---- } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; /**************************************************************************** ! * MPI Transaction Context Element structures - for MPI v2.0 products only ****************************************************************************/ typedef struct _MPI2_SGE_TRANSACTION32 { U8 Reserved;
*** 877,887 **** } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; /**************************************************************************** ! * MPI SGE union for IO SGL's ****************************************************************************/ typedef struct _MPI2_MPI_SGE_IO_UNION { union --- 927,937 ---- } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; /**************************************************************************** ! * MPI SGE union for IO SGL's - for MPI v2.0 products only ****************************************************************************/ typedef struct _MPI2_MPI_SGE_IO_UNION { union
*** 892,902 **** } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; /**************************************************************************** ! * MPI SGE union for SGL's with Simple and Transaction elements ****************************************************************************/ typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION { union --- 942,952 ---- } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; /**************************************************************************** ! * MPI SGE union for SGL's with Simple and Transaction elements - for MPI v2.0 products only ****************************************************************************/ typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION { union
*** 943,955 **** #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF) #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) /* Element Type */ ! #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10) ! #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30) /* Address location */ #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00) --- 993,1005 ---- #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF) #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) /* Element Type */ ! #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) /* for MPI v2.0 products only */ #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10) ! #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) /* for MPI v2.0 products only */ #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30) /* Address location */ #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
*** 957,966 **** --- 1007,1019 ---- /* Direction */ #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00) #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04) + #define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST) + #define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC) + /* Address Size */ #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00) #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
*** 1005,1014 **** --- 1058,1068 ---- /**************************************************************************** * IEEE Simple Element structures ****************************************************************************/ + /* MPI2_IEEE_SGE_SIMPLE32 is for MPI v2.0 products only */ typedef struct _MPI2_IEEE_SGE_SIMPLE32 { U32 Address; U32 FlagsLength; } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
*** 1034,1059 **** --- 1088,1127 ---- /**************************************************************************** * IEEE Chain Element structures ****************************************************************************/ + /* MPI2_IEEE_SGE_CHAIN32 is for MPI v2.0 products only */ typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32; + /* MPI2_IEEE_SGE_CHAIN64 is for MPI v2.0 products only */ typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64; typedef union _MPI2_IEEE_SGE_CHAIN_UNION { MPI2_IEEE_SGE_CHAIN32 Chain32; MPI2_IEEE_SGE_CHAIN64 Chain64; } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION, Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t; + /* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */ + typedef struct _MPI25_IEEE_SGE_CHAIN64 + { + U64 Address; + U32 Length; + U16 Reserved1; + U8 NextChainOffset; + U8 Flags; + } MPI25_IEEE_SGE_CHAIN64, MPI2_POINTER PTR_MPI25_IEEE_SGE_CHAIN64, + Mpi25IeeeSgeChain64_t, MPI2_POINTER pMpi25IeeeSgeChain64_t; + /**************************************************************************** * All IEEE SGE types union ****************************************************************************/ + /* MPI2_IEEE_SGE_UNION is for MPI v2.0 products only */ typedef struct _MPI2_IEEE_SGE_UNION { union { MPI2_IEEE_SGE_SIMPLE_UNION Simple;
*** 1062,1077 **** --- 1130,1158 ---- } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION, Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t; /**************************************************************************** + * IEEE SGE union for IO SGL's + ****************************************************************************/ + + typedef union _MPI25_SGE_IO_UNION + { + MPI2_IEEE_SGE_SIMPLE64 IeeeSimple; + MPI25_IEEE_SGE_CHAIN64 IeeeChain; + } MPI25_SGE_IO_UNION, MPI2_POINTER PTR_MPI25_SGE_IO_UNION, + Mpi25SGEIOUnion_t, MPI2_POINTER pMpi25SGEIOUnion_t; + + + /**************************************************************************** * IEEE SGE field definitions and masks ****************************************************************************/ /* Flags field bit definitions */ #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80) + #define MPI25_IEEE_SGE_FLAGS_END_OF_LIST (0x40) #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24) #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
*** 1081,1094 **** #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80) /* Data Location Address Space */ #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03) ! #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) ! #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02) ! #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) /**************************************************************************** * IEEE SGE operation Macros ****************************************************************************/ --- 1162,1176 ---- #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80) /* Data Location Address Space */ #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03) ! #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) /* IEEE Simple Element only */ ! #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) /* IEEE Simple Element only */ #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02) ! #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) /* IEEE Simple Element only */ ! #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR (0x03) /* IEEE Chain Element only */ /**************************************************************************** * IEEE SGE operation Macros ****************************************************************************/