1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
  24  * Copyright 2014 Nexenta Systems, Inc. All rights reserved.
  25  * Copyright (c) 2014, Joyent, Inc. All rights reserved.
  26  * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
  27  * Copyright 2014 OmniTI Computer Consulting, Inc. All rights reserved.
  28  */
  29 
  30 /*
  31  * Copyright (c) 2000 to 2010, LSI Corporation.
  32  * All rights reserved.
  33  *
  34  * Redistribution and use in source and binary forms of all code within
  35  * this file that is exclusively owned by LSI, with or without
  36  * modification, is permitted provided that, in addition to the CDDL 1.0
  37  * License requirements, the following conditions are met:
  38  *
  39  *    Neither the name of the author nor the names of its contributors may be
  40  *    used to endorse or promote products derived from this software without
  41  *    specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  46  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  47  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  48  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  49  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  50  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  51  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  52  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  53  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
  54  * DAMAGE.
  55  */
  56 
  57 /*
  58  * mptsas3 - This is a driver based on LSI Logic's MPT2.0/2.5 interface.
  59  *
  60  */
  61 
  62 #if defined(lint) || defined(DEBUG)
  63 #define MPTSAS_DEBUG
  64 #endif
  65 
  66 /*
  67  * standard header files.
  68  */
  69 #include <sys/note.h>
  70 #include <sys/scsi/scsi.h>
  71 #include <sys/pci.h>
  72 #include <sys/file.h>
  73 #include <sys/policy.h>
  74 #include <sys/model.h>
  75 #include <sys/sysevent.h>
  76 #include <sys/sysevent/eventdefs.h>
  77 #include <sys/sysevent/dr.h>
  78 #include <sys/sata/sata_defs.h>
  79 #include <sys/scsi/generic/sas.h>
  80 #include <sys/scsi/impl/scsi_sas.h>
  81 
  82 #pragma pack(1)
  83 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2_type.h>
  84 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2.h>
  85 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2_cnfg.h>
  86 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2_init.h>
  87 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2_ioc.h>
  88 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2_sas.h>
  89 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2_tool.h>
  90 #include <sys/scsi/adapters/mpt_sas3/mpi/mpi2_raid.h>
  91 #pragma pack()
  92 
  93 /*
  94  * private header files.
  95  *
  96  */
  97 #include <sys/scsi/impl/scsi_reset_notify.h>
  98 #include <sys/scsi/adapters/mpt_sas3/mptsas3_var.h>
  99 #include <sys/scsi/adapters/mpt_sas3/mptsas3_ioctl.h>
 100 #include <sys/scsi/adapters/mpt_sas3/mptsas3_smhba.h>
 101 #include <sys/scsi/adapters/mpt_sas3/mptsas3_hash.h>
 102 #include <sys/raidioctl.h>
 103 
 104 #include <sys/fs/dv_node.h>       /* devfs_clean */
 105 
 106 /*
 107  * FMA header files
 108  */
 109 #include <sys/ddifm.h>
 110 #include <sys/fm/protocol.h>
 111 #include <sys/fm/util.h>
 112 #include <sys/fm/io/ddi.h>
 113 
 114 /*
 115  * autoconfiguration data and routines.
 116  */
 117 static int mptsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
 118 static int mptsas_detach(dev_info_t *devi, ddi_detach_cmd_t cmd);
 119 static int mptsas_power(dev_info_t *dip, int component, int level);
 120 
 121 /*
 122  * cb_ops function
 123  */
 124 static int mptsas_ioctl(dev_t dev, int cmd, intptr_t data, int mode,
 125         cred_t *credp, int *rval);
 126 #ifdef __sparc
 127 static int mptsas_reset(dev_info_t *devi, ddi_reset_cmd_t cmd);
 128 #else  /* __sparc */
 129 static int mptsas_quiesce(dev_info_t *devi);
 130 #endif  /* __sparc */
 131 
 132 /*
 133  * Resource initilaization for hardware
 134  */
 135 static void mptsas_setup_cmd_reg(mptsas_t *mpt);
 136 static void mptsas_disable_bus_master(mptsas_t *mpt);
 137 static void mptsas_hba_fini(mptsas_t *mpt);
 138 static void mptsas_cfg_fini(mptsas_t *mptsas_blkp);
 139 static int mptsas_hba_setup(mptsas_t *mpt);
 140 static void mptsas_hba_teardown(mptsas_t *mpt);
 141 static int mptsas_config_space_init(mptsas_t *mpt);
 142 static void mptsas_config_space_fini(mptsas_t *mpt);
 143 static void mptsas_iport_register(mptsas_t *mpt);
 144 static int mptsas_smp_setup(mptsas_t *mpt);
 145 static void mptsas_smp_teardown(mptsas_t *mpt);
 146 static int mptsas_cache_create(mptsas_t *mpt);
 147 static void mptsas_cache_destroy(mptsas_t *mpt);
 148 static int mptsas_alloc_request_frames(mptsas_t *mpt);
 149 static int mptsas_alloc_sense_bufs(mptsas_t *mpt);
 150 static int mptsas_alloc_reply_frames(mptsas_t *mpt);
 151 static int mptsas_alloc_free_queue(mptsas_t *mpt);
 152 static int mptsas_alloc_post_queue(mptsas_t *mpt);
 153 static void mptsas_free_post_queue(mptsas_t *mpt);
 154 static void mptsas_alloc_reply_args(mptsas_t *mpt);
 155 static int mptsas_alloc_extra_sgl_frame(mptsas_t *mpt, mptsas_cmd_t *cmd);
 156 static void mptsas_free_extra_sgl_frame(mptsas_t *mpt, mptsas_cmd_t *cmd);
 157 static int mptsas_init_chip(mptsas_t *mpt, int first_time);
 158 
 159 /*
 160  * SCSA function prototypes
 161  */
 162 static int mptsas_scsi_start(struct scsi_address *ap, struct scsi_pkt *pkt);
 163 static int mptsas_scsi_reset(struct scsi_address *ap, int level);
 164 static int mptsas_scsi_abort(struct scsi_address *ap, struct scsi_pkt *pkt);
 165 static int mptsas_scsi_getcap(struct scsi_address *ap, char *cap, int tgtonly);
 166 static int mptsas_scsi_setcap(struct scsi_address *ap, char *cap, int value,
 167     int tgtonly);
 168 static void mptsas_scsi_dmafree(struct scsi_address *ap, struct scsi_pkt *pkt);
 169 static struct scsi_pkt *mptsas_scsi_init_pkt(struct scsi_address *ap,
 170     struct scsi_pkt *pkt, struct buf *bp, int cmdlen, int statuslen,
 171         int tgtlen, int flags, int (*callback)(), caddr_t arg);
 172 static void mptsas_scsi_sync_pkt(struct scsi_address *ap, struct scsi_pkt *pkt);
 173 static void mptsas_scsi_destroy_pkt(struct scsi_address *ap,
 174     struct scsi_pkt *pkt);
 175 static int mptsas_scsi_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
 176     scsi_hba_tran_t *hba_tran, struct scsi_device *sd);
 177 static void mptsas_scsi_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
 178     scsi_hba_tran_t *hba_tran, struct scsi_device *sd);
 179 static int mptsas_scsi_reset_notify(struct scsi_address *ap, int flag,
 180     void (*callback)(caddr_t), caddr_t arg);
 181 static int mptsas_get_name(struct scsi_device *sd, char *name, int len);
 182 static int mptsas_get_bus_addr(struct scsi_device *sd, char *name, int len);
 183 static int mptsas_scsi_quiesce(dev_info_t *dip);
 184 static int mptsas_scsi_unquiesce(dev_info_t *dip);
 185 static int mptsas_bus_config(dev_info_t *pdip, uint_t flags,
 186     ddi_bus_config_op_t op, void *arg, dev_info_t **childp);
 187 
 188 /*
 189  * SMP functions
 190  */
 191 static int mptsas_smp_start(struct smp_pkt *smp_pkt);
 192 
 193 /*
 194  * internal function prototypes.
 195  */
 196 static void mptsas_list_add(mptsas_t *mpt);
 197 static void mptsas_list_del(mptsas_t *mpt);
 198 
 199 static int mptsas_quiesce_bus(mptsas_t *mpt);
 200 static int mptsas_unquiesce_bus(mptsas_t *mpt);
 201 
 202 static int mptsas_alloc_handshake_msg(mptsas_t *mpt, size_t alloc_size);
 203 static void mptsas_free_handshake_msg(mptsas_t *mpt);
 204 
 205 static void mptsas_ncmds_checkdrain(void *arg);
 206 
 207 static int mptsas_prepare_pkt(mptsas_cmd_t *cmd);
 208 static void mptsas_retry_pkt(mptsas_t *mpt, mptsas_cmd_t *sp);
 209 static int mptsas_save_cmd_to_slot(mptsas_t *mpt, mptsas_cmd_t *cmd);
 210 static int mptsas_accept_pkt(mptsas_t *mpt, mptsas_cmd_t *sp,
 211     int *tran_rval);
 212 static void mptsas_accept_tx_waitqs(mptsas_t *mpt);
 213 static void mptsas_unblock_tx_waitqs(mptsas_t *mpt);
 214 static void mptsas_drain_tx_waitq(mptsas_t *mpt, mptsas_tx_waitqueue_t *txwq);
 215 static int mptsas_check_targ_intxtion(mptsas_target_t *ptgt, int cmd_pkt_flags);
 216 
 217 static int mptsas_do_detach(dev_info_t *dev);
 218 static int mptsas_do_scsi_reset(mptsas_t *mpt, uint16_t devhdl);
 219 static int mptsas_do_scsi_abort(mptsas_t *mpt, int target, int lun,
 220     struct scsi_pkt *pkt);
 221 static int mptsas_scsi_capchk(char *cap, int tgtonly, int *cidxp);
 222 
 223 static void mptsas_handle_qfull(mptsas_t *mpt, mptsas_cmd_t *cmd);
 224 static void mptsas_handle_event(void *args);
 225 static int mptsas_handle_event_sync(void *args);
 226 static void mptsas_handle_dr(void *args);
 227 static void mptsas_handle_topo_change(mptsas_topo_change_list_t *topo_node,
 228     dev_info_t *pdip);
 229 
 230 static void mptsas_restart_cmd(void *);
 231 
 232 static void mptsas_flush_hba(mptsas_t *mpt);
 233 static void mptsas_flush_target(mptsas_t *mpt, ushort_t target, int lun,
 234         uint8_t tasktype);
 235 static void mptsas_set_pkt_reason(mptsas_t *mpt, mptsas_cmd_t *cmd,
 236     uchar_t reason, uint_t stat);
 237 
 238 static uint_t mptsas_intr(caddr_t arg1, caddr_t arg2);
 239 static void mptsas_process_intr(mptsas_t *mpt, mptsas_reply_pqueue_t *rpqp,
 240     pMpi2ReplyDescriptorsUnion_t reply_desc_union);
 241 static void mptsas_handle_scsi_io_success(mptsas_t *mpt,
 242     mptsas_reply_pqueue_t *rpqp, pMpi2ReplyDescriptorsUnion_t reply_desc);
 243 static void mptsas_handle_address_reply(mptsas_t *mpt,
 244     pMpi2ReplyDescriptorsUnion_t reply_desc);
 245 static int mptsas_wait_intr(mptsas_t *mpt, int polltime);
 246 static void mptsas_sge_setup(mptsas_t *mpt, mptsas_cmd_t *cmd,
 247     uint32_t *control, pMpi2SCSIIORequest_t frame, ddi_acc_handle_t acc_hdl);
 248 
 249 static void mptsas_watch(void *arg);
 250 static void mptsas_watchsubr(mptsas_t *mpt);
 251 static void mptsas_cmd_timeout(mptsas_t *mpt, mptsas_target_t *ptgt);
 252 
 253 static void mptsas_start_passthru(mptsas_t *mpt, mptsas_cmd_t *cmd);
 254 static int mptsas_do_passthru(mptsas_t *mpt, uint8_t *request, uint8_t *reply,
 255     uint8_t *data, uint32_t request_size, uint32_t reply_size,
 256     uint32_t data_size, uint8_t direction, uint8_t *dataout,
 257     uint32_t dataout_size, short timeout, int mode);
 258 static int mptsas_free_devhdl(mptsas_t *mpt, uint16_t devhdl);
 259 
 260 static uint8_t mptsas_get_fw_diag_buffer_number(mptsas_t *mpt,
 261     uint32_t unique_id);
 262 static void mptsas_start_diag(mptsas_t *mpt, mptsas_cmd_t *cmd);
 263 static int mptsas_post_fw_diag_buffer(mptsas_t *mpt,
 264     mptsas_fw_diagnostic_buffer_t *pBuffer, uint32_t *return_code);
 265 static int mptsas_release_fw_diag_buffer(mptsas_t *mpt,
 266     mptsas_fw_diagnostic_buffer_t *pBuffer, uint32_t *return_code,
 267     uint32_t diag_type);
 268 static int mptsas_diag_register(mptsas_t *mpt,
 269     mptsas_fw_diag_register_t *diag_register, uint32_t *return_code);
 270 static int mptsas_diag_unregister(mptsas_t *mpt,
 271     mptsas_fw_diag_unregister_t *diag_unregister, uint32_t *return_code);
 272 static int mptsas_diag_query(mptsas_t *mpt, mptsas_fw_diag_query_t *diag_query,
 273     uint32_t *return_code);
 274 static int mptsas_diag_read_buffer(mptsas_t *mpt,
 275     mptsas_diag_read_buffer_t *diag_read_buffer, uint8_t *ioctl_buf,
 276     uint32_t *return_code, int ioctl_mode);
 277 static int mptsas_diag_release(mptsas_t *mpt,
 278     mptsas_fw_diag_release_t *diag_release, uint32_t *return_code);
 279 static int mptsas_do_diag_action(mptsas_t *mpt, uint32_t action,
 280     uint8_t *diag_action, uint32_t length, uint32_t *return_code,
 281     int ioctl_mode);
 282 static int mptsas_diag_action(mptsas_t *mpt, mptsas_diag_action_t *data,
 283     int mode);
 284 
 285 static int mptsas_pkt_alloc_extern(mptsas_t *mpt, mptsas_cmd_t *cmd,
 286     int cmdlen, int tgtlen, int statuslen, int kf);
 287 static void mptsas_pkt_destroy_extern(mptsas_t *mpt, mptsas_cmd_t *cmd);
 288 
 289 static int mptsas_kmem_cache_constructor(void *buf, void *cdrarg, int kmflags);
 290 static void mptsas_kmem_cache_destructor(void *buf, void *cdrarg);
 291 
 292 static int mptsas_cache_frames_constructor(void *buf, void *cdrarg,
 293     int kmflags);
 294 static void mptsas_cache_frames_destructor(void *buf, void *cdrarg);
 295 
 296 static void mptsas_check_scsi_io_error(mptsas_t *mpt, pMpi2SCSIIOReply_t reply,
 297     mptsas_cmd_t *cmd);
 298 static void mptsas_check_task_mgt(mptsas_t *mpt,
 299     pMpi2SCSIManagementReply_t reply, mptsas_cmd_t *cmd);
 300 static int mptsas_send_scsi_cmd(mptsas_t *mpt, struct scsi_address *ap,
 301     mptsas_target_t *ptgt, uchar_t *cdb, int cdblen, struct buf *data_bp,
 302     int *resid);
 303 
 304 static int mptsas_alloc_active_slots(mptsas_t *mpt, int flag);
 305 static void mptsas_free_active_slots(mptsas_t *mpt);
 306 static int mptsas_start_cmd(mptsas_t *mpt, mptsas_cmd_t *cmd);
 307 
 308 static void mptsas_restart_hba(mptsas_t *mpt);
 309 static void mptsas_restart_waitq(mptsas_t *mpt);
 310 
 311 static void mptsas_deliver_doneq_thread(mptsas_t *mpt,
 312     mptsas_done_list_t *dlist);
 313 static void mptsas_doneq_add(mptsas_t *mpt, mptsas_cmd_t *cmd);
 314 static void mptsas_rpdoneq_add(mptsas_t *mpt, mptsas_reply_pqueue_t *rpqp,
 315     mptsas_cmd_t *cmd);
 316 static void mptsas_doneq_mv(mptsas_done_list_t *from,
 317     mptsas_doneq_thread_list_t *item);
 318 
 319 static mptsas_cmd_t *mptsas_doneq_thread_rm(mptsas_t *mpt, uint64_t t);
 320 static void mptsas_doneq_empty(mptsas_t *mpt);
 321 static void mptsas_rpdoneq_empty(mptsas_reply_pqueue_t *rpqp);
 322 static void mptsas_doneq_thread(mptsas_thread_arg_t *arg);
 323 static void mptsas_tx_waitq_thread(mptsas_thread_arg_t *arg);
 324 
 325 static mptsas_cmd_t *mptsas_waitq_rm(mptsas_t *mpt);
 326 static void mptsas_waitq_delete(mptsas_t *mpt, mptsas_cmd_t *cmd);
 327 
 328 static void mptsas_start_watch_reset_delay();
 329 static void mptsas_setup_bus_reset_delay(mptsas_t *mpt);
 330 static void mptsas_watch_reset_delay(void *arg);
 331 static int mptsas_watch_reset_delay_subr(mptsas_t *mpt);
 332 static void mptsas_set_throttle(struct mptsas *mpt, mptsas_target_t *ptgt,
 333     int what);
 334 static void mptsas_set_throttle_mtx(struct mptsas *mpt, mptsas_target_t *ptgt,
 335     int what);
 336 static void mptsas_remove_cmd_nomtx(mptsas_t *mpt, mptsas_cmd_t *cmd);
 337 
 338 /*
 339  * helper functions
 340  */
 341 static void mptsas_dump_cmd(mptsas_t *mpt, mptsas_cmd_t *cmd);
 342 
 343 static dev_info_t *mptsas_find_child(dev_info_t *pdip, char *name);
 344 static dev_info_t *mptsas_find_child_phy(dev_info_t *pdip, uint8_t phy);
 345 static dev_info_t *mptsas_find_child_addr(dev_info_t *pdip, uint64_t sasaddr,
 346     int lun);
 347 static mdi_pathinfo_t *mptsas_find_path_addr(dev_info_t *pdip, uint64_t sasaddr,
 348     int lun);
 349 static mdi_pathinfo_t *mptsas_find_path_phy(dev_info_t *pdip, uint8_t phy);
 350 static dev_info_t *mptsas_find_smp_child(dev_info_t *pdip, char *str_wwn);
 351 
 352 static int mptsas_parse_address(char *name, uint64_t *wwid, uint8_t *phy,
 353     int *lun);
 354 static int mptsas_parse_smp_name(char *name, uint64_t *wwn);
 355 
 356 static mptsas_target_t *mptsas_phy_to_tgt(mptsas_t *mpt,
 357     mptsas_phymask_t phymask, uint8_t phy);
 358 static mptsas_target_t *mptsas_wwid_to_ptgt(mptsas_t *mpt,
 359     mptsas_phymask_t phymask, uint64_t wwid);
 360 static mptsas_smp_t *mptsas_wwid_to_psmp(mptsas_t *mpt,
 361     mptsas_phymask_t phymask, uint64_t wwid);
 362 
 363 static int mptsas_inquiry(mptsas_t *mpt, mptsas_target_t *ptgt, int lun,
 364     uchar_t page, unsigned char *buf, int len, int *rlen, uchar_t evpd);
 365 
 366 static int mptsas_get_target_device_info(mptsas_t *mpt, uint32_t page_address,
 367     uint16_t *handle, mptsas_target_t **pptgt);
 368 static void mptsas_update_phymask(mptsas_t *mpt);
 369 
 370 static int mptsas_send_sep(mptsas_t *mpt, mptsas_target_t *ptgt,
 371     uint32_t *status, uint8_t cmd);
 372 static dev_info_t *mptsas_get_dip_from_dev(dev_t dev,
 373     mptsas_phymask_t *phymask);
 374 static mptsas_target_t *mptsas_addr_to_ptgt(mptsas_t *mpt, char *addr,
 375     mptsas_phymask_t phymask);
 376 static int mptsas_flush_led_status(mptsas_t *mpt, mptsas_target_t *ptgt);
 377 
 378 
 379 /*
 380  * Enumeration / DR functions
 381  */
 382 static void mptsas_config_all(dev_info_t *pdip);
 383 static int mptsas_config_one_addr(dev_info_t *pdip, uint64_t sasaddr, int lun,
 384     dev_info_t **lundip);
 385 static int mptsas_config_one_phy(dev_info_t *pdip, uint8_t phy, int lun,
 386     dev_info_t **lundip);
 387 
 388 static int mptsas_config_target(dev_info_t *pdip, mptsas_target_t *ptgt);
 389 static int mptsas_offline_targetdev(dev_info_t *pdip, char *name);
 390 static void mptsas_offline_target(mptsas_t *mpt, mptsas_target_t *ptgt,
 391     uint8_t topo_flags, dev_info_t *parent);
 392 
 393 static int mptsas_config_raid(dev_info_t *pdip, uint16_t target,
 394     dev_info_t **dip);
 395 
 396 static int mptsas_config_luns(dev_info_t *pdip, mptsas_target_t *ptgt);
 397 static int mptsas_probe_lun(dev_info_t *pdip, int lun,
 398     dev_info_t **dip, mptsas_target_t *ptgt);
 399 
 400 static int mptsas_create_lun(dev_info_t *pdip, struct scsi_inquiry *sd_inq,
 401     dev_info_t **dip, mptsas_target_t *ptgt, int lun);
 402 
 403 static int mptsas_create_phys_lun(dev_info_t *pdip, struct scsi_inquiry *sd,
 404     char *guid, dev_info_t **dip, mptsas_target_t *ptgt, int lun);
 405 static int mptsas_create_virt_lun(dev_info_t *pdip, struct scsi_inquiry *sd,
 406     char *guid, dev_info_t **dip, mdi_pathinfo_t **pip, mptsas_target_t *ptgt,
 407     int lun);
 408 
 409 static void mptsas_offline_missed_luns(dev_info_t *pdip,
 410     uint16_t *repluns, int lun_cnt, mptsas_target_t *ptgt);
 411 static int mptsas_offline_lun(dev_info_t *pdip, dev_info_t *rdip,
 412     mdi_pathinfo_t *rpip, uint_t flags);
 413 
 414 static int mptsas_config_smp(dev_info_t *pdip, uint64_t sas_wwn,
 415     dev_info_t **smp_dip);
 416 static int mptsas_offline_smp(dev_info_t *pdip, mptsas_smp_t *smp_node,
 417     uint_t flags);
 418 
 419 static int mptsas_event_query(mptsas_t *mpt, mptsas_event_query_t *data,
 420     int mode, int *rval);
 421 static int mptsas_event_enable(mptsas_t *mpt, mptsas_event_enable_t *data,
 422     int mode, int *rval);
 423 static int mptsas_event_report(mptsas_t *mpt, mptsas_event_report_t *data,
 424     int mode, int *rval);
 425 static void mptsas_record_event(void *args);
 426 static int mptsas_reg_access(mptsas_t *mpt, mptsas_reg_access_t *data,
 427     int mode);
 428 
 429 mptsas_target_t *mptsas_tgt_alloc(mptsas_t *, uint16_t, uint64_t,
 430     uint32_t, mptsas_phymask_t, uint8_t);
 431 static mptsas_smp_t *mptsas_smp_alloc(mptsas_t *, mptsas_smp_t *);
 432 static int mptsas_online_smp(dev_info_t *pdip, mptsas_smp_t *smp_node,
 433     dev_info_t **smp_dip);
 434 
 435 /*
 436  * Power management functions
 437  */
 438 static int mptsas_get_pci_cap(mptsas_t *mpt);
 439 static int mptsas_init_pm(mptsas_t *mpt);
 440 
 441 /*
 442  * MPT MSI tunable:
 443  *
 444  * By default MSI is enabled on all supported platforms.
 445  */
 446 boolean_t mptsas_enable_msi = B_TRUE;
 447 boolean_t mptsas_enable_msix = B_TRUE;
 448 boolean_t mptsas_physical_bind_failed_page_83 = B_FALSE;
 449 
 450 /*
 451  * Global switch for use of MPI2.5 FAST PATH.
 452  */
 453 boolean_t mptsas3_use_fastpath = B_TRUE;
 454 
 455 static int mptsas_register_intrs(mptsas_t *);
 456 static void mptsas_unregister_intrs(mptsas_t *);
 457 static int mptsas_add_intrs(mptsas_t *, int);
 458 static void mptsas_rem_intrs(mptsas_t *);
 459 
 460 /*
 461  * FMA Prototypes
 462  */
 463 static void mptsas_fm_init(mptsas_t *mpt);
 464 static void mptsas_fm_fini(mptsas_t *mpt);
 465 static int mptsas_fm_error_cb(dev_info_t *, ddi_fm_error_t *, const void *);
 466 
 467 extern pri_t minclsyspri, maxclsyspri;
 468 /*
 469  * NCPUS is used to determine some optimal configurations for number
 470  * of threads created to perform specific jobs. If we are invoked because
 471  * a disk is part of the root file system ncpus may still be 1 so check
 472  * boot_ncpus as well.
 473  */
 474 extern int ncpus, boot_ncpus;
 475 #define NCPUS   max(ncpus, boot_ncpus)
 476 
 477 /*
 478  * This device is created by the SCSI pseudo nexus driver (SCSI vHCI).  It is
 479  * under this device that the paths to a physical device are created when
 480  * MPxIO is used.
 481  */
 482 extern dev_info_t       *scsi_vhci_dip;
 483 
 484 /*
 485  * Tunable timeout value for Inquiry VPD page 0x83
 486  * By default the value is 30 seconds.
 487  */
 488 int mptsas_inq83_retry_timeout = 30;
 489 
 490 /*
 491  * Tunable for default SCSI pkt timeout. Defaults to 5 seconds, which should
 492  * be plenty for INQUIRY and REPORT_LUNS, which are the only commands currently
 493  * issued by mptsas directly.
 494  */
 495 int mptsas_scsi_pkt_time = 5;
 496 
 497 /*
 498  * This is used to allocate memory for message frame storage, not for
 499  * data I/O DMA. All message frames must be stored in the first 4G of
 500  * physical memory.
 501  */
 502 ddi_dma_attr_t mptsas_dma_attrs = {
 503         DMA_ATTR_V0,    /* attribute layout version             */
 504         0x0ull,         /* address low - should be 0 (longlong) */
 505         0xffffffffull,  /* address high - 32-bit max range      */
 506         0x00ffffffull,  /* count max - max DMA object size      */
 507         4,              /* allocation alignment requirements    */
 508         0x78,           /* burstsizes - binary encoded values   */
 509         1,              /* minxfer - gran. of DMA engine        */
 510         0x00ffffffull,  /* maxxfer - gran. of DMA engine        */
 511         0xffffffffull,  /* max segment size (DMA boundary)      */
 512         MPTSAS_MAX_DMA_SEGS, /* scatter/gather list length      */
 513         512,            /* granularity - device transfer size   */
 514         0               /* flags, set to 0                      */
 515 };
 516 
 517 /*
 518  * This is used for data I/O DMA memory allocation. (full 64-bit DMA
 519  * physical addresses are supported.)
 520  */
 521 ddi_dma_attr_t mptsas_dma_attrs64 = {
 522         DMA_ATTR_V0,    /* attribute layout version             */
 523         0x0ull,         /* address low - should be 0 (longlong) */
 524         0xffffffffffffffffull,  /* address high - 64-bit max    */
 525         0x00ffffffull,  /* count max - max DMA object size      */
 526         4,              /* allocation alignment requirements    */
 527         0x78,           /* burstsizes - binary encoded values   */
 528         1,              /* minxfer - gran. of DMA engine        */
 529         0x00ffffffull,  /* maxxfer - gran. of DMA engine        */
 530         0xffffffffull,  /* max segment size (DMA boundary)      */
 531         MPTSAS_MAX_DMA_SEGS, /* scatter/gather list length      */
 532         512,            /* granularity - device transfer size   */
 533         0               /* flags, set to 0 */
 534 };
 535 
 536 ddi_device_acc_attr_t mptsas_dev_attr = {
 537         DDI_DEVICE_ATTR_V1,
 538         DDI_STRUCTURE_LE_ACC,
 539         DDI_STRICTORDER_ACC,
 540         DDI_DEFAULT_ACC
 541 };
 542 
 543 static struct cb_ops mptsas_cb_ops = {
 544         scsi_hba_open,          /* open */
 545         scsi_hba_close,         /* close */
 546         nodev,                  /* strategy */
 547         nodev,                  /* print */
 548         nodev,                  /* dump */
 549         nodev,                  /* read */
 550         nodev,                  /* write */
 551         mptsas_ioctl,           /* ioctl */
 552         nodev,                  /* devmap */
 553         nodev,                  /* mmap */
 554         nodev,                  /* segmap */
 555         nochpoll,               /* chpoll */
 556         ddi_prop_op,            /* cb_prop_op */
 557         NULL,                   /* streamtab */
 558         D_MP,                   /* cb_flag */
 559         CB_REV,                 /* rev */
 560         nodev,                  /* aread */
 561         nodev                   /* awrite */
 562 };
 563 
 564 static struct dev_ops mptsas_ops = {
 565         DEVO_REV,               /* devo_rev, */
 566         0,                      /* refcnt  */
 567         ddi_no_info,            /* info */
 568         nulldev,                /* identify */
 569         nulldev,                /* probe */
 570         mptsas_attach,          /* attach */
 571         mptsas_detach,          /* detach */
 572 #ifdef  __sparc
 573         mptsas_reset,
 574 #else
 575         nodev,                  /* reset */
 576 #endif  /* __sparc */
 577         &mptsas_cb_ops,             /* driver operations */
 578         NULL,                   /* bus operations */
 579         mptsas_power,           /* power management */
 580 #ifdef  __sparc
 581         ddi_quiesce_not_needed
 582 #else
 583         mptsas_quiesce          /* quiesce */
 584 #endif  /* __sparc */
 585 };
 586 
 587 
 588 #define MPTSAS_MOD_STRING "MPTSAS3 HBA Driver 00.00.01"
 589 
 590 static struct modldrv modldrv = {
 591         &mod_driverops,     /* Type of module. This one is a driver */
 592         MPTSAS_MOD_STRING, /* Name of the module. */
 593         &mptsas_ops,        /* driver ops */
 594 };
 595 
 596 static struct modlinkage modlinkage = {
 597         MODREV_1, &modldrv, NULL
 598 };
 599 #define TARGET_PROP     "target"
 600 #define LUN_PROP        "lun"
 601 #define LUN64_PROP      "lun64"
 602 #define SAS_PROP        "sas-mpt"
 603 #define MDI_GUID        "wwn"
 604 #define NDI_GUID        "guid"
 605 #define MPTSAS_DEV_GONE "mptsas_dev_gone"
 606 
 607 /*
 608  * Local static data
 609  */
 610 #if defined(MPTSAS_DEBUG)
 611 uint32_t mptsas_debug_flags = 0x0;
 612 /*
 613  * Flags to ignore these messages in local debug ring buffer.
 614  * Default is to ignore the watchsubr() output which normally happens
 615  * every second.
 616  */
 617 uint32_t mptsas_dbglog_imask = 0x40000000;
 618 uint32_t mptsas_test_timeout = 0;
 619 #endif  /* defined(MPTSAS_DEBUG) */
 620 uint32_t mptsas_debug_resets = 0;
 621 
 622 static kmutex_t         mptsas_global_mutex;
 623 static void             *mptsas3_state;         /* soft state ptr */
 624 static krwlock_t        mptsas_global_rwlock;
 625 
 626 static kmutex_t         mptsas_log_mutex;
 627 static char             mptsas_log_buf[256];
 628 _NOTE(MUTEX_PROTECTS_DATA(mptsas_log_mutex, mptsas_log_buf))
 629 
 630 static mptsas_t *mptsas_head, *mptsas_tail;
 631 static clock_t mptsas_scsi_watchdog_tick;
 632 static clock_t mptsas_tick;
 633 static timeout_id_t mptsas_reset_watch;
 634 static timeout_id_t mptsas_timeout_id;
 635 static int mptsas_timeouts_enabled = 0;
 636 
 637 /*
 638  * Maximum number of MSI-X interrupts any instance of mptsas3 can use.
 639  * Note that if you want to increase this you may have to also bump the
 640  * value of ddi_msix_alloc_limit which defaults to 8.
 641  * Set to zero to fall back to other interrupt types.
 642  */
 643 int mptsas3_max_msix_intrs = 8;
 644 
 645 /*
 646  * Default length for extended auto request sense buffers.
 647  * All sense buffers need to be under the same alloc because there
 648  * is only one common top 32bits (of 64bits) address register.
 649  * Most requests only require 32 bytes, but some request >256.
 650  * We use rmalloc()/rmfree() on this additional memory to manage the
 651  * "extended" requests.
 652  */
 653 int mptsas_extreq_sense_bufsize = 256*64;
 654 
 655 /*
 656  * Believe that all software resrictions of having to run with DMA
 657  * attributes to limit allocation to the first 4G are removed.
 658  * However, this flag remains to enable quick switchback should suspicious
 659  * problems emerge.
 660  * Note that scsi_alloc_consistent_buf() does still adhering to allocating
 661  * 32 bit addressable memory, but we can cope if that is changed now.
 662  */
 663 int mptsas_use_64bit_msgaddr = 1;
 664 
 665 /*
 666  * warlock directives
 667  */
 668 _NOTE(SCHEME_PROTECTS_DATA("unique per pkt", scsi_pkt \
 669         mptsas_cmd NcrTableIndirect buf scsi_cdb scsi_status))
 670 _NOTE(SCHEME_PROTECTS_DATA("unique per pkt", smp_pkt))
 671 _NOTE(SCHEME_PROTECTS_DATA("stable data", scsi_device scsi_address))
 672 _NOTE(SCHEME_PROTECTS_DATA("No Mutex Needed", mptsas_tgt_private))
 673 _NOTE(SCHEME_PROTECTS_DATA("No Mutex Needed", scsi_hba_tran::tran_tgt_private))
 674 
 675 /*
 676  * SM - HBA statics
 677  */
 678 char    *mptsas_driver_rev = MPTSAS_MOD_STRING;
 679 
 680 #ifdef MPTSAS_DEBUG
 681 void debug_enter(char *);
 682 #endif
 683 
 684 /*
 685  * Notes:
 686  *      - scsi_hba_init(9F) initializes SCSI HBA modules
 687  *      - must call scsi_hba_fini(9F) if modload() fails
 688  */
 689 int
 690 _init(void)
 691 {
 692         int status;
 693         /* CONSTCOND */
 694         ASSERT(NO_COMPETING_THREADS);
 695 
 696         NDBG0(("_init"));
 697 
 698         status = ddi_soft_state_init(&mptsas3_state, MPTSAS_SIZE,
 699             MPTSAS_INITIAL_SOFT_SPACE);
 700         if (status != 0) {
 701                 return (status);
 702         }
 703 
 704         if ((status = scsi_hba_init(&modlinkage)) != 0) {
 705                 ddi_soft_state_fini(&mptsas3_state);
 706                 return (status);
 707         }
 708 
 709         mutex_init(&mptsas_global_mutex, NULL, MUTEX_DRIVER, NULL);
 710         rw_init(&mptsas_global_rwlock, NULL, RW_DRIVER, NULL);
 711         mutex_init(&mptsas_log_mutex, NULL, MUTEX_DRIVER, NULL);
 712 
 713         if ((status = mod_install(&modlinkage)) != 0) {
 714                 mutex_destroy(&mptsas_log_mutex);
 715                 rw_destroy(&mptsas_global_rwlock);
 716                 mutex_destroy(&mptsas_global_mutex);
 717                 ddi_soft_state_fini(&mptsas3_state);
 718                 scsi_hba_fini(&modlinkage);
 719         }
 720 
 721         return (status);
 722 }
 723 
 724 /*
 725  * Notes:
 726  *      - scsi_hba_fini(9F) uninitializes SCSI HBA modules
 727  */
 728 int
 729 _fini(void)
 730 {
 731         int     status;
 732         /* CONSTCOND */
 733         ASSERT(NO_COMPETING_THREADS);
 734 
 735         NDBG0(("_fini"));
 736 
 737         if ((status = mod_remove(&modlinkage)) == 0) {
 738                 ddi_soft_state_fini(&mptsas3_state);
 739                 scsi_hba_fini(&modlinkage);
 740                 mutex_destroy(&mptsas_global_mutex);
 741                 rw_destroy(&mptsas_global_rwlock);
 742                 mutex_destroy(&mptsas_log_mutex);
 743         }
 744         return (status);
 745 }
 746 
 747 /*
 748  * The loadable-module _info(9E) entry point
 749  */
 750 int
 751 _info(struct modinfo *modinfop)
 752 {
 753         /* CONSTCOND */
 754         ASSERT(NO_COMPETING_THREADS);
 755         NDBG0(("mptsas _info"));
 756 
 757         return (mod_info(&modlinkage, modinfop));
 758 }
 759 
 760 static int
 761 mptsas_target_eval_devhdl(const void *op, void *arg)
 762 {
 763         uint16_t dh = *(uint16_t *)arg;
 764         const mptsas_target_t *tp = op;
 765 
 766         return ((int)tp->m_devhdl - (int)dh);
 767 }
 768 
 769 static int
 770 mptsas_target_eval_slot(const void *op, void *arg)
 771 {
 772         mptsas_led_control_t *lcp = arg;
 773         const mptsas_target_t *tp = op;
 774 
 775         if (tp->m_enclosure != lcp->Enclosure)
 776                 return ((int)tp->m_enclosure - (int)lcp->Enclosure);
 777 
 778         return ((int)tp->m_slot_num - (int)lcp->Slot);
 779 }
 780 
 781 static int
 782 mptsas_target_eval_nowwn(const void *op, void *arg)
 783 {
 784         uint8_t phy = *(uint8_t *)arg;
 785         const mptsas_target_t *tp = op;
 786 
 787         if (tp->m_addr.mta_wwn != 0)
 788                 return (-1);
 789 
 790         return ((int)tp->m_phynum - (int)phy);
 791 }
 792 
 793 static int
 794 mptsas_smp_eval_devhdl(const void *op, void *arg)
 795 {
 796         uint16_t dh = *(uint16_t *)arg;
 797         const mptsas_smp_t *sp = op;
 798 
 799         return ((int)sp->m_devhdl - (int)dh);
 800 }
 801 
 802 static uint64_t
 803 mptsas_target_addr_hash(const void *tp)
 804 {
 805         const mptsas_target_addr_t *tap = tp;
 806 
 807         return ((tap->mta_wwn & 0xffffffffffffULL) |
 808             ((uint64_t)tap->mta_phymask << 48));
 809 }
 810 
 811 static int
 812 mptsas_target_addr_cmp(const void *a, const void *b)
 813 {
 814         const mptsas_target_addr_t *aap = a;
 815         const mptsas_target_addr_t *bap = b;
 816 
 817         if (aap->mta_wwn < bap->mta_wwn)
 818                 return (-1);
 819         if (aap->mta_wwn > bap->mta_wwn)
 820                 return (1);
 821         return ((int)bap->mta_phymask - (int)aap->mta_phymask);
 822 }
 823 
 824 static void
 825 mptsas_target_free(void *op)
 826 {
 827         kmem_free(op, sizeof (mptsas_target_t));
 828 }
 829 
 830 static void
 831 mptsas_smp_free(void *op)
 832 {
 833         kmem_free(op, sizeof (mptsas_smp_t));
 834 }
 835 
 836 static void
 837 mptsas_destroy_hashes(mptsas_t *mpt)
 838 {
 839         mptsas_target_t *tp;
 840         mptsas_smp_t *sp;
 841 
 842         for (tp = refhash_first(mpt->m_targets); tp != NULL;
 843             tp = refhash_next(mpt->m_targets, tp)) {
 844                 mutex_destroy(&tp->m_t_mutex);
 845                 refhash_remove(mpt->m_targets, tp);
 846         }
 847         for (sp = refhash_first(mpt->m_smp_targets); sp != NULL;
 848             sp = refhash_next(mpt->m_smp_targets, sp)) {
 849                 refhash_remove(mpt->m_smp_targets, sp);
 850         }
 851         refhash_destroy(mpt->m_targets);
 852         refhash_destroy(mpt->m_smp_targets);
 853         mpt->m_targets = NULL;
 854         mpt->m_smp_targets = NULL;
 855 }
 856 
 857 static int
 858 mptsas_iport_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
 859 {
 860         dev_info_t              *pdip;
 861         mptsas_t                *mpt;
 862         scsi_hba_tran_t         *hba_tran;
 863         char                    *iport = NULL;
 864         char                    phymask[MPTSAS_MAX_PHYS];
 865         mptsas_phymask_t        phy_mask = 0;
 866         int                     dynamic_port = 0;
 867         uint32_t                page_address;
 868         char                    initiator_wwnstr[MPTSAS_WWN_STRLEN];
 869         int                     rval = DDI_FAILURE;
 870         int                     i = 0;
 871         uint8_t                 numphys = 0;
 872         uint8_t                 phy_id;
 873         uint8_t                 phy_port = 0;
 874         uint16_t                attached_devhdl = 0;
 875         uint32_t                dev_info;
 876         uint64_t                attached_sas_wwn;
 877         uint16_t                dev_hdl;
 878         uint16_t                pdev_hdl;
 879         uint16_t                bay_num, enclosure, io_flags;
 880         char                    attached_wwnstr[MPTSAS_WWN_STRLEN];
 881 
 882         /* CONSTCOND */
 883         ASSERT(NO_COMPETING_THREADS);
 884 
 885         switch (cmd) {
 886         case DDI_ATTACH:
 887                 break;
 888 
 889         case DDI_RESUME:
 890                 /*
 891                  * If this a scsi-iport node, nothing to do here.
 892                  */
 893                 return (DDI_SUCCESS);
 894 
 895         default:
 896                 return (DDI_FAILURE);
 897         }
 898 
 899         pdip = ddi_get_parent(dip);
 900 
 901         if ((hba_tran = ndi_flavorv_get(pdip, SCSA_FLAVOR_SCSI_DEVICE)) ==
 902             NULL) {
 903                 cmn_err(CE_WARN, "Failed attach iport because fail to "
 904                     "get tran vector for the HBA node");
 905                 return (DDI_FAILURE);
 906         }
 907 
 908         mpt = TRAN2MPT(hba_tran);
 909         ASSERT(mpt != NULL);
 910         if (mpt == NULL)
 911                 return (DDI_FAILURE);
 912 
 913         if ((hba_tran = ndi_flavorv_get(dip, SCSA_FLAVOR_SCSI_DEVICE)) ==
 914             NULL) {
 915                 mptsas_log(mpt, CE_WARN, "Failed attach iport because fail to "
 916                     "get tran vector for the iport node");
 917                 return (DDI_FAILURE);
 918         }
 919 
 920         /*
 921          * Overwrite parent's tran_hba_private to iport's tran vector
 922          */
 923         hba_tran->tran_hba_private = mpt;
 924 
 925         ddi_report_dev(dip);
 926 
 927         /*
 928          * Get SAS address for initiator port according dev_handle
 929          */
 930         iport = ddi_get_name_addr(dip);
 931         if (iport && strncmp(iport, "v0", 2) == 0) {
 932                 if (ddi_prop_update_int(DDI_DEV_T_NONE, dip,
 933                     MPTSAS_VIRTUAL_PORT, 1) !=
 934                     DDI_PROP_SUCCESS) {
 935                         (void) ddi_prop_remove(DDI_DEV_T_NONE, dip,
 936                             MPTSAS_VIRTUAL_PORT);
 937                         mptsas_log(mpt, CE_WARN, "mptsas virtual port "
 938                             "prop update failed");
 939                         return (DDI_FAILURE);
 940                 }
 941                 return (DDI_SUCCESS);
 942         }
 943 
 944         mutex_enter(&mpt->m_mutex);
 945         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
 946                 bzero(phymask, sizeof (phymask));
 947                 (void) sprintf(phymask,
 948                     "%x", mpt->m_phy_info[i].phy_mask);
 949                 if (strcmp(phymask, iport) == 0) {
 950                         break;
 951                 }
 952         }
 953 
 954         if (i == MPTSAS_MAX_PHYS) {
 955                 mptsas_log(mpt, CE_WARN, "Failed attach port %s because port"
 956                     "seems not exist", iport);
 957                 mutex_exit(&mpt->m_mutex);
 958                 return (DDI_FAILURE);
 959         }
 960 
 961         phy_mask = mpt->m_phy_info[i].phy_mask;
 962 
 963         if (mpt->m_phy_info[i].port_flags & AUTO_PORT_CONFIGURATION)
 964                 dynamic_port = 1;
 965         else
 966                 dynamic_port = 0;
 967 
 968         /*
 969          * Update PHY info for smhba
 970          */
 971         if (mptsas_smhba_phy_init(mpt)) {
 972                 mutex_exit(&mpt->m_mutex);
 973                 mptsas_log(mpt, CE_WARN, "mptsas phy update "
 974                     "failed");
 975                 return (DDI_FAILURE);
 976         }
 977 
 978         mutex_exit(&mpt->m_mutex);
 979 
 980         numphys = 0;
 981         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
 982                 if ((phy_mask >> i) & 0x01) {
 983                         numphys++;
 984                 }
 985         }
 986 
 987         bzero(initiator_wwnstr, sizeof (initiator_wwnstr));
 988         (void) sprintf(initiator_wwnstr, "w%016"PRIx64,
 989             mpt->un.m_base_wwid);
 990 
 991         if (ddi_prop_update_string(DDI_DEV_T_NONE, dip,
 992             SCSI_ADDR_PROP_INITIATOR_PORT, initiator_wwnstr) !=
 993             DDI_PROP_SUCCESS) {
 994                 (void) ddi_prop_remove(DDI_DEV_T_NONE,
 995                     dip, SCSI_ADDR_PROP_INITIATOR_PORT);
 996                 mptsas_log(mpt, CE_WARN, "mptsas Initiator port "
 997                     "prop update failed");
 998                 return (DDI_FAILURE);
 999         }
1000         if (ddi_prop_update_int(DDI_DEV_T_NONE, dip,
1001             MPTSAS_NUM_PHYS, numphys) !=
1002             DDI_PROP_SUCCESS) {
1003                 (void) ddi_prop_remove(DDI_DEV_T_NONE, dip, MPTSAS_NUM_PHYS);
1004                 return (DDI_FAILURE);
1005         }
1006 
1007         if (ddi_prop_update_int(DDI_DEV_T_NONE, dip,
1008             "phymask", phy_mask) !=
1009             DDI_PROP_SUCCESS) {
1010                 (void) ddi_prop_remove(DDI_DEV_T_NONE, dip, "phymask");
1011                 mptsas_log(mpt, CE_WARN, "mptsas phy mask "
1012                     "prop update failed");
1013                 return (DDI_FAILURE);
1014         }
1015 
1016         if (ddi_prop_update_int(DDI_DEV_T_NONE, dip,
1017             "dynamic-port", dynamic_port) !=
1018             DDI_PROP_SUCCESS) {
1019                 (void) ddi_prop_remove(DDI_DEV_T_NONE, dip, "dynamic-port");
1020                 mptsas_log(mpt, CE_WARN, "mptsas dynamic port "
1021                     "prop update failed");
1022                 return (DDI_FAILURE);
1023         }
1024         if (ddi_prop_update_int(DDI_DEV_T_NONE, dip,
1025             MPTSAS_VIRTUAL_PORT, 0) !=
1026             DDI_PROP_SUCCESS) {
1027                 (void) ddi_prop_remove(DDI_DEV_T_NONE, dip,
1028                     MPTSAS_VIRTUAL_PORT);
1029                 mptsas_log(mpt, CE_WARN, "mptsas virtual port "
1030                     "prop update failed");
1031                 return (DDI_FAILURE);
1032         }
1033         mptsas_smhba_set_all_phy_props(mpt, dip, numphys, phy_mask,
1034             &attached_devhdl);
1035 
1036         mutex_enter(&mpt->m_mutex);
1037         page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
1038             MPI2_SAS_DEVICE_PGAD_FORM_MASK) | (uint32_t)attached_devhdl;
1039         rval = mptsas_get_sas_device_page0(mpt, page_address, &dev_hdl,
1040             &attached_sas_wwn, &dev_info, &phy_port, &phy_id,
1041             &pdev_hdl, &bay_num, &enclosure, &io_flags);
1042         if (rval != DDI_SUCCESS) {
1043                 mptsas_log(mpt, CE_WARN,
1044                     "Failed to get device page0 for handle:%d",
1045                     attached_devhdl);
1046                 mutex_exit(&mpt->m_mutex);
1047                 return (DDI_FAILURE);
1048         }
1049 
1050         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
1051                 bzero(phymask, sizeof (phymask));
1052                 (void) sprintf(phymask, "%x", mpt->m_phy_info[i].phy_mask);
1053                 if (strcmp(phymask, iport) == 0) {
1054                         (void) sprintf(&mpt->m_phy_info[i].smhba_info.path[0],
1055                             "%x",
1056                             mpt->m_phy_info[i].phy_mask);
1057                 }
1058         }
1059         mutex_exit(&mpt->m_mutex);
1060 
1061         bzero(attached_wwnstr, sizeof (attached_wwnstr));
1062         (void) sprintf(attached_wwnstr, "w%016"PRIx64,
1063             attached_sas_wwn);
1064         if (ddi_prop_update_string(DDI_DEV_T_NONE, dip,
1065             SCSI_ADDR_PROP_ATTACHED_PORT, attached_wwnstr) !=
1066             DDI_PROP_SUCCESS) {
1067                 (void) ddi_prop_remove(DDI_DEV_T_NONE,
1068                     dip, SCSI_ADDR_PROP_ATTACHED_PORT);
1069                 return (DDI_FAILURE);
1070         }
1071 
1072         /* Create kstats for each phy on this iport */
1073 
1074         mptsas_create_phy_stats(mpt, iport, dip);
1075 
1076         /*
1077          * register sas hba iport with mdi (MPxIO/vhci)
1078          */
1079         if (mdi_phci_register(MDI_HCI_CLASS_SCSI,
1080             dip, 0) == MDI_SUCCESS) {
1081                 mpt->m_mpxio_enable = TRUE;
1082         }
1083         return (DDI_SUCCESS);
1084 }
1085 
1086 /*
1087  * Notes:
1088  *      Set up all device state and allocate data structures,
1089  *      mutexes, condition variables, etc. for device operation.
1090  *      Add interrupts needed.
1091  *      Return DDI_SUCCESS if device is ready, else return DDI_FAILURE.
1092  */
1093 static int
1094 mptsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
1095 {
1096         mptsas_t                *mpt = NULL;
1097         int                     instance, i, j;
1098         int                     q_thread_num;
1099         char                    map_setup = 0;
1100         char                    config_setup = 0;
1101         char                    hba_attach_setup = 0;
1102         char                    smp_attach_setup = 0;
1103         char                    mutex_init_done = 0;
1104         char                    event_taskq_create = 0;
1105         char                    dr_taskq_create = 0;
1106         char                    doneq_thread_create = 0;
1107         char                    txwq_thread_create = 0;
1108         char                    added_watchdog = 0;
1109         scsi_hba_tran_t         *hba_tran;
1110         uint_t                  mem_bar = MEM_SPACE;
1111         int                     rval = DDI_FAILURE;
1112 
1113         /* CONSTCOND */
1114         ASSERT(NO_COMPETING_THREADS);
1115 
1116         if (scsi_hba_iport_unit_address(dip)) {
1117                 return (mptsas_iport_attach(dip, cmd));
1118         }
1119 
1120         switch (cmd) {
1121         case DDI_ATTACH:
1122                 break;
1123 
1124         case DDI_RESUME:
1125                 if ((hba_tran = ddi_get_driver_private(dip)) == NULL)
1126                         return (DDI_FAILURE);
1127 
1128                 mpt = TRAN2MPT(hba_tran);
1129 
1130                 if (!mpt) {
1131                         return (DDI_FAILURE);
1132                 }
1133 
1134                 /*
1135                  * Reset hardware and softc to "no outstanding commands"
1136                  * Note that a check condition can result on first command
1137                  * to a target.
1138                  */
1139                 mutex_enter(&mpt->m_mutex);
1140 
1141                 /*
1142                  * raise power.
1143                  */
1144                 if (mpt->m_options & MPTSAS_OPT_PM) {
1145                         mutex_exit(&mpt->m_mutex);
1146                         (void) pm_busy_component(dip, 0);
1147                         rval = pm_power_has_changed(dip, 0, PM_LEVEL_D0);
1148                         if (rval == DDI_SUCCESS) {
1149                                 mutex_enter(&mpt->m_mutex);
1150                         } else {
1151                                 /*
1152                                  * The pm_raise_power() call above failed,
1153                                  * and that can only occur if we were unable
1154                                  * to reset the hardware.  This is probably
1155                                  * due to unhealty hardware, and because
1156                                  * important filesystems(such as the root
1157                                  * filesystem) could be on the attached disks,
1158                                  * it would not be a good idea to continue,
1159                                  * as we won't be entirely certain we are
1160                                  * writing correct data.  So we panic() here
1161                                  * to not only prevent possible data corruption,
1162                                  * but to give developers or end users a hope
1163                                  * of identifying and correcting any problems.
1164                                  */
1165                                 fm_panic("mptsas could not reset hardware "
1166                                     "during resume");
1167                         }
1168                 }
1169 
1170                 mpt->m_suspended = 0;
1171 
1172                 /*
1173                  * Reinitialize ioc
1174                  */
1175                 mpt->m_softstate |= MPTSAS_SS_MSG_UNIT_RESET;
1176                 if (mptsas_init_chip(mpt, FALSE) == DDI_FAILURE) {
1177                         mutex_exit(&mpt->m_mutex);
1178                         if (mpt->m_options & MPTSAS_OPT_PM) {
1179                                 (void) pm_idle_component(dip, 0);
1180                         }
1181                         fm_panic("mptsas init chip fail during resume");
1182                 }
1183                 /*
1184                  * mptsas_update_driver_data needs interrupts so enable them
1185                  * first.
1186                  */
1187                 MPTSAS_ENABLE_INTR(mpt);
1188                 mptsas_update_driver_data(mpt);
1189 
1190                 /* start requests, if possible */
1191                 mptsas_restart_hba(mpt);
1192 
1193                 mutex_exit(&mpt->m_mutex);
1194 
1195                 /*
1196                  * Restart watch thread
1197                  */
1198                 mutex_enter(&mptsas_global_mutex);
1199                 if (mptsas_timeout_id == 0) {
1200                         mptsas_timeout_id = timeout(mptsas_watch, NULL,
1201                             mptsas_tick);
1202                         mptsas_timeouts_enabled = 1;
1203                 }
1204                 mutex_exit(&mptsas_global_mutex);
1205 
1206                 /* report idle status to pm framework */
1207                 if (mpt->m_options & MPTSAS_OPT_PM) {
1208                         (void) pm_idle_component(dip, 0);
1209                 }
1210 
1211                 return (DDI_SUCCESS);
1212 
1213         default:
1214                 return (DDI_FAILURE);
1215 
1216         }
1217 
1218         instance = ddi_get_instance(dip);
1219 
1220         /*
1221          * Allocate softc information.
1222          */
1223         if (ddi_soft_state_zalloc(mptsas3_state, instance) != DDI_SUCCESS) {
1224                 mptsas_log(NULL, CE_WARN,
1225                     "mptsas%d: cannot allocate soft state", instance);
1226                 goto fail;
1227         }
1228 
1229         mpt = ddi_get_soft_state(mptsas3_state, instance);
1230 
1231         if (mpt == NULL) {
1232                 mptsas_log(NULL, CE_WARN,
1233                     "mptsas%d: cannot get soft state", instance);
1234                 goto fail;
1235         }
1236 
1237         /* Indicate that we are 'sizeof (scsi_*(9S))' clean. */
1238         scsi_size_clean(dip);
1239 
1240         mpt->m_dip = dip;
1241         mpt->m_instance = instance;
1242 
1243         /* Make a per-instance copy of the structures */
1244         mpt->m_io_dma_attr = mptsas_dma_attrs64;
1245         if (mptsas_use_64bit_msgaddr) {
1246                 mpt->m_msg_dma_attr = mptsas_dma_attrs64;
1247         } else {
1248                 mpt->m_msg_dma_attr = mptsas_dma_attrs;
1249         }
1250         mpt->m_reg_acc_attr = mptsas_dev_attr;
1251         mpt->m_dev_acc_attr = mptsas_dev_attr;
1252 
1253         /*
1254          * Round down the arq sense buffer size to nearest 16 bytes.
1255          */
1256         mpt->m_req_sense_size = EXTCMDS_STATUS_SIZE;
1257 
1258         /*
1259          * Initialize FMA
1260          */
1261         mpt->m_fm_capabilities = ddi_getprop(DDI_DEV_T_ANY, mpt->m_dip,
1262             DDI_PROP_CANSLEEP | DDI_PROP_DONTPASS, "fm-capable",
1263             DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE |
1264             DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE);
1265 
1266         mptsas_fm_init(mpt);
1267 
1268         if (mptsas_alloc_handshake_msg(mpt,
1269             sizeof (Mpi2SCSITaskManagementRequest_t)) == DDI_FAILURE) {
1270                 mptsas_log(mpt, CE_WARN, "cannot initialize handshake msg.");
1271                 goto fail;
1272         }
1273 
1274         /*
1275          * Setup configuration space
1276          */
1277         if (mptsas_config_space_init(mpt) == FALSE) {
1278                 mptsas_log(mpt, CE_WARN, "mptsas_config_space_init failed");
1279                 goto fail;
1280         }
1281         config_setup++;
1282 
1283         if (ddi_regs_map_setup(dip, mem_bar, (caddr_t *)&mpt->m_reg,
1284             0, 0, &mpt->m_reg_acc_attr, &mpt->m_datap) != DDI_SUCCESS) {
1285                 mptsas_log(mpt, CE_WARN, "map setup failed");
1286                 goto fail;
1287         }
1288         map_setup++;
1289 
1290         /*
1291          * A taskq is created for dealing with the event handler
1292          */
1293         if ((mpt->m_event_taskq = ddi_taskq_create(dip, "mptsas_event_taskq",
1294             1, TASKQ_DEFAULTPRI, 0)) == NULL) {
1295                 mptsas_log(mpt, CE_NOTE, "ddi_taskq_create failed");
1296                 goto fail;
1297         }
1298         event_taskq_create++;
1299 
1300         /*
1301          * A taskq is created for dealing with dr events
1302          */
1303         if ((mpt->m_dr_taskq = ddi_taskq_create(dip,
1304             "mptsas_dr_taskq",
1305             1, TASKQ_DEFAULTPRI, 0)) == NULL) {
1306                 mptsas_log(mpt, CE_NOTE, "ddi_taskq_create for discovery "
1307                     "failed");
1308                 goto fail;
1309         }
1310         dr_taskq_create++;
1311 
1312         cv_init(&mpt->m_qthread_cv, NULL, CV_DRIVER, NULL);
1313         mutex_init(&mpt->m_qthread_mutex, NULL, MUTEX_DRIVER, NULL);
1314 
1315         i = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1316             0, "mptsas_enable_txwq_prop", NCPUS > 1);
1317         if (i) {
1318                 mpt->m_txwq_thread_n = NUM_TX_WAITQ;
1319                 mpt->m_txwq_enabled = FALSE;
1320                 if (ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1321                     0, "mptsas_allow_txwq_jumping", 0)) {
1322                         mpt->m_txwq_allow_q_jumping = TRUE;
1323                 }
1324                 i = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1325                     0, "mptsas_txwq_threashold_prop", 80000);
1326                 mpt->m_txwq_thread_threshold = (uint16_t)i;
1327         } else {
1328                 mpt->m_txwq_thread_n = 0;
1329                 mpt->m_txwq_enabled = FALSE;
1330         }
1331 
1332         if (mpt->m_txwq_thread_n) {
1333                 mutex_enter(&mpt->m_qthread_mutex);
1334                 for (j = 0; j < NUM_TX_WAITQ; j++) {
1335                         mutex_init(&mpt->m_tx_waitq[j].txwq_mutex, NULL,
1336                             MUTEX_DRIVER,
1337                             NULL);
1338                         cv_init(&mpt->m_tx_waitq[j].txwq_cv, NULL, CV_DRIVER,
1339                             NULL);
1340                         cv_init(&mpt->m_tx_waitq[j].txwq_drain_cv, NULL,
1341                             CV_DRIVER, NULL);
1342                         mpt->m_tx_waitq[j].txwq_active = TRUE;
1343                         mpt->m_tx_waitq[j].txwq_draining = FALSE;
1344                         mpt->m_tx_waitq[j].txwq_cmdq = NULL;
1345                         mpt->m_tx_waitq[j].txwq_qtail =
1346                             &mpt->m_tx_waitq[j].txwq_cmdq;
1347                         mutex_enter(&mpt->m_tx_waitq[j].txwq_mutex);
1348                         mpt->m_tx_waitq[j].arg.mpt = mpt;
1349                         mpt->m_tx_waitq[j].arg.t = j;
1350                         mpt->m_tx_waitq[j].txwq_threadp =
1351                             thread_create(NULL, 0, mptsas_tx_waitq_thread,
1352                             &mpt->m_tx_waitq[j].arg,
1353                             0, &p0, TS_RUN, maxclsyspri - 10);
1354                         mutex_exit(&mpt->m_tx_waitq[j].txwq_mutex);
1355                 }
1356                 mutex_exit(&mpt->m_qthread_mutex);
1357                 txwq_thread_create++;
1358         }
1359 
1360         mpt->m_doneq_thread_threshold = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1361             0, "mptsas_doneq_thread_threshold_prop", 10);
1362         mpt->m_doneq_length_threshold = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1363             0, "mptsas_doneq_length_threshold_prop", 8);
1364         mpt->m_doneq_thread_n = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1365             0, "mptsas_doneq_thread_n_prop", min(NCPUS, 8));
1366 
1367         if (mpt->m_doneq_thread_n) {
1368                 mutex_enter(&mpt->m_qthread_mutex);
1369                 mpt->m_doneq_thread_id =
1370                     kmem_zalloc(sizeof (mptsas_doneq_thread_list_t)
1371                     * mpt->m_doneq_thread_n, KM_SLEEP);
1372 
1373                 for (j = 0; j < mpt->m_doneq_thread_n; j++) {
1374                         cv_init(&mpt->m_doneq_thread_id[j].cv, NULL,
1375                             CV_DRIVER, NULL);
1376                         mutex_init(&mpt->m_doneq_thread_id[j].mutex, NULL,
1377                             MUTEX_DRIVER, NULL);
1378                         mutex_enter(&mpt->m_doneq_thread_id[j].mutex);
1379                         mpt->m_doneq_thread_id[j].flag |=
1380                             MPTSAS_DONEQ_THREAD_ACTIVE;
1381                         mpt->m_doneq_thread_id[j].arg.mpt = mpt;
1382                         mpt->m_doneq_thread_id[j].arg.t = j;
1383                         mpt->m_doneq_thread_id[j].threadp =
1384                             thread_create(NULL, 0, mptsas_doneq_thread,
1385                             &mpt->m_doneq_thread_id[j].arg,
1386                             0, &p0, TS_RUN, maxclsyspri - 10);
1387                         mpt->m_doneq_thread_id[j].dlist.dl_tail =
1388                             &mpt->m_doneq_thread_id[j].dlist.dl_q;
1389                         mutex_exit(&mpt->m_doneq_thread_id[j].mutex);
1390                 }
1391                 mutex_exit(&mpt->m_qthread_mutex);
1392                 doneq_thread_create++;
1393         }
1394 
1395         /*
1396          * Disable hardware interrupt since we're not ready to
1397          * handle it yet.
1398          */
1399         MPTSAS_DISABLE_INTR(mpt);
1400 
1401         /*
1402          * Initialize mutex used in interrupt handler.
1403          * We don't support hi-level so the mutex's are all adaptive
1404          * and we don't want to register the interrupts until we get
1405          * the chip type information from _init_chip() below.
1406          * Otherwise we would use DDI_INTR_PRI(mpt->m_intr_pri)
1407          * rather than NULL in the mutex_init() calls.
1408          */
1409         mutex_init(&mpt->m_mutex, NULL, MUTEX_DRIVER, NULL);
1410         mutex_init(&mpt->m_passthru_mutex, NULL, MUTEX_DRIVER, NULL);
1411         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
1412                 mutex_init(&mpt->m_phy_info[i].smhba_info.phy_mutex,
1413                     NULL, MUTEX_DRIVER, NULL);
1414         }
1415 
1416         cv_init(&mpt->m_cv, NULL, CV_DRIVER, NULL);
1417         cv_init(&mpt->m_passthru_cv, NULL, CV_DRIVER, NULL);
1418         cv_init(&mpt->m_fw_cv, NULL, CV_DRIVER, NULL);
1419         cv_init(&mpt->m_config_cv, NULL, CV_DRIVER, NULL);
1420         cv_init(&mpt->m_fw_diag_cv, NULL, CV_DRIVER, NULL);
1421         mutex_init_done++;
1422 
1423         mutex_enter(&mpt->m_mutex);
1424         /*
1425          * Initialize power management component
1426          */
1427         if (mpt->m_options & MPTSAS_OPT_PM) {
1428                 if (mptsas_init_pm(mpt)) {
1429                         mutex_exit(&mpt->m_mutex);
1430                         mptsas_log(mpt, CE_WARN, "mptsas pm initialization "
1431                             "failed");
1432                         goto fail;
1433                 }
1434         }
1435 
1436         /*
1437          * Initialize chip using Message Unit Reset, if allowed
1438          */
1439         mpt->m_softstate |= MPTSAS_SS_MSG_UNIT_RESET;
1440         if (mptsas_init_chip(mpt, TRUE) == DDI_FAILURE) {
1441                 mutex_exit(&mpt->m_mutex);
1442                 mptsas_log(mpt, CE_WARN, "mptsas chip initialization failed");
1443                 goto fail;
1444         }
1445 
1446         /*
1447          * Fill in the phy_info structure and get the base WWID
1448          */
1449         if (mptsas_get_manufacture_page5(mpt) == DDI_FAILURE) {
1450                 mptsas_log(mpt, CE_WARN,
1451                     "mptsas_get_manufacture_page5 failed!");
1452                 goto fail;
1453         }
1454 
1455         if (mptsas_get_sas_io_unit_page_hndshk(mpt)) {
1456                 mptsas_log(mpt, CE_WARN,
1457                     "mptsas_get_sas_io_unit_page_hndshk failed!");
1458                 goto fail;
1459         }
1460 
1461         if (mptsas_get_manufacture_page0(mpt) == DDI_FAILURE) {
1462                 mptsas_log(mpt, CE_WARN,
1463                     "mptsas_get_manufacture_page0 failed!");
1464                 goto fail;
1465         }
1466 
1467         /*
1468          * If we only have one interrupt the default for doneq_thread_threshold
1469          * should be 0 so that all completion processing goes to the threads.
1470          * Only change it if it wasn't set from .conf file.
1471          */
1472         if (mpt->m_doneq_thread_n != 0 &&
1473             ddi_prop_exists(DDI_DEV_T_ANY, dip,
1474             0, "mptsas_doneq_length_threshold_prop") == 0 &&
1475             mpt->m_intr_cnt == 1) {
1476                 mpt->m_doneq_length_threshold = 0;
1477         }
1478 
1479 
1480         mutex_exit(&mpt->m_mutex);
1481 
1482         /*
1483          * Register the iport for multiple port HBA
1484          */
1485         mptsas_iport_register(mpt);
1486 
1487         /*
1488          * initialize SCSI HBA transport structure
1489          */
1490         if (mptsas_hba_setup(mpt) == FALSE)
1491                 goto fail;
1492         hba_attach_setup++;
1493 
1494         if (mptsas_smp_setup(mpt) == FALSE)
1495                 goto fail;
1496         smp_attach_setup++;
1497 
1498         if (mptsas_cache_create(mpt) == FALSE)
1499                 goto fail;
1500 
1501         mpt->m_scsi_reset_delay      = ddi_prop_get_int(DDI_DEV_T_ANY,
1502             dip, 0, "scsi-reset-delay", SCSI_DEFAULT_RESET_DELAY);
1503         if (mpt->m_scsi_reset_delay == 0) {
1504                 mptsas_log(mpt, CE_NOTE,
1505                     "scsi_reset_delay of 0 is not recommended,"
1506                     " resetting to SCSI_DEFAULT_RESET_DELAY\n");
1507                 mpt->m_scsi_reset_delay = SCSI_DEFAULT_RESET_DELAY;
1508         }
1509 
1510         /*
1511          * Initialize the wait and done FIFO queue
1512          */
1513         mpt->m_dlist.dl_tail = &mpt->m_dlist.dl_q;
1514         mpt->m_waitqtail = &mpt->m_waitq;
1515 
1516         /*
1517          * ioc cmd queue initialize
1518          */
1519         mpt->m_ioc_event_cmdtail = &mpt->m_ioc_event_cmdq;
1520         mpt->m_dev_handle = 0xFFFF;
1521 
1522         MPTSAS_ENABLE_INTR(mpt);
1523 
1524         /*
1525          * enable event notification
1526          */
1527         mutex_enter(&mpt->m_mutex);
1528         if (mptsas_ioc_enable_event_notification(mpt)) {
1529                 mutex_exit(&mpt->m_mutex);
1530                 goto fail;
1531         }
1532         mutex_exit(&mpt->m_mutex);
1533 
1534         /*
1535          * used for mptsas_watch
1536          */
1537         mptsas_list_add(mpt);
1538 
1539         mutex_enter(&mptsas_global_mutex);
1540         if (mptsas_timeouts_enabled == 0) {
1541                 mptsas_scsi_watchdog_tick = ddi_prop_get_int(DDI_DEV_T_ANY,
1542                     dip, 0, "scsi-watchdog-tick", DEFAULT_WD_TICK);
1543 
1544                 mptsas_tick = mptsas_scsi_watchdog_tick *
1545                     drv_usectohz((clock_t)1000000);
1546 
1547                 mptsas_timeout_id = timeout(mptsas_watch, NULL, mptsas_tick);
1548                 mptsas_timeouts_enabled = 1;
1549         }
1550         mutex_exit(&mptsas_global_mutex);
1551         added_watchdog++;
1552 
1553         /*
1554          * Initialize PHY info for smhba.
1555          * This requires watchdog to be enabled otherwise if interrupts
1556          * don't work the system will hang.
1557          */
1558         if (mptsas_smhba_setup(mpt)) {
1559                 mptsas_log(mpt, CE_WARN, "mptsas phy initialization "
1560                     "failed");
1561                 goto fail;
1562         }
1563 
1564         /* Check all dma handles allocated in attach */
1565         if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl)
1566             != DDI_SUCCESS) ||
1567             (mptsas_check_dma_handle(mpt->m_dma_req_sense_hdl)
1568             != DDI_SUCCESS) ||
1569             (mptsas_check_dma_handle(mpt->m_dma_reply_frame_hdl)
1570             != DDI_SUCCESS) ||
1571             (mptsas_check_dma_handle(mpt->m_dma_free_queue_hdl)
1572             != DDI_SUCCESS) ||
1573             (mptsas_check_dma_handle(mpt->m_dma_post_queue_hdl)
1574             != DDI_SUCCESS) ||
1575             (mptsas_check_dma_handle(mpt->m_hshk_dma_hdl)
1576             != DDI_SUCCESS)) {
1577                 goto fail;
1578         }
1579 
1580         /* Check all acc handles allocated in attach */
1581         if ((mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) ||
1582             (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl)
1583             != DDI_SUCCESS) ||
1584             (mptsas_check_acc_handle(mpt->m_acc_req_sense_hdl)
1585             != DDI_SUCCESS) ||
1586             (mptsas_check_acc_handle(mpt->m_acc_reply_frame_hdl)
1587             != DDI_SUCCESS) ||
1588             (mptsas_check_acc_handle(mpt->m_acc_free_queue_hdl)
1589             != DDI_SUCCESS) ||
1590             (mptsas_check_acc_handle(mpt->m_acc_post_queue_hdl)
1591             != DDI_SUCCESS) ||
1592             (mptsas_check_acc_handle(mpt->m_hshk_acc_hdl)
1593             != DDI_SUCCESS) ||
1594             (mptsas_check_acc_handle(mpt->m_config_handle)
1595             != DDI_SUCCESS)) {
1596                 goto fail;
1597         }
1598 
1599         /*
1600          * After this point, we are not going to fail the attach.
1601          */
1602 
1603         /* Print message of HBA present */
1604         ddi_report_dev(dip);
1605 
1606         /* report idle status to pm framework */
1607         if (mpt->m_options & MPTSAS_OPT_PM) {
1608                 (void) pm_idle_component(dip, 0);
1609         }
1610 
1611         return (DDI_SUCCESS);
1612 
1613 fail:
1614         mptsas_log(mpt, CE_WARN, "attach failed");
1615         mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
1616         ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
1617         if (mpt) {
1618                 /* deallocate in reverse order */
1619                 if (added_watchdog) {
1620                         mptsas_list_del(mpt);
1621                         mutex_enter(&mptsas_global_mutex);
1622 
1623                         if (mptsas_timeout_id && (mptsas_head == NULL)) {
1624                                 timeout_id_t tid = mptsas_timeout_id;
1625                                 mptsas_timeouts_enabled = 0;
1626                                 mptsas_timeout_id = 0;
1627                                 mutex_exit(&mptsas_global_mutex);
1628                                 (void) untimeout(tid);
1629                                 mutex_enter(&mptsas_global_mutex);
1630                         }
1631                         mutex_exit(&mptsas_global_mutex);
1632                 }
1633 
1634                 mptsas_cache_destroy(mpt);
1635 
1636                 if (smp_attach_setup) {
1637                         mptsas_smp_teardown(mpt);
1638                 }
1639                 if (hba_attach_setup) {
1640                         mptsas_hba_teardown(mpt);
1641                 }
1642 
1643                 if (mpt->m_targets)
1644                         refhash_destroy(mpt->m_targets);
1645                 if (mpt->m_smp_targets)
1646                         refhash_destroy(mpt->m_smp_targets);
1647 
1648                 if (mpt->m_active) {
1649                         mptsas_free_active_slots(mpt);
1650                 }
1651                 if (mpt->m_intr_cnt) {
1652                         mptsas_unregister_intrs(mpt);
1653                 }
1654 
1655                 if (doneq_thread_create) {
1656                         mutex_enter(&mpt->m_qthread_mutex);
1657                         q_thread_num = mpt->m_doneq_thread_n;
1658                         for (j = 0; j < q_thread_num; j++) {
1659                                 mutex_enter(&mpt->m_doneq_thread_id[j].mutex);
1660                                 mpt->m_doneq_thread_id[j].flag &=
1661                                     (~MPTSAS_DONEQ_THREAD_ACTIVE);
1662                                 cv_signal(&mpt->m_doneq_thread_id[j].cv);
1663                                 mutex_exit(&mpt->m_doneq_thread_id[j].mutex);
1664                         }
1665                         while (mpt->m_doneq_thread_n) {
1666                                 cv_wait(&mpt->m_qthread_cv,
1667                                     &mpt->m_qthread_mutex);
1668                         }
1669                         for (j = 0; j < q_thread_num; j++) {
1670                                 cv_destroy(&mpt->m_doneq_thread_id[j].cv);
1671                                 mutex_destroy(&mpt->m_doneq_thread_id[j].mutex);
1672                         }
1673                         kmem_free(mpt->m_doneq_thread_id,
1674                             sizeof (mptsas_doneq_thread_list_t)
1675                             * q_thread_num);
1676                         mutex_exit(&mpt->m_qthread_mutex);
1677                 }
1678                 if (txwq_thread_create) {
1679                         mutex_enter(&mpt->m_qthread_mutex);
1680                         q_thread_num = mpt->m_txwq_thread_n;
1681                         for (j = 0; j < q_thread_num; j++) {
1682                                 mutex_enter(&mpt->m_tx_waitq[j].txwq_mutex);
1683                                 mpt->m_tx_waitq[j].txwq_active = FALSE;
1684                                 cv_signal(&mpt->m_tx_waitq[j].txwq_cv);
1685                                 mutex_exit(&mpt->m_tx_waitq[j].txwq_mutex);
1686                         }
1687                         while (mpt->m_txwq_thread_n) {
1688                                 cv_wait(&mpt->m_qthread_cv,
1689                                     &mpt->m_qthread_mutex);
1690                         }
1691                         for (j = 0; j < q_thread_num; j++) {
1692                                 cv_destroy(&mpt->m_tx_waitq[j].txwq_cv);
1693                                 cv_destroy(&mpt->m_tx_waitq[j].txwq_drain_cv);
1694                                 mutex_destroy(&mpt->m_tx_waitq[j].txwq_mutex);
1695                         }
1696                 }
1697                 if (event_taskq_create) {
1698                         ddi_taskq_destroy(mpt->m_event_taskq);
1699                 }
1700                 if (dr_taskq_create) {
1701                         ddi_taskq_destroy(mpt->m_dr_taskq);
1702                 }
1703                 if (mutex_init_done) {
1704                         mutex_destroy(&mpt->m_qthread_mutex);
1705                         mutex_destroy(&mpt->m_passthru_mutex);
1706                         mutex_destroy(&mpt->m_mutex);
1707                         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
1708                                 mutex_destroy(
1709                                     &mpt->m_phy_info[i].smhba_info.phy_mutex);
1710                         }
1711                         cv_destroy(&mpt->m_qthread_cv);
1712                         cv_destroy(&mpt->m_cv);
1713                         cv_destroy(&mpt->m_passthru_cv);
1714                         cv_destroy(&mpt->m_fw_cv);
1715                         cv_destroy(&mpt->m_config_cv);
1716                         cv_destroy(&mpt->m_fw_diag_cv);
1717                 }
1718 
1719                 if (map_setup) {
1720                         mptsas_cfg_fini(mpt);
1721                 }
1722                 if (config_setup) {
1723                         mptsas_config_space_fini(mpt);
1724                 }
1725                 mptsas_free_handshake_msg(mpt);
1726                 mptsas_hba_fini(mpt);
1727 
1728                 mptsas_fm_fini(mpt);
1729                 ddi_soft_state_free(mptsas3_state, instance);
1730                 ddi_prop_remove_all(dip);
1731         }
1732         return (DDI_FAILURE);
1733 }
1734 
1735 static int
1736 mptsas_suspend(dev_info_t *devi)
1737 {
1738         mptsas_t        *mpt, *g;
1739         scsi_hba_tran_t *tran;
1740 
1741         if (scsi_hba_iport_unit_address(devi)) {
1742                 return (DDI_SUCCESS);
1743         }
1744 
1745         if ((tran = ddi_get_driver_private(devi)) == NULL)
1746                 return (DDI_SUCCESS);
1747 
1748         mpt = TRAN2MPT(tran);
1749         if (!mpt) {
1750                 return (DDI_SUCCESS);
1751         }
1752 
1753         mutex_enter(&mpt->m_mutex);
1754 
1755         if (mpt->m_suspended++) {
1756                 mutex_exit(&mpt->m_mutex);
1757                 return (DDI_SUCCESS);
1758         }
1759 
1760         /*
1761          * Cancel timeout threads for this mpt
1762          */
1763         if (mpt->m_quiesce_timeid) {
1764                 timeout_id_t tid = mpt->m_quiesce_timeid;
1765                 mpt->m_quiesce_timeid = 0;
1766                 mutex_exit(&mpt->m_mutex);
1767                 (void) untimeout(tid);
1768                 mutex_enter(&mpt->m_mutex);
1769         }
1770 
1771         if (mpt->m_restart_cmd_timeid) {
1772                 timeout_id_t tid = mpt->m_restart_cmd_timeid;
1773                 mpt->m_restart_cmd_timeid = 0;
1774                 mutex_exit(&mpt->m_mutex);
1775                 (void) untimeout(tid);
1776                 mutex_enter(&mpt->m_mutex);
1777         }
1778 
1779         mutex_exit(&mpt->m_mutex);
1780 
1781         (void) pm_idle_component(mpt->m_dip, 0);
1782 
1783         /*
1784          * Cancel watch threads if all mpts suspended
1785          */
1786         rw_enter(&mptsas_global_rwlock, RW_WRITER);
1787         for (g = mptsas_head; g != NULL; g = g->m_next) {
1788                 if (!g->m_suspended)
1789                         break;
1790         }
1791         rw_exit(&mptsas_global_rwlock);
1792 
1793         mutex_enter(&mptsas_global_mutex);
1794         if (g == NULL) {
1795                 timeout_id_t tid;
1796 
1797                 mptsas_timeouts_enabled = 0;
1798                 if (mptsas_timeout_id) {
1799                         tid = mptsas_timeout_id;
1800                         mptsas_timeout_id = 0;
1801                         mutex_exit(&mptsas_global_mutex);
1802                         (void) untimeout(tid);
1803                         mutex_enter(&mptsas_global_mutex);
1804                 }
1805                 if (mptsas_reset_watch) {
1806                         tid = mptsas_reset_watch;
1807                         mptsas_reset_watch = 0;
1808                         mutex_exit(&mptsas_global_mutex);
1809                         (void) untimeout(tid);
1810                         mutex_enter(&mptsas_global_mutex);
1811                 }
1812         }
1813         mutex_exit(&mptsas_global_mutex);
1814 
1815         mutex_enter(&mpt->m_mutex);
1816 
1817         /*
1818          * If this mpt is not in full power(PM_LEVEL_D0), just return.
1819          */
1820         if ((mpt->m_options & MPTSAS_OPT_PM) &&
1821             (mpt->m_power_level != PM_LEVEL_D0)) {
1822                 mutex_exit(&mpt->m_mutex);
1823                 return (DDI_SUCCESS);
1824         }
1825 
1826         /* Disable HBA interrupts in hardware */
1827         MPTSAS_DISABLE_INTR(mpt);
1828         /*
1829          * Send RAID action system shutdown to sync IR
1830          */
1831         mptsas_raid_action_system_shutdown(mpt);
1832 
1833         mutex_exit(&mpt->m_mutex);
1834 
1835         /* drain the taskq */
1836         ddi_taskq_wait(mpt->m_event_taskq);
1837         ddi_taskq_wait(mpt->m_dr_taskq);
1838 
1839         return (DDI_SUCCESS);
1840 }
1841 
1842 #ifdef  __sparc
1843 /*ARGSUSED*/
1844 static int
1845 mptsas_reset(dev_info_t *devi, ddi_reset_cmd_t cmd)
1846 {
1847         mptsas_t        *mpt;
1848         scsi_hba_tran_t *tran;
1849 
1850         /*
1851          * If this call is for iport, just return.
1852          */
1853         if (scsi_hba_iport_unit_address(devi))
1854                 return (DDI_SUCCESS);
1855 
1856         if ((tran = ddi_get_driver_private(devi)) == NULL)
1857                 return (DDI_SUCCESS);
1858 
1859         if ((mpt = TRAN2MPT(tran)) == NULL)
1860                 return (DDI_SUCCESS);
1861 
1862         /*
1863          * Send RAID action system shutdown to sync IR.  Disable HBA
1864          * interrupts in hardware first.
1865          */
1866         MPTSAS_DISABLE_INTR(mpt);
1867         mptsas_raid_action_system_shutdown(mpt);
1868 
1869         return (DDI_SUCCESS);
1870 }
1871 #else /* __sparc */
1872 /*
1873  * quiesce(9E) entry point.
1874  *
1875  * This function is called when the system is single-threaded at high
1876  * PIL with preemption disabled. Therefore, this function must not be
1877  * blocked.
1878  *
1879  * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
1880  * DDI_FAILURE indicates an error condition and should almost never happen.
1881  */
1882 static int
1883 mptsas_quiesce(dev_info_t *devi)
1884 {
1885         mptsas_t        *mpt;
1886         scsi_hba_tran_t *tran;
1887 
1888         /*
1889          * If this call is for iport, just return.
1890          */
1891         if (scsi_hba_iport_unit_address(devi))
1892                 return (DDI_SUCCESS);
1893 
1894         if ((tran = ddi_get_driver_private(devi)) == NULL)
1895                 return (DDI_SUCCESS);
1896 
1897         if ((mpt = TRAN2MPT(tran)) == NULL)
1898                 return (DDI_SUCCESS);
1899 
1900         /* Disable HBA interrupts in hardware */
1901         MPTSAS_DISABLE_INTR(mpt);
1902         /* Send RAID action system shutdonw to sync IR */
1903         mptsas_raid_action_system_shutdown(mpt);
1904 
1905         return (DDI_SUCCESS);
1906 }
1907 #endif  /* __sparc */
1908 
1909 /*
1910  * detach(9E).  Remove all device allocations and system resources;
1911  * disable device interrupts.
1912  * Return DDI_SUCCESS if done; DDI_FAILURE if there's a problem.
1913  */
1914 static int
1915 mptsas_detach(dev_info_t *devi, ddi_detach_cmd_t cmd)
1916 {
1917         /* CONSTCOND */
1918         ASSERT(NO_COMPETING_THREADS);
1919         NDBG0(("mptsas_detach: dip=0x%p cmd=0x%p", (void *)devi, (void *)cmd));
1920 
1921         switch (cmd) {
1922         case DDI_DETACH:
1923                 return (mptsas_do_detach(devi));
1924 
1925         case DDI_SUSPEND:
1926                 return (mptsas_suspend(devi));
1927 
1928         default:
1929                 return (DDI_FAILURE);
1930         }
1931         /* NOTREACHED */
1932 }
1933 
1934 static int
1935 mptsas_do_detach(dev_info_t *dip)
1936 {
1937         mptsas_t        *mpt;
1938         scsi_hba_tran_t *tran;
1939         int             circ = 0;
1940         int             circ1 = 0;
1941         mdi_pathinfo_t  *pip = NULL;
1942         int             i;
1943         int             q_thread_num = 0;
1944 
1945         NDBG0(("mptsas_do_detach: dip=0x%p", (void *)dip));
1946 
1947         if ((tran = ndi_flavorv_get(dip, SCSA_FLAVOR_SCSI_DEVICE)) == NULL)
1948                 return (DDI_FAILURE);
1949 
1950         mpt = TRAN2MPT(tran);
1951         if (!mpt) {
1952                 return (DDI_FAILURE);
1953         }
1954         /*
1955          * Still have pathinfo child, should not detach mpt driver
1956          */
1957         if (scsi_hba_iport_unit_address(dip)) {
1958                 if (mpt->m_mpxio_enable) {
1959                         /*
1960                          * MPxIO enabled for the iport
1961                          */
1962                         ndi_devi_enter(scsi_vhci_dip, &circ1);
1963                         ndi_devi_enter(dip, &circ);
1964                         while (pip = mdi_get_next_client_path(dip, NULL)) {
1965                                 if (mdi_pi_free(pip, 0) == MDI_SUCCESS) {
1966                                         continue;
1967                                 }
1968                                 ndi_devi_exit(dip, circ);
1969                                 ndi_devi_exit(scsi_vhci_dip, circ1);
1970                                 NDBG12(("detach failed because of "
1971                                     "outstanding path info"));
1972                                 return (DDI_FAILURE);
1973                         }
1974                         ndi_devi_exit(dip, circ);
1975                         ndi_devi_exit(scsi_vhci_dip, circ1);
1976                         (void) mdi_phci_unregister(dip, 0);
1977                 }
1978 
1979                 ddi_prop_remove_all(dip);
1980 
1981                 return (DDI_SUCCESS);
1982         }
1983 
1984         /* Make sure power level is D0 before accessing registers */
1985         if (mpt->m_options & MPTSAS_OPT_PM) {
1986                 (void) pm_busy_component(dip, 0);
1987                 if (mpt->m_power_level != PM_LEVEL_D0) {
1988                         if (pm_raise_power(dip, 0, PM_LEVEL_D0) !=
1989                             DDI_SUCCESS) {
1990                                 mptsas_log(mpt, CE_WARN,
1991                                     "mptsas3%d: Raise power request failed.",
1992                                     mpt->m_instance);
1993                                 (void) pm_idle_component(dip, 0);
1994                                 return (DDI_FAILURE);
1995                         }
1996                 }
1997         }
1998 
1999         /*
2000          * Send RAID action system shutdown to sync IR.  After action, send a
2001          * Message Unit Reset. Since after that DMA resource will be freed,
2002          * set ioc to READY state will avoid HBA initiated DMA operation.
2003          */
2004         mutex_enter(&mpt->m_mutex);
2005         MPTSAS_DISABLE_INTR(mpt);
2006         mptsas_raid_action_system_shutdown(mpt);
2007         mpt->m_softstate |= MPTSAS_SS_MSG_UNIT_RESET;
2008         (void) mptsas_ioc_reset(mpt, FALSE);
2009         mutex_exit(&mpt->m_mutex);
2010         mptsas_rem_intrs(mpt);
2011         ddi_taskq_destroy(mpt->m_event_taskq);
2012         ddi_taskq_destroy(mpt->m_dr_taskq);
2013 
2014         if (mpt->m_doneq_thread_n) {
2015                 mutex_enter(&mpt->m_qthread_mutex);
2016                 q_thread_num = mpt->m_doneq_thread_n;
2017                 for (i = 0; i < mpt->m_doneq_thread_n; i++) {
2018                         mutex_enter(&mpt->m_doneq_thread_id[i].mutex);
2019                         mpt->m_doneq_thread_id[i].flag &=
2020                             (~MPTSAS_DONEQ_THREAD_ACTIVE);
2021                         cv_signal(&mpt->m_doneq_thread_id[i].cv);
2022                         mutex_exit(&mpt->m_doneq_thread_id[i].mutex);
2023                 }
2024                 while (mpt->m_doneq_thread_n) {
2025                         cv_wait(&mpt->m_qthread_cv,
2026                             &mpt->m_qthread_mutex);
2027                 }
2028                 for (i = 0;  i < q_thread_num; i++) {
2029                         cv_destroy(&mpt->m_doneq_thread_id[i].cv);
2030                         mutex_destroy(&mpt->m_doneq_thread_id[i].mutex);
2031                 }
2032                 kmem_free(mpt->m_doneq_thread_id,
2033                     sizeof (mptsas_doneq_thread_list_t)
2034                     * q_thread_num);
2035                 mutex_exit(&mpt->m_qthread_mutex);
2036         }
2037         if (mpt->m_txwq_thread_n) {
2038                 mutex_enter(&mpt->m_qthread_mutex);
2039                 q_thread_num = mpt->m_txwq_thread_n;
2040                 for (i = 0; i < q_thread_num; i++) {
2041                         mutex_enter(&mpt->m_tx_waitq[i].txwq_mutex);
2042                         mpt->m_tx_waitq[i].txwq_active = FALSE;
2043                         cv_signal(&mpt->m_tx_waitq[i].txwq_cv);
2044                         mutex_exit(&mpt->m_tx_waitq[i].txwq_mutex);
2045                 }
2046                 while (mpt->m_txwq_thread_n) {
2047                         cv_wait(&mpt->m_qthread_cv,
2048                             &mpt->m_qthread_mutex);
2049                 }
2050                 for (i = 0; i < q_thread_num; i++) {
2051                         cv_destroy(&mpt->m_tx_waitq[i].txwq_cv);
2052                         cv_destroy(&mpt->m_tx_waitq[i].txwq_drain_cv);
2053                         mutex_destroy(&mpt->m_tx_waitq[i].txwq_mutex);
2054                 }
2055         }
2056 
2057         scsi_hba_reset_notify_tear_down(mpt->m_reset_notify_listf);
2058 
2059         mptsas_list_del(mpt);
2060 
2061         /*
2062          * Cancel timeout threads for this mpt
2063          */
2064         mutex_enter(&mpt->m_mutex);
2065         if (mpt->m_quiesce_timeid) {
2066                 timeout_id_t tid = mpt->m_quiesce_timeid;
2067                 mpt->m_quiesce_timeid = 0;
2068                 mutex_exit(&mpt->m_mutex);
2069                 (void) untimeout(tid);
2070                 mutex_enter(&mpt->m_mutex);
2071         }
2072 
2073         if (mpt->m_restart_cmd_timeid) {
2074                 timeout_id_t tid = mpt->m_restart_cmd_timeid;
2075                 mpt->m_restart_cmd_timeid = 0;
2076                 mutex_exit(&mpt->m_mutex);
2077                 (void) untimeout(tid);
2078                 mutex_enter(&mpt->m_mutex);
2079         }
2080 
2081         mutex_exit(&mpt->m_mutex);
2082 
2083         /*
2084          * last mpt? ... if active, CANCEL watch threads.
2085          */
2086         mutex_enter(&mptsas_global_mutex);
2087         if (mptsas_head == NULL) {
2088                 timeout_id_t tid;
2089                 /*
2090                  * Clear mptsas_timeouts_enable so that the watch thread
2091                  * gets restarted on DDI_ATTACH
2092                  */
2093                 mptsas_timeouts_enabled = 0;
2094                 if (mptsas_timeout_id) {
2095                         tid = mptsas_timeout_id;
2096                         mptsas_timeout_id = 0;
2097                         mutex_exit(&mptsas_global_mutex);
2098                         (void) untimeout(tid);
2099                         mutex_enter(&mptsas_global_mutex);
2100                 }
2101                 if (mptsas_reset_watch) {
2102                         tid = mptsas_reset_watch;
2103                         mptsas_reset_watch = 0;
2104                         mutex_exit(&mptsas_global_mutex);
2105                         (void) untimeout(tid);
2106                         mutex_enter(&mptsas_global_mutex);
2107                 }
2108         }
2109         mutex_exit(&mptsas_global_mutex);
2110 
2111         /*
2112          * Delete Phy stats
2113          */
2114         mptsas_destroy_phy_stats(mpt);
2115 
2116         mptsas_destroy_hashes(mpt);
2117 
2118         /*
2119          * Delete nt_active.
2120          */
2121         mutex_enter(&mpt->m_mutex);
2122         mptsas_free_active_slots(mpt);
2123         mutex_exit(&mpt->m_mutex);
2124 
2125         /* deallocate everything that was allocated in mptsas_attach */
2126         mptsas_cache_destroy(mpt);
2127 
2128         mptsas_hba_fini(mpt);
2129         mptsas_cfg_fini(mpt);
2130 
2131         /* Lower the power informing PM Framework */
2132         if (mpt->m_options & MPTSAS_OPT_PM) {
2133                 if (pm_lower_power(dip, 0, PM_LEVEL_D3) != DDI_SUCCESS)
2134                         mptsas_log(mpt, CE_WARN,
2135                             "!mptsas3%d: Lower power request failed "
2136                             "during detach, ignoring.",
2137                             mpt->m_instance);
2138         }
2139 
2140         mutex_destroy(&mpt->m_qthread_mutex);
2141         mutex_destroy(&mpt->m_passthru_mutex);
2142         mutex_destroy(&mpt->m_mutex);
2143         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
2144                 mutex_destroy(&mpt->m_phy_info[i].smhba_info.phy_mutex);
2145         }
2146         cv_destroy(&mpt->m_qthread_cv);
2147         cv_destroy(&mpt->m_cv);
2148         cv_destroy(&mpt->m_passthru_cv);
2149         cv_destroy(&mpt->m_fw_cv);
2150         cv_destroy(&mpt->m_config_cv);
2151         cv_destroy(&mpt->m_fw_diag_cv);
2152 
2153 
2154         mptsas_smp_teardown(mpt);
2155         mptsas_hba_teardown(mpt);
2156 
2157         mptsas_config_space_fini(mpt);
2158 
2159         mptsas_free_handshake_msg(mpt);
2160 
2161         mptsas_fm_fini(mpt);
2162         ddi_soft_state_free(mptsas3_state, ddi_get_instance(dip));
2163         ddi_prop_remove_all(dip);
2164 
2165         return (DDI_SUCCESS);
2166 }
2167 
2168 static void
2169 mptsas_list_add(mptsas_t *mpt)
2170 {
2171         rw_enter(&mptsas_global_rwlock, RW_WRITER);
2172 
2173         if (mptsas_head == NULL) {
2174                 mptsas_head = mpt;
2175         } else {
2176                 mptsas_tail->m_next = mpt;
2177         }
2178         mptsas_tail = mpt;
2179         rw_exit(&mptsas_global_rwlock);
2180 }
2181 
2182 static void
2183 mptsas_list_del(mptsas_t *mpt)
2184 {
2185         mptsas_t *m;
2186         /*
2187          * Remove device instance from the global linked list
2188          */
2189         rw_enter(&mptsas_global_rwlock, RW_WRITER);
2190         if (mptsas_head == mpt) {
2191                 m = mptsas_head = mpt->m_next;
2192         } else {
2193                 for (m = mptsas_head; m != NULL; m = m->m_next) {
2194                         if (m->m_next == mpt) {
2195                                 m->m_next = mpt->m_next;
2196                                 break;
2197                         }
2198                 }
2199                 if (m == NULL) {
2200                         mptsas_log(mpt, CE_PANIC, "Not in softc list!");
2201                 }
2202         }
2203 
2204         if (mptsas_tail == mpt) {
2205                 mptsas_tail = m;
2206         }
2207         rw_exit(&mptsas_global_rwlock);
2208 }
2209 
2210 static int
2211 mptsas_alloc_handshake_msg(mptsas_t *mpt, size_t alloc_size)
2212 {
2213         ddi_dma_attr_t  task_dma_attrs;
2214 
2215         mpt->m_hshk_dma_size = 0;
2216         task_dma_attrs = mpt->m_msg_dma_attr;
2217         task_dma_attrs.dma_attr_sgllen = 1;
2218         task_dma_attrs.dma_attr_granular = (uint32_t)(alloc_size);
2219 
2220         /* allocate Task Management ddi_dma resources */
2221         if (mptsas_dma_addr_create(mpt, task_dma_attrs,
2222             &mpt->m_hshk_dma_hdl, &mpt->m_hshk_acc_hdl, &mpt->m_hshk_memp,
2223             alloc_size, NULL) == FALSE) {
2224                 return (DDI_FAILURE);
2225         }
2226         mpt->m_hshk_dma_size = alloc_size;
2227 
2228         return (DDI_SUCCESS);
2229 }
2230 
2231 static void
2232 mptsas_free_handshake_msg(mptsas_t *mpt)
2233 {
2234         if (mpt->m_hshk_dma_size == 0)
2235                 return;
2236         mptsas_dma_addr_destroy(&mpt->m_hshk_dma_hdl, &mpt->m_hshk_acc_hdl);
2237         mpt->m_hshk_dma_size = 0;
2238 }
2239 
2240 static int
2241 mptsas_hba_setup(mptsas_t *mpt)
2242 {
2243         scsi_hba_tran_t         *hba_tran;
2244         int                     tran_flags;
2245 
2246         /* Allocate a transport structure */
2247         hba_tran = mpt->m_tran = scsi_hba_tran_alloc(mpt->m_dip,
2248             SCSI_HBA_CANSLEEP);
2249         ASSERT(mpt->m_tran != NULL);
2250 
2251         hba_tran->tran_hba_private   = mpt;
2252         hba_tran->tran_tgt_private   = NULL;
2253 
2254         hba_tran->tran_tgt_init              = mptsas_scsi_tgt_init;
2255         hba_tran->tran_tgt_free              = mptsas_scsi_tgt_free;
2256 
2257         hba_tran->tran_start         = mptsas_scsi_start;
2258         hba_tran->tran_reset         = mptsas_scsi_reset;
2259         hba_tran->tran_abort         = mptsas_scsi_abort;
2260         hba_tran->tran_getcap                = mptsas_scsi_getcap;
2261         hba_tran->tran_setcap                = mptsas_scsi_setcap;
2262         hba_tran->tran_init_pkt              = mptsas_scsi_init_pkt;
2263         hba_tran->tran_destroy_pkt   = mptsas_scsi_destroy_pkt;
2264 
2265         hba_tran->tran_dmafree               = mptsas_scsi_dmafree;
2266         hba_tran->tran_sync_pkt              = mptsas_scsi_sync_pkt;
2267         hba_tran->tran_reset_notify  = mptsas_scsi_reset_notify;
2268 
2269         hba_tran->tran_get_bus_addr  = mptsas_get_bus_addr;
2270         hba_tran->tran_get_name              = mptsas_get_name;
2271 
2272         hba_tran->tran_quiesce               = mptsas_scsi_quiesce;
2273         hba_tran->tran_unquiesce     = mptsas_scsi_unquiesce;
2274         hba_tran->tran_bus_reset     = NULL;
2275 
2276         hba_tran->tran_add_eventcall = NULL;
2277         hba_tran->tran_get_eventcookie       = NULL;
2278         hba_tran->tran_post_event    = NULL;
2279         hba_tran->tran_remove_eventcall      = NULL;
2280 
2281         hba_tran->tran_bus_config    = mptsas_bus_config;
2282 
2283         hba_tran->tran_interconnect_type = INTERCONNECT_SAS;
2284 
2285         /*
2286          * All children of the HBA are iports. We need tran was cloned.
2287          * So we pass the flags to SCSA. SCSI_HBA_TRAN_CLONE will be
2288          * inherited to iport's tran vector.
2289          */
2290         tran_flags = (SCSI_HBA_HBA | SCSI_HBA_TRAN_CLONE);
2291 
2292         if (scsi_hba_attach_setup(mpt->m_dip, &mpt->m_msg_dma_attr,
2293             hba_tran, tran_flags) != DDI_SUCCESS) {
2294                 mptsas_log(mpt, CE_WARN, "hba attach setup failed");
2295                 scsi_hba_tran_free(hba_tran);
2296                 mpt->m_tran = NULL;
2297                 return (FALSE);
2298         }
2299         return (TRUE);
2300 }
2301 
2302 static void
2303 mptsas_hba_teardown(mptsas_t *mpt)
2304 {
2305         (void) scsi_hba_detach(mpt->m_dip);
2306         if (mpt->m_tran != NULL) {
2307                 scsi_hba_tran_free(mpt->m_tran);
2308                 mpt->m_tran = NULL;
2309         }
2310 }
2311 
2312 static void
2313 mptsas_iport_register(mptsas_t *mpt)
2314 {
2315         int i, j;
2316         mptsas_phymask_t        mask = 0x0;
2317         /*
2318          * initial value of mask is 0
2319          */
2320         mutex_enter(&mpt->m_mutex);
2321         for (i = 0; i < mpt->m_num_phys; i++) {
2322                 mptsas_phymask_t phy_mask = 0x0;
2323                 char phy_mask_name[MPTSAS_MAX_PHYS];
2324                 uint8_t current_port;
2325 
2326                 if (mpt->m_phy_info[i].attached_devhdl == 0)
2327                         continue;
2328 
2329                 bzero(phy_mask_name, sizeof (phy_mask_name));
2330 
2331                 current_port = mpt->m_phy_info[i].port_num;
2332 
2333                 if ((mask & (1 << i)) != 0)
2334                         continue;
2335 
2336                 for (j = 0; j < mpt->m_num_phys; j++) {
2337                         if (mpt->m_phy_info[j].attached_devhdl &&
2338                             (mpt->m_phy_info[j].port_num == current_port)) {
2339                                 phy_mask |= (1 << j);
2340                         }
2341                 }
2342                 mask = mask | phy_mask;
2343 
2344                 for (j = 0; j < mpt->m_num_phys; j++) {
2345                         if ((phy_mask >> j) & 0x01) {
2346                                 mpt->m_phy_info[j].phy_mask = phy_mask;
2347                         }
2348                 }
2349 
2350                 (void) sprintf(phy_mask_name, "%x", phy_mask);
2351 
2352                 mutex_exit(&mpt->m_mutex);
2353                 /*
2354                  * register a iport
2355                  */
2356                 (void) scsi_hba_iport_register(mpt->m_dip, phy_mask_name);
2357                 mutex_enter(&mpt->m_mutex);
2358         }
2359         mutex_exit(&mpt->m_mutex);
2360         /*
2361          * register a virtual port for RAID volume always
2362          */
2363         (void) scsi_hba_iport_register(mpt->m_dip, "v0");
2364 
2365 }
2366 
2367 static int
2368 mptsas_smp_setup(mptsas_t *mpt)
2369 {
2370         mpt->m_smptran = smp_hba_tran_alloc(mpt->m_dip);
2371         ASSERT(mpt->m_smptran != NULL);
2372         mpt->m_smptran->smp_tran_hba_private = mpt;
2373         mpt->m_smptran->smp_tran_start = mptsas_smp_start;
2374         if (smp_hba_attach_setup(mpt->m_dip, mpt->m_smptran) != DDI_SUCCESS) {
2375                 mptsas_log(mpt, CE_WARN, "smp attach setup failed");
2376                 smp_hba_tran_free(mpt->m_smptran);
2377                 mpt->m_smptran = NULL;
2378                 return (FALSE);
2379         }
2380         /*
2381          * Initialize smp hash table
2382          */
2383         mpt->m_smp_targets = refhash_create(MPTSAS_SMP_BUCKET_COUNT,
2384             mptsas_target_addr_hash, mptsas_target_addr_cmp,
2385             mptsas_smp_free, sizeof (mptsas_smp_t),
2386             offsetof(mptsas_smp_t, m_link), offsetof(mptsas_smp_t, m_addr),
2387             KM_SLEEP);
2388         mpt->m_smp_devhdl = 0xFFFF;
2389 
2390         return (TRUE);
2391 }
2392 
2393 static void
2394 mptsas_smp_teardown(mptsas_t *mpt)
2395 {
2396         (void) smp_hba_detach(mpt->m_dip);
2397         if (mpt->m_smptran != NULL) {
2398                 smp_hba_tran_free(mpt->m_smptran);
2399                 mpt->m_smptran = NULL;
2400         }
2401         mpt->m_smp_devhdl = 0;
2402 }
2403 
2404 static int
2405 mptsas_cache_create(mptsas_t *mpt)
2406 {
2407         int instance = mpt->m_instance;
2408         char buf[64];
2409 
2410         /*
2411          * create kmem cache for packets
2412          */
2413         (void) sprintf(buf, "mptsas3%d_cache", instance);
2414         mpt->m_kmem_cache = kmem_cache_create(buf,
2415             sizeof (struct mptsas_cmd) + scsi_pkt_size(), 16,
2416             mptsas_kmem_cache_constructor, mptsas_kmem_cache_destructor,
2417             NULL, (void *)mpt, NULL, 0);
2418 
2419         if (mpt->m_kmem_cache == NULL) {
2420                 mptsas_log(mpt, CE_WARN, "creating kmem cache failed");
2421                 return (FALSE);
2422         }
2423 
2424         /*
2425          * create kmem cache for extra SGL frames if SGL cannot
2426          * be accomodated into main request frame.
2427          */
2428         (void) sprintf(buf, "mptsas3%d_cache_frames", instance);
2429         mpt->m_cache_frames = kmem_cache_create(buf,
2430             sizeof (mptsas_cache_frames_t), 16,
2431             mptsas_cache_frames_constructor, mptsas_cache_frames_destructor,
2432             NULL, (void *)mpt, NULL, 0);
2433 
2434         if (mpt->m_cache_frames == NULL) {
2435                 mptsas_log(mpt, CE_WARN, "creating cache for frames failed");
2436                 return (FALSE);
2437         }
2438 
2439         return (TRUE);
2440 }
2441 
2442 static void
2443 mptsas_cache_destroy(mptsas_t *mpt)
2444 {
2445         /* deallocate in reverse order */
2446         if (mpt->m_cache_frames) {
2447                 kmem_cache_destroy(mpt->m_cache_frames);
2448                 mpt->m_cache_frames = NULL;
2449         }
2450         if (mpt->m_kmem_cache) {
2451                 kmem_cache_destroy(mpt->m_kmem_cache);
2452                 mpt->m_kmem_cache = NULL;
2453         }
2454 }
2455 
2456 static int
2457 mptsas_power(dev_info_t *dip, int component, int level)
2458 {
2459 #ifndef __lock_lint
2460         _NOTE(ARGUNUSED(component))
2461 #endif
2462         mptsas_t        *mpt;
2463         int             rval = DDI_SUCCESS;
2464         int             polls = 0;
2465         uint32_t        ioc_status;
2466 
2467         if (scsi_hba_iport_unit_address(dip) != 0)
2468                 return (DDI_SUCCESS);
2469 
2470         mpt = ddi_get_soft_state(mptsas3_state, ddi_get_instance(dip));
2471         if (mpt == NULL) {
2472                 return (DDI_FAILURE);
2473         }
2474 
2475         mutex_enter(&mpt->m_mutex);
2476 
2477         /*
2478          * If the device is busy, don't lower its power level
2479          */
2480         if (mpt->m_busy && (mpt->m_power_level > level)) {
2481                 mutex_exit(&mpt->m_mutex);
2482                 return (DDI_FAILURE);
2483         }
2484         switch (level) {
2485         case PM_LEVEL_D0:
2486                 NDBG11(("mptsas3%d: turning power ON.", mpt->m_instance));
2487                 MPTSAS_POWER_ON(mpt);
2488                 /*
2489                  * Wait up to 30 seconds for IOC to come out of reset.
2490                  */
2491                 while (((ioc_status = ddi_get32(mpt->m_datap,
2492                     &mpt->m_reg->Doorbell)) &
2493                     MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_RESET) {
2494                         if (polls++ > 3000) {
2495                                 break;
2496                         }
2497                         delay(drv_usectohz(10000));
2498                 }
2499                 /*
2500                  * If IOC is not in operational state, try to hard reset it.
2501                  */
2502                 if ((ioc_status & MPI2_IOC_STATE_MASK) !=
2503                     MPI2_IOC_STATE_OPERATIONAL) {
2504                         mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
2505                         if (mptsas_restart_ioc(mpt) == DDI_FAILURE) {
2506                                 mptsas_log(mpt, CE_WARN,
2507                                     "mptsas_power: hard reset failed");
2508                                 mutex_exit(&mpt->m_mutex);
2509                                 return (DDI_FAILURE);
2510                         }
2511                 }
2512                 mpt->m_power_level = PM_LEVEL_D0;
2513                 break;
2514         case PM_LEVEL_D3:
2515                 NDBG11(("mptsas3%d: turning power OFF.", mpt->m_instance));
2516                 MPTSAS_POWER_OFF(mpt);
2517                 break;
2518         default:
2519                 mptsas_log(mpt, CE_WARN, "mptsas3%d: unknown power level <%x>.",
2520                     mpt->m_instance, level);
2521                 rval = DDI_FAILURE;
2522                 break;
2523         }
2524         mutex_exit(&mpt->m_mutex);
2525         return (rval);
2526 }
2527 
2528 /*
2529  * Initialize configuration space and figure out which
2530  * chip and revison of the chip the mpt driver is using.
2531  */
2532 static int
2533 mptsas_config_space_init(mptsas_t *mpt)
2534 {
2535         NDBG0(("mptsas_config_space_init"));
2536 
2537         if (mpt->m_config_handle != NULL)
2538                 return (TRUE);
2539 
2540         if (pci_config_setup(mpt->m_dip,
2541             &mpt->m_config_handle) != DDI_SUCCESS) {
2542                 mptsas_log(mpt, CE_WARN, "cannot map configuration space.");
2543                 return (FALSE);
2544         }
2545 
2546         /*
2547          * This is a workaround for a XMITS ASIC bug which does not
2548          * drive the CBE upper bits.
2549          */
2550         if (pci_config_get16(mpt->m_config_handle, PCI_CONF_STAT) &
2551             PCI_STAT_PERROR) {
2552                 pci_config_put16(mpt->m_config_handle, PCI_CONF_STAT,
2553                     PCI_STAT_PERROR);
2554         }
2555 
2556         mptsas_setup_cmd_reg(mpt);
2557 
2558         /*
2559          * Get the chip device id:
2560          */
2561         mpt->m_devid = pci_config_get16(mpt->m_config_handle, PCI_CONF_DEVID);
2562 
2563         /*
2564          * Save the revision.
2565          */
2566         mpt->m_revid = pci_config_get8(mpt->m_config_handle, PCI_CONF_REVID);
2567 
2568         /*
2569          * Save the SubSystem Vendor and Device IDs
2570          */
2571         mpt->m_svid = pci_config_get16(mpt->m_config_handle, PCI_CONF_SUBVENID);
2572         mpt->m_ssid = pci_config_get16(mpt->m_config_handle, PCI_CONF_SUBSYSID);
2573 
2574         /*
2575          * Set the latency timer to 0x40 as specified by the upa -> pci
2576          * bridge chip design team.  This may be done by the sparc pci
2577          * bus nexus driver, but the driver should make sure the latency
2578          * timer is correct for performance reasons.
2579          */
2580         pci_config_put8(mpt->m_config_handle, PCI_CONF_LATENCY_TIMER,
2581             MPTSAS_LATENCY_TIMER);
2582 
2583         (void) mptsas_get_pci_cap(mpt);
2584         return (TRUE);
2585 }
2586 
2587 static void
2588 mptsas_config_space_fini(mptsas_t *mpt)
2589 {
2590         if (mpt->m_config_handle != NULL) {
2591                 mptsas_disable_bus_master(mpt);
2592                 pci_config_teardown(&mpt->m_config_handle);
2593                 mpt->m_config_handle = NULL;
2594         }
2595 }
2596 
2597 static void
2598 mptsas_setup_cmd_reg(mptsas_t *mpt)
2599 {
2600         ushort_t        cmdreg;
2601 
2602         /*
2603          * Set the command register to the needed values.
2604          */
2605         cmdreg = pci_config_get16(mpt->m_config_handle, PCI_CONF_COMM);
2606         cmdreg |= (PCI_COMM_ME | PCI_COMM_SERR_ENABLE |
2607             PCI_COMM_PARITY_DETECT | PCI_COMM_MAE);
2608         cmdreg &= ~PCI_COMM_IO;
2609         pci_config_put16(mpt->m_config_handle, PCI_CONF_COMM, cmdreg);
2610 }
2611 
2612 static void
2613 mptsas_disable_bus_master(mptsas_t *mpt)
2614 {
2615         ushort_t        cmdreg;
2616 
2617         /*
2618          * Clear the master enable bit in the PCI command register.
2619          * This prevents any bus mastering activity like DMA.
2620          */
2621         cmdreg = pci_config_get16(mpt->m_config_handle, PCI_CONF_COMM);
2622         cmdreg &= ~PCI_COMM_ME;
2623         pci_config_put16(mpt->m_config_handle, PCI_CONF_COMM, cmdreg);
2624 }
2625 
2626 int
2627 mptsas_dma_alloc(mptsas_t *mpt, mptsas_dma_alloc_state_t *dma_statep)
2628 {
2629         ddi_dma_attr_t  attrs;
2630 
2631         attrs = mpt->m_io_dma_attr;
2632         attrs.dma_attr_sgllen = 1;
2633 
2634         ASSERT(dma_statep != NULL);
2635 
2636         if (mptsas_dma_addr_create(mpt, attrs, &dma_statep->handle,
2637             &dma_statep->accessp, &dma_statep->memp, dma_statep->size,
2638             &dma_statep->cookie) == FALSE) {
2639                 return (DDI_FAILURE);
2640         }
2641 
2642         return (DDI_SUCCESS);
2643 }
2644 
2645 void
2646 mptsas_dma_free(mptsas_dma_alloc_state_t *dma_statep)
2647 {
2648         ASSERT(dma_statep != NULL);
2649         mptsas_dma_addr_destroy(&dma_statep->handle, &dma_statep->accessp);
2650         dma_statep->size = 0;
2651 }
2652 
2653 int
2654 mptsas_do_dma(mptsas_t *mpt, uint32_t size, int var, int (*callback)())
2655 {
2656         ddi_dma_attr_t          attrs;
2657         ddi_dma_handle_t        dma_handle;
2658         caddr_t                 memp;
2659         ddi_acc_handle_t        accessp;
2660         int                     rval;
2661 
2662         ASSERT(mutex_owned(&mpt->m_mutex));
2663 
2664         attrs = mpt->m_msg_dma_attr;
2665         attrs.dma_attr_sgllen = 1;
2666         attrs.dma_attr_granular = size;
2667 
2668         if (mptsas_dma_addr_create(mpt, attrs, &dma_handle,
2669             &accessp, &memp, size, NULL) == FALSE) {
2670                 return (DDI_FAILURE);
2671         }
2672 
2673         rval = (*callback) (mpt, memp, var, accessp);
2674 
2675         if ((mptsas_check_dma_handle(dma_handle) != DDI_SUCCESS) ||
2676             (mptsas_check_acc_handle(accessp) != DDI_SUCCESS)) {
2677                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2678                 rval = DDI_FAILURE;
2679         }
2680 
2681         mptsas_dma_addr_destroy(&dma_handle, &accessp);
2682         return (rval);
2683 
2684 }
2685 
2686 static int
2687 mptsas_alloc_request_frames(mptsas_t *mpt)
2688 {
2689         ddi_dma_attr_t          frame_dma_attrs;
2690         caddr_t                 memp;
2691         ddi_dma_cookie_t        cookie;
2692         size_t                  mem_size;
2693 
2694         /*
2695          * re-alloc when it has already alloced
2696          */
2697         if (mpt->m_dma_flags & MPTSAS_REQ_FRAME) {
2698                 mptsas_dma_addr_destroy(&mpt->m_dma_req_frame_hdl,
2699                     &mpt->m_acc_req_frame_hdl);
2700                 mpt->m_dma_flags &= ~MPTSAS_REQ_FRAME;
2701         }
2702 
2703         /*
2704          * The size of the request frame pool is:
2705          *   Number of Request Frames * Request Frame Size
2706          */
2707         mem_size = mpt->m_max_requests * mpt->m_req_frame_size;
2708 
2709         /*
2710          * set the DMA attributes.  System Request Message Frames must be
2711          * aligned on a 16-byte boundry.
2712          */
2713         frame_dma_attrs = mpt->m_msg_dma_attr;
2714         frame_dma_attrs.dma_attr_align = 16;
2715         frame_dma_attrs.dma_attr_sgllen = 1;
2716 
2717         /*
2718          * allocate the request frame pool.
2719          */
2720         if (mptsas_dma_addr_create(mpt, frame_dma_attrs,
2721             &mpt->m_dma_req_frame_hdl, &mpt->m_acc_req_frame_hdl, &memp,
2722             mem_size, &cookie) == FALSE) {
2723                 return (DDI_FAILURE);
2724         }
2725 
2726         /*
2727          * Store the request frame memory address.  This chip uses this
2728          * address to dma to and from the driver's frame.  The second
2729          * address is the address mpt uses to fill in the frame.
2730          */
2731         mpt->m_req_frame_dma_addr = cookie.dmac_laddress;
2732         mpt->m_req_frame = memp;
2733 
2734         /*
2735          * Clear the request frame pool.
2736          */
2737         bzero(mpt->m_req_frame, mem_size);
2738 
2739         mpt->m_dma_flags |= MPTSAS_REQ_FRAME;
2740         return (DDI_SUCCESS);
2741 }
2742 
2743 static int
2744 mptsas_alloc_sense_bufs(mptsas_t *mpt)
2745 {
2746         ddi_dma_attr_t          sense_dma_attrs;
2747         caddr_t                 memp;
2748         ddi_dma_cookie_t        cookie;
2749         size_t                  mem_size;
2750         int                     num_extrqsense_bufs;
2751 
2752         /*
2753          * re-alloc when it has already alloced
2754          */
2755         if (mpt->m_dma_flags & MPTSAS_REQ_SENSE) {
2756                 rmfreemap(mpt->m_erqsense_map);
2757                 mptsas_dma_addr_destroy(&mpt->m_dma_req_sense_hdl,
2758                     &mpt->m_acc_req_sense_hdl);
2759                 mpt->m_dma_flags &= ~MPTSAS_REQ_SENSE;
2760         }
2761 
2762         /*
2763          * The size of the request sense pool is:
2764          *   (Number of Request Frames - 2 ) * Request Sense Size +
2765          *   extra memory for extended sense requests.
2766          */
2767         mem_size = ((mpt->m_max_requests - 2) * mpt->m_req_sense_size) +
2768             mptsas_extreq_sense_bufsize;
2769 
2770         /*
2771          * set the DMA attributes.  ARQ buffers
2772          * aligned on a 16-byte boundry.
2773          */
2774         sense_dma_attrs = mpt->m_msg_dma_attr;
2775         sense_dma_attrs.dma_attr_align = 16;
2776         sense_dma_attrs.dma_attr_sgllen = 1;
2777 
2778         /*
2779          * allocate the request sense buffer pool.
2780          */
2781         if (mptsas_dma_addr_create(mpt, sense_dma_attrs,
2782             &mpt->m_dma_req_sense_hdl, &mpt->m_acc_req_sense_hdl, &memp,
2783             mem_size, &cookie) == FALSE) {
2784                 return (DDI_FAILURE);
2785         }
2786 
2787         /*
2788          * Store the request sense base memory address.  This chip uses this
2789          * address to dma the request sense data.  The second
2790          * address is the address mpt uses to access the data.
2791          * The third is the base for the extended rqsense buffers.
2792          */
2793         mpt->m_req_sense_dma_addr = cookie.dmac_laddress;
2794         mpt->m_req_sense = memp;
2795         memp += (mpt->m_max_requests - 2) * mpt->m_req_sense_size;
2796         mpt->m_extreq_sense = memp;
2797 
2798         /*
2799          * The extra memory is divided up into multiples of the base
2800          * buffer size in order to allocate via rmalloc().
2801          * Note that the rmallocmap cannot start at zero!
2802          */
2803         num_extrqsense_bufs = mptsas_extreq_sense_bufsize /
2804             mpt->m_req_sense_size;
2805         mpt->m_erqsense_map = rmallocmap_wait(num_extrqsense_bufs);
2806         rmfree(mpt->m_erqsense_map, num_extrqsense_bufs, 1);
2807 
2808         /*
2809          * Clear the pool.
2810          */
2811         bzero(mpt->m_req_sense, mem_size);
2812 
2813         mpt->m_dma_flags |= MPTSAS_REQ_SENSE;
2814         return (DDI_SUCCESS);
2815 }
2816 
2817 static int
2818 mptsas_alloc_reply_frames(mptsas_t *mpt)
2819 {
2820         ddi_dma_attr_t          frame_dma_attrs;
2821         caddr_t                 memp;
2822         ddi_dma_cookie_t        cookie;
2823         size_t                  mem_size;
2824 
2825         /*
2826          * re-alloc when it has already alloced
2827          */
2828         if (mpt->m_dma_flags & MPTSAS_REPLY_FRAME) {
2829                 mptsas_dma_addr_destroy(&mpt->m_dma_reply_frame_hdl,
2830                     &mpt->m_acc_reply_frame_hdl);
2831                 mpt->m_dma_flags &= ~MPTSAS_REPLY_FRAME;
2832         }
2833 
2834         /*
2835          * The size of the reply frame pool is:
2836          *   Number of Reply Frames * Reply Frame Size
2837          */
2838         mem_size = mpt->m_max_replies * mpt->m_reply_frame_size;
2839 
2840         /*
2841          * set the DMA attributes.   System Reply Message Frames must be
2842          * aligned on a 4-byte boundry.  This is the default.
2843          */
2844         frame_dma_attrs = mpt->m_msg_dma_attr;
2845         frame_dma_attrs.dma_attr_sgllen = 1;
2846 
2847         /*
2848          * allocate the reply frame pool
2849          */
2850         if (mptsas_dma_addr_create(mpt, frame_dma_attrs,
2851             &mpt->m_dma_reply_frame_hdl, &mpt->m_acc_reply_frame_hdl, &memp,
2852             mem_size, &cookie) == FALSE) {
2853                 return (DDI_FAILURE);
2854         }
2855 
2856         /*
2857          * Store the reply frame memory address.  This chip uses this
2858          * address to dma to and from the driver's frame.  The second
2859          * address is the address mpt uses to process the frame.
2860          */
2861         mpt->m_reply_frame_dma_addr = cookie.dmac_laddress;
2862         mpt->m_reply_frame = memp;
2863 
2864         /*
2865          * Clear the reply frame pool.
2866          */
2867         bzero(mpt->m_reply_frame, mem_size);
2868 
2869         mpt->m_dma_flags |= MPTSAS_REPLY_FRAME;
2870         return (DDI_SUCCESS);
2871 }
2872 
2873 static int
2874 mptsas_alloc_free_queue(mptsas_t *mpt)
2875 {
2876         ddi_dma_attr_t          frame_dma_attrs;
2877         caddr_t                 memp;
2878         ddi_dma_cookie_t        cookie;
2879         size_t                  mem_size;
2880 
2881         /*
2882          * re-alloc when it has already alloced
2883          */
2884         if (mpt->m_dma_flags & MPTSAS_FREE_QUEUE) {
2885                 mptsas_dma_addr_destroy(&mpt->m_dma_free_queue_hdl,
2886                     &mpt->m_acc_free_queue_hdl);
2887                 mpt->m_dma_flags &= ~MPTSAS_FREE_QUEUE;
2888         }
2889 
2890         /*
2891          * The reply free queue size is:
2892          *   Reply Free Queue Depth * 4
2893          * The "4" is the size of one 32 bit address (low part of 64-bit
2894          *   address)
2895          */
2896         mem_size = mpt->m_free_queue_depth * 4;
2897 
2898         /*
2899          * set the DMA attributes  The Reply Free Queue must be aligned on a
2900          * 16-byte boundry.
2901          */
2902         frame_dma_attrs = mpt->m_msg_dma_attr;
2903         frame_dma_attrs.dma_attr_align = 16;
2904         frame_dma_attrs.dma_attr_sgllen = 1;
2905 
2906         /*
2907          * allocate the reply free queue
2908          */
2909         if (mptsas_dma_addr_create(mpt, frame_dma_attrs,
2910             &mpt->m_dma_free_queue_hdl, &mpt->m_acc_free_queue_hdl, &memp,
2911             mem_size, &cookie) == FALSE) {
2912                 return (DDI_FAILURE);
2913         }
2914 
2915         /*
2916          * Store the reply free queue memory address.  This chip uses this
2917          * address to read from the reply free queue.  The second address
2918          * is the address mpt uses to manage the queue.
2919          */
2920         mpt->m_free_queue_dma_addr = cookie.dmac_laddress;
2921         mpt->m_free_queue = memp;
2922 
2923         /*
2924          * Clear the reply free queue memory.
2925          */
2926         bzero(mpt->m_free_queue, mem_size);
2927 
2928         mpt->m_dma_flags |= MPTSAS_FREE_QUEUE;
2929         return (DDI_SUCCESS);
2930 }
2931 
2932 static void
2933 mptsas_free_post_queue(mptsas_t *mpt)
2934 {
2935         mptsas_reply_pqueue_t   *rpqp;
2936         int                     i;
2937 
2938         if (mpt->m_dma_flags & MPTSAS_POST_QUEUE) {
2939                 mptsas_dma_addr_destroy(&mpt->m_dma_post_queue_hdl,
2940                     &mpt->m_acc_post_queue_hdl);
2941                 rpqp = mpt->m_rep_post_queues;
2942                 for (i = 0; i < mpt->m_post_reply_qcount; i++) {
2943                         mutex_destroy(&rpqp->rpq_mutex);
2944                         rpqp++;
2945                 }
2946                 kmem_free(mpt->m_rep_post_queues,
2947                     sizeof (mptsas_reply_pqueue_t) *
2948                     mpt->m_post_reply_qcount);
2949                 mpt->m_dma_flags &= ~MPTSAS_POST_QUEUE;
2950         }
2951 }
2952 
2953 static int
2954 mptsas_alloc_post_queue(mptsas_t *mpt)
2955 {
2956         ddi_dma_attr_t          frame_dma_attrs;
2957         caddr_t                 memp;
2958         ddi_dma_cookie_t        cookie;
2959         size_t                  mem_size;
2960         mptsas_reply_pqueue_t   *rpqp;
2961         int                     i;
2962 
2963         /*
2964          * re-alloc when it has already alloced
2965          */
2966         mptsas_free_post_queue(mpt);
2967 
2968         /*
2969          * The reply descriptor post queue size is:
2970          *   Reply Descriptor Post Queue Depth * 8
2971          * The "8" is the size of each descriptor (8 bytes or 64 bits).
2972          */
2973         mpt->m_post_reply_qcount = mpt->m_intr_cnt;
2974         mem_size = mpt->m_post_queue_depth * 8 * mpt->m_post_reply_qcount;
2975 
2976         /*
2977          * set the DMA attributes.  The Reply Descriptor Post Queue must be
2978          * aligned on a 16-byte boundry.
2979          */
2980         frame_dma_attrs = mpt->m_msg_dma_attr;
2981         frame_dma_attrs.dma_attr_align = 16;
2982         frame_dma_attrs.dma_attr_sgllen = 1;
2983 
2984         /*
2985          * Allocate the reply post queue(s).
2986          * MPI2.5 introduces a method to allocate multiple queues
2987          * using a redirect table. For now stick to one contiguous
2988          * chunck. This can get as big as 1Mbyte for 16 queues.
2989          * The spec gives no indication that the queue size can be
2990          * reduced if you have many of them.
2991          */
2992         if (mptsas_dma_addr_create(mpt, frame_dma_attrs,
2993             &mpt->m_dma_post_queue_hdl, &mpt->m_acc_post_queue_hdl, &memp,
2994             mem_size, &cookie) == FALSE) {
2995                 return (DDI_FAILURE);
2996         }
2997 
2998         /*
2999          * Store the reply descriptor post queue memory address.  This chip
3000          * uses this address to write to the reply descriptor post queue.  The
3001          * second address is the address mpt uses to manage the queue.
3002          */
3003         mpt->m_post_queue_dma_addr = cookie.dmac_laddress;
3004         mpt->m_post_queue = memp;
3005 
3006         mpt->m_rep_post_queues = kmem_zalloc(sizeof (mptsas_reply_pqueue_t) *
3007             mpt->m_post_reply_qcount, KM_SLEEP);
3008         rpqp = mpt->m_rep_post_queues;
3009         for (i = 0; i < mpt->m_post_reply_qcount; i++) {
3010                 rpqp->rpq_queue = memp;
3011                 mutex_init(&rpqp->rpq_mutex, NULL, MUTEX_DRIVER, NULL);
3012                 rpqp->rpq_dlist.dl_tail = &rpqp->rpq_dlist.dl_q;
3013                 rpqp->rpq_num = (uint8_t)i;
3014                 memp += (mpt->m_post_queue_depth * 8);
3015                 rpqp++;
3016         }
3017 
3018         /*
3019          * Clear the reply post queue memory.
3020          */
3021         bzero(mpt->m_post_queue, mem_size);
3022 
3023         mpt->m_dma_flags |= MPTSAS_POST_QUEUE;
3024         return (DDI_SUCCESS);
3025 }
3026 
3027 static void
3028 mptsas_alloc_reply_args(mptsas_t *mpt)
3029 {
3030         if (mpt->m_replyh_args == NULL) {
3031                 mpt->m_replyh_args = kmem_zalloc(sizeof (m_replyh_arg_t) *
3032                     mpt->m_max_replies, KM_SLEEP);
3033         } else {
3034                 bzero(mpt->m_replyh_args, sizeof (m_replyh_arg_t) *
3035                     mpt->m_max_replies);
3036         }
3037 }
3038 
3039 static int
3040 mptsas_alloc_extra_sgl_frame(mptsas_t *mpt, mptsas_cmd_t *cmd)
3041 {
3042         mptsas_cache_frames_t   *frames = NULL;
3043         if (cmd->cmd_extra_frames == NULL) {
3044                 frames = kmem_cache_alloc(mpt->m_cache_frames, KM_NOSLEEP);
3045                 if (frames == NULL) {
3046                         return (DDI_FAILURE);
3047                 }
3048                 cmd->cmd_extra_frames = frames;
3049         }
3050         return (DDI_SUCCESS);
3051 }
3052 
3053 static void
3054 mptsas_free_extra_sgl_frame(mptsas_t *mpt, mptsas_cmd_t *cmd)
3055 {
3056         if (cmd->cmd_extra_frames) {
3057                 kmem_cache_free(mpt->m_cache_frames,
3058                     (void *)cmd->cmd_extra_frames);
3059                 cmd->cmd_extra_frames = NULL;
3060         }
3061 }
3062 
3063 static void
3064 mptsas_cfg_fini(mptsas_t *mpt)
3065 {
3066         NDBG0(("mptsas_cfg_fini"));
3067         ddi_regs_map_free(&mpt->m_datap);
3068 }
3069 
3070 static void
3071 mptsas_hba_fini(mptsas_t *mpt)
3072 {
3073         NDBG0(("mptsas_hba_fini"));
3074 
3075         /*
3076          * Free up any allocated memory
3077          */
3078         if (mpt->m_dma_flags & MPTSAS_REQ_FRAME) {
3079                 mptsas_dma_addr_destroy(&mpt->m_dma_req_frame_hdl,
3080                     &mpt->m_acc_req_frame_hdl);
3081         }
3082 
3083         if (mpt->m_dma_flags & MPTSAS_REQ_SENSE) {
3084                 rmfreemap(mpt->m_erqsense_map);
3085                 mptsas_dma_addr_destroy(&mpt->m_dma_req_sense_hdl,
3086                     &mpt->m_acc_req_sense_hdl);
3087         }
3088 
3089         if (mpt->m_dma_flags & MPTSAS_REPLY_FRAME) {
3090                 mptsas_dma_addr_destroy(&mpt->m_dma_reply_frame_hdl,
3091                     &mpt->m_acc_reply_frame_hdl);
3092         }
3093 
3094         if (mpt->m_dma_flags & MPTSAS_FREE_QUEUE) {
3095                 mptsas_dma_addr_destroy(&mpt->m_dma_free_queue_hdl,
3096                     &mpt->m_acc_free_queue_hdl);
3097         }
3098 
3099         mptsas_free_post_queue(mpt);
3100 
3101         if (mpt->m_replyh_args != NULL) {
3102                 kmem_free(mpt->m_replyh_args, sizeof (m_replyh_arg_t)
3103                     * mpt->m_max_replies);
3104         }
3105 }
3106 
3107 static int
3108 mptsas_name_child(dev_info_t *lun_dip, char *name, int len)
3109 {
3110         int             lun = 0;
3111         char            *sas_wwn = NULL;
3112         int             phynum = -1;
3113         int             reallen = 0;
3114 
3115         /* Get the target num */
3116         lun = ddi_prop_get_int(DDI_DEV_T_ANY, lun_dip, DDI_PROP_DONTPASS,
3117             LUN_PROP, 0);
3118 
3119         if ((phynum = ddi_prop_get_int(DDI_DEV_T_ANY, lun_dip,
3120             DDI_PROP_DONTPASS, "sata-phy", -1)) != -1) {
3121                 /*
3122                  * Stick in the address of form "pPHY,LUN"
3123                  */
3124                 reallen = snprintf(name, len, "p%x,%x", phynum, lun);
3125         } else if (ddi_prop_lookup_string(DDI_DEV_T_ANY, lun_dip,
3126             DDI_PROP_DONTPASS, SCSI_ADDR_PROP_TARGET_PORT, &sas_wwn)
3127             == DDI_PROP_SUCCESS) {
3128                 /*
3129                  * Stick in the address of the form "wWWN,LUN"
3130                  */
3131                 reallen = snprintf(name, len, "%s,%x", sas_wwn, lun);
3132                 ddi_prop_free(sas_wwn);
3133         } else {
3134                 return (DDI_FAILURE);
3135         }
3136 
3137         ASSERT(reallen < len);
3138         if (reallen >= len) {
3139                 mptsas_log(0, CE_WARN, "!mptsas_get_name: name parameter "
3140                     "length too small, it needs to be %d bytes", reallen + 1);
3141         }
3142         return (DDI_SUCCESS);
3143 }
3144 
3145 /*
3146  * tran_tgt_init(9E) - target device instance initialization
3147  */
3148 static int
3149 mptsas_scsi_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
3150     scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
3151 {
3152 #ifndef __lock_lint
3153         _NOTE(ARGUNUSED(hba_tran))
3154 #endif
3155 
3156         /*
3157          * At this point, the scsi_device structure already exists
3158          * and has been initialized.
3159          *
3160          * Use this function to allocate target-private data structures,
3161          * if needed by this HBA.  Add revised flow-control and queue
3162          * properties for child here, if desired and if you can tell they
3163          * support tagged queueing by now.
3164          */
3165         mptsas_t                *mpt;
3166         int                     lun = sd->sd_address.a_lun;
3167         mdi_pathinfo_t          *pip = NULL;
3168         mptsas_tgt_private_t    *tgt_private = NULL;
3169         mptsas_target_t         *ptgt = NULL;
3170         char                    *psas_wwn = NULL;
3171         mptsas_phymask_t        phymask = 0;
3172         uint64_t                sas_wwn = 0;
3173         mptsas_target_addr_t    addr;
3174         mpt = SDEV2MPT(sd);
3175 
3176         ASSERT(scsi_hba_iport_unit_address(hba_dip) != 0);
3177 
3178         NDBG0(("mptsas_scsi_tgt_init: hbadip=0x%p tgtdip=0x%p lun=%d",
3179             (void *)hba_dip, (void *)tgt_dip, lun));
3180 
3181         if (ndi_dev_is_persistent_node(tgt_dip) == 0) {
3182                 (void) ndi_merge_node(tgt_dip, mptsas_name_child);
3183                 ddi_set_name_addr(tgt_dip, NULL);
3184                 return (DDI_FAILURE);
3185         }
3186         /*
3187          * phymask is 0 means the virtual port for RAID
3188          */
3189         phymask = (mptsas_phymask_t)ddi_prop_get_int(DDI_DEV_T_ANY, hba_dip, 0,
3190             "phymask", 0);
3191         if (mdi_component_is_client(tgt_dip, NULL) == MDI_SUCCESS) {
3192                 if ((pip = (void *)(sd->sd_private)) == NULL) {
3193                         /*
3194                          * Very bad news if this occurs. Somehow scsi_vhci has
3195                          * lost the pathinfo node for this target.
3196                          */
3197                         return (DDI_NOT_WELL_FORMED);
3198                 }
3199 
3200                 if (mdi_prop_lookup_int(pip, LUN_PROP, &lun) !=
3201                     DDI_PROP_SUCCESS) {
3202                         mptsas_log(mpt, CE_WARN, "Get lun property failed\n");
3203                         return (DDI_FAILURE);
3204                 }
3205 
3206                 if (mdi_prop_lookup_string(pip, SCSI_ADDR_PROP_TARGET_PORT,
3207                     &psas_wwn) == MDI_SUCCESS) {
3208                         if (scsi_wwnstr_to_wwn(psas_wwn, &sas_wwn)) {
3209                                 sas_wwn = 0;
3210                         }
3211                         (void) mdi_prop_free(psas_wwn);
3212                 }
3213         } else {
3214                 lun = ddi_prop_get_int(DDI_DEV_T_ANY, tgt_dip,
3215                     DDI_PROP_DONTPASS, LUN_PROP, 0);
3216                 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, tgt_dip,
3217                     DDI_PROP_DONTPASS, SCSI_ADDR_PROP_TARGET_PORT, &psas_wwn) ==
3218                     DDI_PROP_SUCCESS) {
3219                         if (scsi_wwnstr_to_wwn(psas_wwn, &sas_wwn)) {
3220                                 sas_wwn = 0;
3221                         }
3222                         ddi_prop_free(psas_wwn);
3223                 } else {
3224                         sas_wwn = 0;
3225                 }
3226         }
3227 
3228         ASSERT((sas_wwn != 0) || (phymask != 0));
3229         addr.mta_wwn = sas_wwn;
3230         addr.mta_phymask = phymask;
3231         mutex_enter(&mpt->m_mutex);
3232         ptgt = refhash_lookup(mpt->m_targets, &addr);
3233         mutex_exit(&mpt->m_mutex);
3234         if (ptgt == NULL) {
3235                 mptsas_log(mpt, CE_WARN, "!tgt_init: target doesn't exist or "
3236                     "gone already! phymask:%x, saswwn %"PRIx64, phymask,
3237                     sas_wwn);
3238                 return (DDI_FAILURE);
3239         }
3240         if (hba_tran->tran_tgt_private == NULL) {
3241                 tgt_private = kmem_zalloc(sizeof (mptsas_tgt_private_t),
3242                     KM_SLEEP);
3243                 tgt_private->t_lun = lun;
3244                 tgt_private->t_private = ptgt;
3245                 hba_tran->tran_tgt_private = tgt_private;
3246         }
3247 
3248         if (mdi_component_is_client(tgt_dip, NULL) == MDI_SUCCESS) {
3249                 return (DDI_SUCCESS);
3250         }
3251         mutex_enter(&mpt->m_mutex);
3252 
3253         if (ptgt->m_deviceinfo &
3254             (MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
3255             MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
3256                 uchar_t *inq89 = NULL;
3257                 int inq89_len = 0x238;
3258                 int reallen = 0;
3259                 int rval = 0;
3260                 struct sata_id *sid = NULL;
3261                 char model[SATA_ID_MODEL_LEN + 1];
3262                 char fw[SATA_ID_FW_LEN + 1];
3263                 char *vid, *pid;
3264                 int i;
3265 
3266                 mutex_exit(&mpt->m_mutex);
3267                 /*
3268                  * According SCSI/ATA Translation -2 (SAT-2) revision 01a
3269                  * chapter 12.4.2 VPD page 89h includes 512 bytes ATA IDENTIFY
3270                  * DEVICE data or ATA IDENTIFY PACKET DEVICE data.
3271                  */
3272                 inq89 = kmem_zalloc(inq89_len, KM_SLEEP);
3273                 rval = mptsas_inquiry(mpt, ptgt, 0, 0x89,
3274                     inq89, inq89_len, &reallen, 1);
3275 
3276                 if (rval != 0) {
3277                         if (inq89 != NULL) {
3278                                 kmem_free(inq89, inq89_len);
3279                         }
3280 
3281                         mptsas_log(mpt, CE_WARN, "!mptsas request inquiry page "
3282                             "0x89 for SATA target:%x failed!", ptgt->m_devhdl);
3283                         return (DDI_SUCCESS);
3284                 }
3285                 sid = (void *)(&inq89[60]);
3286 
3287                 swab(sid->ai_model, model, SATA_ID_MODEL_LEN);
3288                 swab(sid->ai_fw, fw, SATA_ID_FW_LEN);
3289 
3290                 model[SATA_ID_MODEL_LEN] = 0;
3291                 fw[SATA_ID_FW_LEN] = 0;
3292 
3293                 /*
3294                  * split model into into vid/pid
3295                  */
3296                 for (i = 0, pid = model; i < SATA_ID_MODEL_LEN; i++, pid++)
3297                         if ((*pid == ' ') || (*pid == '\t'))
3298                                 break;
3299                 if (i < SATA_ID_MODEL_LEN) {
3300                         vid = model;
3301                         /*
3302                          * terminate vid, establish pid
3303                          */
3304                         *pid++ = 0;
3305                 } else {
3306                         /*
3307                          * vid will stay "ATA     ", the rule is same
3308                          * as sata framework implementation.
3309                          */
3310                         vid = NULL;
3311                         /*
3312                          * model is all pid
3313                          */
3314                         pid = model;
3315                 }
3316 
3317                 /*
3318                  * override SCSA "inquiry-*" properties
3319                  */
3320                 if (vid)
3321                         (void) scsi_device_prop_update_inqstring(sd,
3322                             INQUIRY_VENDOR_ID, vid, strlen(vid));
3323                 if (pid)
3324                         (void) scsi_device_prop_update_inqstring(sd,
3325                             INQUIRY_PRODUCT_ID, pid, strlen(pid));
3326                 (void) scsi_device_prop_update_inqstring(sd,
3327                     INQUIRY_REVISION_ID, fw, strlen(fw));
3328 
3329                 if (inq89 != NULL) {
3330                         kmem_free(inq89, inq89_len);
3331                 }
3332         } else {
3333                 mutex_exit(&mpt->m_mutex);
3334         }
3335 
3336         return (DDI_SUCCESS);
3337 }
3338 /*
3339  * tran_tgt_free(9E) - target device instance deallocation
3340  */
3341 static void
3342 mptsas_scsi_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
3343     scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
3344 {
3345 #ifndef __lock_lint
3346         _NOTE(ARGUNUSED(hba_dip, tgt_dip, hba_tran, sd))
3347 #endif
3348 
3349         mptsas_tgt_private_t    *tgt_private = hba_tran->tran_tgt_private;
3350 
3351         if (tgt_private != NULL) {
3352                 kmem_free(tgt_private, sizeof (mptsas_tgt_private_t));
3353                 hba_tran->tran_tgt_private = NULL;
3354         }
3355 }
3356 
3357 /*
3358  * scsi_pkt handling
3359  *
3360  * Visible to the external world via the transport structure.
3361  */
3362 
3363 /*
3364  * Notes:
3365  *      - transport the command to the addressed SCSI target/lun device
3366  *      - normal operation is to schedule the command to be transported,
3367  *        and return TRAN_ACCEPT if this is successful.
3368  *      - if NO_INTR, tran_start must poll device for command completion
3369  */
3370 static int
3371 mptsas_scsi_start(struct scsi_address *ap, struct scsi_pkt *pkt)
3372 {
3373 #ifndef __lock_lint
3374         _NOTE(ARGUNUSED(ap))
3375 #endif
3376         mptsas_t        *mpt = PKT2MPT(pkt);
3377         mptsas_cmd_t    *cmd = PKT2CMD(pkt);
3378         int             rval, start;
3379         uint8_t         pref;
3380         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
3381         mptsas_tx_waitqueue_t *txwq;
3382 
3383         NDBG1(("mptsas_scsi_start: pkt=0x%p", (void *)pkt));
3384         ASSERT(ptgt);
3385         if (ptgt == NULL)
3386                 return (TRAN_FATAL_ERROR);
3387 
3388         /*
3389          * prepare the pkt before taking mutex.
3390          */
3391         rval = mptsas_prepare_pkt(cmd);
3392         if (rval != TRAN_ACCEPT) {
3393                 return (rval);
3394         }
3395 
3396         /*
3397          * Send the command to target/lun, however your HBA requires it.
3398          * If busy, return TRAN_BUSY; if there's some other formatting error
3399          * in the packet, return TRAN_BADPKT; otherwise, fall through to the
3400          * return of TRAN_ACCEPT.
3401          *
3402          * Remember that access to shared resources, including the mptsas_t
3403          * data structure and the HBA hardware registers, must be protected
3404          * with mutexes, here and everywhere.
3405          *
3406          * Also remember that at interrupt time, you'll get an argument
3407          * to the interrupt handler which is a pointer to your mptsas_t
3408          * structure; you'll have to remember which commands are outstanding
3409          * and which scsi_pkt is the currently-running command so the
3410          * interrupt handler can refer to the pkt to set completion
3411          * status, call the target driver back through pkt_comp, etc.
3412          *
3413          * If the instance lock is held by other thread, don't spin to wait
3414          * for it. Instead, queue the cmd and next time when the instance lock
3415          * is not held, accept all the queued cmd. A extra tx_waitq is
3416          * introduced to protect the queue.
3417          *
3418          * The polled cmd will not be queud and accepted as usual.
3419          *
3420          * Under the tx_waitq mutex, record whether a thread is draining
3421          * the tx_waitq.  An IO requesting thread that finds the instance
3422          * mutex contended appends to the tx_waitq and while holding the
3423          * tx_wait mutex, if the draining flag is not set, sets it and then
3424          * proceeds to spin for the instance mutex. This scheme ensures that
3425          * the last cmd in a burst be processed.
3426          *
3427          * we enable this feature only when the helper threads are enabled,
3428          * at which we think the loads are heavy.
3429          *
3430          * per instance, per queue mutex m_tx_waitq[i].txwq_mutex is
3431          * introduced to protect the txwq_qtail, txwq_cmdq, txwq_len
3432          */
3433 
3434         if (mpt->m_txwq_enabled == TRUE) {
3435                 int gotmtx = 0;
3436 
3437                 if (mpt->m_txwq_allow_q_jumping) {
3438                         gotmtx = mutex_tryenter(&mpt->m_mutex);
3439                 }
3440                 if (gotmtx == 0) {
3441                         /* We didn't get the mutex or didn't try */
3442                         if (cmd->cmd_pkt_flags & FLAG_NOINTR) {
3443                                 mutex_enter(&mpt->m_mutex);
3444                                 /* Polled commands queue jump */
3445                                 mptsas_accept_tx_waitqs(mpt);
3446                         } else {
3447                                 rval = mptsas_check_targ_intxtion(
3448                                     cmd->cmd_tgt_addr,
3449                                     cmd->cmd_pkt_flags);
3450                                 if (rval != TRAN_ACCEPT) {
3451                                         return (rval);
3452                                 }
3453 
3454                                 cmd->cmd_flags |= CFLAG_TXQ;
3455                                 pref = mpt->m_pref_tx_waitq;
3456                                 txwq = &mpt->m_tx_waitq[pref];
3457 
3458                                 if (mutex_tryenter(&txwq->txwq_mutex) == 0) {
3459                                         txwq = &mpt->m_tx_waitq[pref^1];
3460                                         mutex_enter(&txwq->txwq_mutex);
3461                                 } else {
3462                                         pref ^= 1;
3463                                         mpt->m_pref_tx_waitq = pref;
3464                                 }
3465 
3466                                 *txwq->txwq_qtail = cmd;
3467                                 txwq->txwq_qtail = &cmd->cmd_linkp;
3468                                 txwq->txwq_len++;
3469                                 if (!txwq->txwq_draining) {
3470                                         cv_signal(&txwq->txwq_cv);
3471                                 }
3472                                 mutex_exit(&txwq->txwq_mutex);
3473                                 return (rval);
3474                         }
3475                 }
3476         } else {
3477                 mutex_enter(&mpt->m_mutex);
3478         }
3479         rval = mptsas_check_targ_intxtion(cmd->cmd_tgt_addr,
3480             cmd->cmd_pkt_flags);
3481         if (rval != TRAN_ACCEPT) {
3482                 mutex_exit(&mpt->m_mutex);
3483                 return (rval);
3484         }
3485 
3486         start = mptsas_accept_pkt(mpt, cmd, &rval);
3487         mutex_exit(&mpt->m_mutex);
3488         if (start) {
3489                 (void) mptsas_start_cmd(mpt, cmd);
3490         }
3491 
3492         return (rval);
3493 }
3494 
3495 static int
3496 mptsas_check_targ_intxtion(mptsas_target_t *ptgt, int cmd_pkt_flags)
3497 {
3498         /*
3499          * ptgt->m_dr_flag is a variable that is only ever changed by
3500          * direct write under the main m_mutex.
3501          * It doesn't need a mutex hold to protect this read.
3502          */
3503 
3504         if (ptgt->m_dr_flag == MPTSAS_DR_INTRANSITION) {
3505                 if (cmd_pkt_flags & FLAG_NOQUEUE) {
3506                         /*
3507                          * The command should be allowed to retry by returning
3508                          * TRAN_BUSY to stall the I/O's which come from
3509                          * scsi_vhci since the device/path is in unstable state
3510                          * now.
3511                          */
3512                         return (TRAN_BUSY);
3513                 } else {
3514                         /*
3515                          * The device is offline, just fail the command by
3516                          * return TRAN_FATAL_ERROR.
3517                          */
3518                         return (TRAN_FATAL_ERROR);
3519                 }
3520         }
3521         return (TRAN_ACCEPT);
3522 }
3523 
3524 /*
3525  * Note that this function has a side effect of releasing the
3526  * per target mutex.
3527  */
3528 static void
3529 mptsas_offline_target_direct(mptsas_t *mpt, mptsas_target_t *ptgt)
3530 {
3531         char                            phy_mask_name[MPTSAS_MAX_PHYS];
3532         mptsas_phymask_t                phymask = ptgt->m_addr.mta_phymask;
3533         dev_info_t                      *parent;
3534 
3535         ASSERT(mutex_owned(&mpt->m_mutex));
3536 
3537         ptgt->m_dr_flag = MPTSAS_DR_INTRANSITION;
3538         bzero(phy_mask_name, MPTSAS_MAX_PHYS);
3539         (void) sprintf(phy_mask_name, "%x", phymask);
3540         parent = scsi_hba_iport_find(mpt->m_dip, phy_mask_name);
3541 
3542         if (parent != NULL) {
3543                 mptsas_offline_target(mpt, ptgt,
3544                     ptgt->m_deviceinfo & DEVINFO_DIRECT_ATTACHED ?
3545                     MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE :
3546                     MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE,
3547                     parent);
3548         } else {
3549                 mptsas_log(mpt, CE_WARN, "Failed to find an "
3550                     "iport for \"%s\", should not happen!",
3551                     phy_mask_name);
3552         }
3553 }
3554 
3555 /*
3556  * In order to be efficient with the m_mutex (which can be dropped before
3557  * calling mptsas_start_cmd()) indicate if start_cmd should be called via the
3558  * returned value (FALSE or TRUE). Caller is then responsible for doing the
3559  * right thing with the m_mutex.
3560  */
3561 static int
3562 mptsas_accept_pkt(mptsas_t *mpt, mptsas_cmd_t *cmd, int *tran_rval)
3563 {
3564         int             rval = TRAN_ACCEPT;
3565         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
3566 
3567         NDBG1(("mptsas_accept_pkt: cmd=0x%p", (void *)cmd));
3568 
3569         ASSERT(mutex_owned(&mpt->m_mutex));
3570 
3571         if ((cmd->cmd_flags & CFLAG_PREPARED) == 0) {
3572                 rval = mptsas_prepare_pkt(cmd);
3573                 if (rval != TRAN_ACCEPT) {
3574                         cmd->cmd_flags &= ~CFLAG_TRANFLAG;
3575                         goto set_tranrval;
3576                 }
3577         }
3578 
3579         /*
3580          * If the command came from the tx wait q it may have slipped
3581          * by the check for dr_flag before being added to the queue.
3582          * Fail here with abort status.
3583          */
3584         if (cmd->cmd_flags & CFLAG_TXQ) {
3585                 rval = mptsas_check_targ_intxtion(cmd->cmd_tgt_addr,
3586                     cmd->cmd_pkt_flags);
3587                 if (rval != TRAN_ACCEPT) {
3588                         mptsas_set_pkt_reason(mpt, cmd, CMD_ABORTED,
3589                             STAT_ABORTED);
3590                         mptsas_doneq_add(mpt, cmd);
3591                         mptsas_doneq_empty(mpt);
3592                         goto set_tranrval;
3593                 }
3594         }
3595         /*
3596          * If HBA is being reset, the DevHandles are being re-initialized,
3597          * which means that they could be invalid even if the target is still
3598          * attached.  Check if being reset and if DevHandle is being
3599          * re-initialized.  If this is the case, return BUSY so the I/O can be
3600          * retried later.
3601          */
3602         if ((ptgt->m_devhdl == MPTSAS_INVALID_DEVHDL) && mpt->m_in_reset) {
3603                 mptsas_set_pkt_reason(mpt, cmd, CMD_RESET, STAT_BUS_RESET);
3604                 if (cmd->cmd_flags & CFLAG_TXQ) {
3605                         mptsas_doneq_add(mpt, cmd);
3606                         mptsas_doneq_empty(mpt);
3607                 } else {
3608                         rval = TRAN_BUSY;
3609                 }
3610                 goto set_tranrval;
3611         }
3612 
3613         mutex_enter(&ptgt->m_t_mutex);
3614         /*
3615          * reset the throttle if we were draining
3616          */
3617         if ((ptgt->m_t_ncmds == 0) &&
3618             (ptgt->m_t_throttle == DRAIN_THROTTLE)) {
3619                 NDBG23(("reset throttle"));
3620                 ASSERT(ptgt->m_reset_delay == 0);
3621                 mptsas_set_throttle(mpt, ptgt, MAX_THROTTLE);
3622         }
3623 
3624         /*
3625          * If device handle has already been invalidated, just
3626          * fail the command. In theory, for a command from scsi_vhci
3627          * client it's impossible to receive a command with an invalid
3628          * devhdl since devhdl is set after path offline, target
3629          * driver is not supposed to select an offlined path.
3630          */
3631         if (ptgt->m_devhdl == MPTSAS_INVALID_DEVHDL) {
3632                 NDBG3(("rejecting command, it might because invalid devhdl "
3633                     "request."));
3634                 mutex_exit(&ptgt->m_t_mutex);
3635                 mptsas_set_pkt_reason(mpt, cmd, CMD_DEV_GONE, STAT_TERMINATED);
3636                 if (cmd->cmd_flags & CFLAG_TXQ) {
3637                         mptsas_doneq_add(mpt, cmd);
3638                         mptsas_doneq_empty(mpt);
3639                 } else {
3640                         rval = TRAN_FATAL_ERROR;
3641                 }
3642                 goto set_tranrval;
3643         }
3644         /*
3645          * The first case is the normal case.  mpt gets a command from the
3646          * target driver and starts it.
3647          * Since SMID 0 is reserved and the TM slot is reserved, the actual max
3648          * commands is m_max_requests - 2.
3649          */
3650         if ((mpt->m_ncmds <= (mpt->m_max_requests - 2)) &&
3651             (ptgt->m_t_throttle > HOLD_THROTTLE) &&
3652             (ptgt->m_t_ncmds < ptgt->m_t_throttle) &&
3653             (ptgt->m_reset_delay == 0) && (mpt->m_polled_intr == 0) &&
3654             (ptgt->m_t_nwait == 0) &&
3655             ((cmd->cmd_pkt_flags & FLAG_NOINTR) == 0)) {
3656                 ASSERT((cmd->cmd_flags & CFLAG_CMDIOC) == 0);
3657                 if (mptsas_save_cmd_to_slot(mpt, cmd) == TRUE) {
3658                         ptgt->m_t_ncmds++;
3659                         mutex_exit(&ptgt->m_t_mutex);
3660                         cmd->cmd_active_expiration = 0;
3661                         *tran_rval = rval;
3662                         return (TRUE);
3663                 } else {
3664                         mutex_exit(&ptgt->m_t_mutex);
3665                         mptsas_waitq_add(mpt, cmd);
3666                 }
3667         } else {
3668                 mutex_exit(&ptgt->m_t_mutex);
3669                 /*
3670                  * Add this pkt to the work queue
3671                  */
3672                 mptsas_waitq_add(mpt, cmd);
3673 
3674                 if (cmd->cmd_pkt_flags & FLAG_NOINTR) {
3675                         (void) mptsas_poll(mpt, cmd, MPTSAS_POLL_TIME);
3676 
3677                         /*
3678                          * Only flush the doneq if this is not a TM
3679                          * cmd.  For TM cmds the flushing of the
3680                          * doneq will be done in those routines.
3681                          */
3682                         if ((cmd->cmd_flags & CFLAG_TM_CMD) == 0) {
3683                                 mptsas_doneq_empty(mpt);
3684                         }
3685                 }
3686         }
3687 set_tranrval:
3688         *tran_rval = rval;
3689         return (FALSE);
3690 }
3691 
3692 static void
3693 mptsas_retry_pkt(mptsas_t *mpt, mptsas_cmd_t *cmd)
3694 {
3695         int             rval;
3696 
3697         cmd->cmd_pkt_flags |= FLAG_HEAD;
3698         cmd->cmd_flags |= CFLAG_RETRY;
3699         cmd->cmd_flags &= ~CFLAG_TXQ;
3700         if (mptsas_accept_pkt(mpt, cmd, &rval)) {
3701                 (void) mptsas_start_cmd(mpt, cmd);
3702         }
3703 
3704         /*
3705          * If there was a problem clear the retry flag so that the
3706          * command will be completed with error rather than get lost!
3707          */
3708         if (rval != TRAN_ACCEPT)
3709                 cmd->cmd_flags &= ~CFLAG_RETRY;
3710 }
3711 
3712 static int
3713 mptsas_save_cmd_to_slot(mptsas_t *mpt, mptsas_cmd_t *cmd)
3714 {
3715         mptsas_slots_t *slots = mpt->m_active;
3716         uint_t slot, start_rotor, rotor, n_normal;
3717 
3718         /*
3719          * Account for reserved TM request slot and reserved SMID of 0.
3720          */
3721         ASSERT(slots->m_n_normal == (mpt->m_max_requests - 2));
3722 
3723         /*
3724          * Find the next available slot, beginning at m_rotor.  If no slot is
3725          * available, we'll return FALSE to indicate that.  This mechanism
3726          * considers only the normal slots, not the reserved slot 0 nor the
3727          * task management slot m_n_normal + 1.  The rotor is left to point to
3728          * the normal slot after the one we select, unless we select the last
3729          * normal slot in which case it returns to slot 1.
3730          */
3731         start_rotor = rotor = slots->m_rotor;
3732         n_normal = slots->m_n_normal;
3733         do {
3734                 slot = rotor++;
3735                 if (rotor > n_normal)
3736                         rotor = 1;
3737 
3738                 if (rotor == start_rotor)
3739                         break;
3740         } while (slots->m_slot[slot] != NULL);
3741         slots->m_rotor = rotor;
3742 
3743         if (slots->m_slot[slot] != NULL)
3744                 return (FALSE);
3745 
3746         ASSERT(slot != 0 && slot <= slots->m_n_normal);
3747 
3748         cmd->cmd_slot = slot;
3749         slots->m_slot[slot] = cmd;
3750         atomic_inc_32(&mpt->m_ncmds);
3751 
3752         /*
3753          * Distribute the commands amongst the reply queues (Interrupt vectors).
3754          * Stick to 0 for polled.
3755          */
3756         if (!(cmd->cmd_pkt_flags & FLAG_NOINTR) &&
3757             !(cmd->cmd_flags & (CFLAG_PASSTHRU|CFLAG_CONFIG|CFLAG_FW_DIAG)) &&
3758             (mpt->m_post_reply_qcount > 1)) {
3759                 cmd->cmd_rpqidx = slot % mpt->m_post_reply_qcount;
3760         }
3761         atomic_inc_32(&mpt->m_rep_post_queues[cmd->cmd_rpqidx].rpq_ncmds);
3762         return (TRUE);
3763 }
3764 
3765 int
3766 mptsas_save_cmd(mptsas_t *mpt, mptsas_cmd_t *cmd)
3767 {
3768         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
3769 
3770         ASSERT(MUTEX_HELD(&mpt->m_mutex));
3771 
3772         if (!mptsas_save_cmd_to_slot(mpt, cmd)) {
3773                 return (FALSE);
3774         }
3775 
3776         /*
3777          * only increment per target ncmds if this is not a
3778          * command that has no target associated with it (i.e. a
3779          * event acknoledgement)
3780          */
3781         if ((cmd->cmd_flags & CFLAG_CMDIOC) == 0) {
3782                 /*
3783                  * Expiration time is set in mptsas_start_cmd
3784                  */
3785                 mutex_enter(&ptgt->m_t_mutex);
3786                 ptgt->m_t_ncmds++;
3787                 mutex_exit(&ptgt->m_t_mutex);
3788                 cmd->cmd_active_expiration = 0;
3789         } else {
3790                 /*
3791                  * Initialize expiration time for passthrough commands,
3792                  */
3793                 cmd->cmd_active_expiration = gethrtime() +
3794                     (hrtime_t)cmd->cmd_pkt->pkt_time * NANOSEC;
3795         }
3796         return (TRUE);
3797 }
3798 
3799 /*
3800  * prepare the pkt:
3801  * the pkt may have been resubmitted or just reused so
3802  * initialize some fields and do some checks.
3803  */
3804 static int
3805 mptsas_prepare_pkt(mptsas_cmd_t *cmd)
3806 {
3807         struct scsi_pkt *pkt = CMD2PKT(cmd);
3808 
3809         NDBG1(("mptsas_prepare_pkt: cmd=0x%p", (void *)cmd));
3810 
3811         /*
3812          * Reinitialize some fields that need it; the packet may
3813          * have been resubmitted
3814          */
3815         pkt->pkt_reason = CMD_CMPLT;
3816         pkt->pkt_state = 0;
3817         pkt->pkt_statistics = 0;
3818         pkt->pkt_resid = 0;
3819         cmd->cmd_age = 0;
3820         cmd->cmd_pkt_flags = pkt->pkt_flags;
3821 
3822         /*
3823          * zero status byte.
3824          */
3825         *(pkt->pkt_scbp) = 0;
3826 
3827         if (cmd->cmd_flags & CFLAG_DMAVALID) {
3828                 pkt->pkt_resid = cmd->cmd_dmacount;
3829 
3830                 /*
3831                  * consistent packets need to be sync'ed first
3832                  * (only for data going out)
3833                  */
3834                 if ((cmd->cmd_flags & CFLAG_CMDIOPB) &&
3835                     (cmd->cmd_flags & CFLAG_DMASEND)) {
3836                         (void) ddi_dma_sync(cmd->cmd_dmahandle, 0, 0,
3837                             DDI_DMA_SYNC_FORDEV);
3838                 }
3839         }
3840 
3841         cmd->cmd_flags =
3842             (cmd->cmd_flags & ~(CFLAG_TRANFLAG)) |
3843             CFLAG_PREPARED | CFLAG_IN_TRANSPORT;
3844 
3845         return (TRAN_ACCEPT);
3846 }
3847 
3848 /*
3849  * tran_init_pkt(9E) - allocate scsi_pkt(9S) for command
3850  *
3851  * One of three possibilities:
3852  *      - allocate scsi_pkt
3853  *      - allocate scsi_pkt and DMA resources
3854  *      - allocate DMA resources to an already-allocated pkt
3855  */
3856 static struct scsi_pkt *
3857 mptsas_scsi_init_pkt(struct scsi_address *ap, struct scsi_pkt *pkt,
3858     struct buf *bp, int cmdlen, int statuslen, int tgtlen, int flags,
3859     int (*callback)(), caddr_t arg)
3860 {
3861         mptsas_cmd_t            *cmd, *new_cmd;
3862         mptsas_t                *mpt = ADDR2MPT(ap);
3863         int                     failure = 1;
3864         uint_t                  oldcookiec;
3865         mptsas_target_t         *ptgt = NULL;
3866         int                     rval;
3867         mptsas_tgt_private_t    *tgt_private;
3868         int                     kf;
3869 
3870         kf = (callback == SLEEP_FUNC)? KM_SLEEP: KM_NOSLEEP;
3871 
3872         tgt_private = (mptsas_tgt_private_t *)ap->a_hba_tran->
3873             tran_tgt_private;
3874         ASSERT(tgt_private != NULL);
3875         if (tgt_private == NULL) {
3876                 return (NULL);
3877         }
3878         ptgt = tgt_private->t_private;
3879         ASSERT(ptgt != NULL);
3880         if (ptgt == NULL)
3881                 return (NULL);
3882         ap->a_target = ptgt->m_devhdl;
3883         ap->a_lun = tgt_private->t_lun;
3884 
3885         ASSERT(callback == NULL_FUNC || callback == SLEEP_FUNC);
3886 #ifdef MPTSAS_TEST_EXTRN_ALLOC
3887         statuslen *= 100; tgtlen *= 4;
3888 #endif
3889         NDBG3(("mptsas_scsi_init_pkt:\n"
3890             "\ttgt=%d in=0x%p bp=0x%p clen=%d slen=%d tlen=%d flags=%x",
3891             ap->a_target, (void *)pkt, (void *)bp,
3892             cmdlen, statuslen, tgtlen, flags));
3893 
3894         /*
3895          * Allocate the new packet.
3896          */
3897         if (pkt == NULL) {
3898                 ddi_dma_handle_t        save_dma_handle;
3899 
3900                 cmd = kmem_cache_alloc(mpt->m_kmem_cache, kf);
3901 
3902                 if (cmd) {
3903                         save_dma_handle = cmd->cmd_dmahandle;
3904                         bzero(cmd, sizeof (*cmd) + scsi_pkt_size());
3905                         cmd->cmd_dmahandle = save_dma_handle;
3906 
3907                         pkt = (void *)((uchar_t *)cmd +
3908                             sizeof (struct mptsas_cmd));
3909                         pkt->pkt_ha_private = (opaque_t)cmd;
3910                         pkt->pkt_address = *ap;
3911                         pkt->pkt_private = (opaque_t)cmd->cmd_pkt_private;
3912                         pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb;
3913                         pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb;
3914                         cmd->cmd_pkt = (struct scsi_pkt *)pkt;
3915                         cmd->cmd_cdblen = (uchar_t)cmdlen;
3916                         cmd->cmd_scblen = statuslen;
3917                         cmd->cmd_rqslen = SENSE_LENGTH;
3918                         cmd->cmd_tgt_addr = ptgt;
3919                         failure = 0;
3920                 }
3921 
3922                 if (failure || (cmdlen > sizeof (cmd->cmd_cdb)) ||
3923                     (tgtlen > PKT_PRIV_LEN) ||
3924                     (statuslen > EXTCMDS_STATUS_SIZE)) {
3925                         if (failure == 0) {
3926                                 /*
3927                                  * if extern alloc fails, all will be
3928                                  * deallocated, including cmd
3929                                  */
3930                                 failure = mptsas_pkt_alloc_extern(mpt, cmd,
3931                                     cmdlen, tgtlen, statuslen, kf);
3932                         }
3933                         if (failure) {
3934                                 /*
3935                                  * if extern allocation fails, it will
3936                                  * deallocate the new pkt as well
3937                                  */
3938                                 return (NULL);
3939                         }
3940                 }
3941                 new_cmd = cmd;
3942 
3943         } else {
3944                 cmd = PKT2CMD(pkt);
3945                 new_cmd = NULL;
3946         }
3947 
3948 
3949         /* grab cmd->cmd_cookiec here as oldcookiec */
3950 
3951         oldcookiec = cmd->cmd_cookiec;
3952 
3953         /*
3954          * If the dma was broken up into PARTIAL transfers cmd_nwin will be
3955          * greater than 0 and we'll need to grab the next dma window
3956          */
3957         /*
3958          * SLM-not doing extra command frame right now; may add later
3959          */
3960 
3961         if (cmd->cmd_nwin > 0) {
3962 
3963                 /*
3964                  * Make sure we havn't gone past the the total number
3965                  * of windows
3966                  */
3967                 if (++cmd->cmd_winindex >= cmd->cmd_nwin) {
3968                         return (NULL);
3969                 }
3970                 if (ddi_dma_getwin(cmd->cmd_dmahandle, cmd->cmd_winindex,
3971                     &cmd->cmd_dma_offset, &cmd->cmd_dma_len,
3972                     &cmd->cmd_cookie, &cmd->cmd_cookiec) == DDI_FAILURE) {
3973                         return (NULL);
3974                 }
3975                 goto get_dma_cookies;
3976         }
3977 
3978 
3979         if (flags & PKT_XARQ) {
3980                 cmd->cmd_flags |= CFLAG_XARQ;
3981         }
3982 
3983         /*
3984          * DMA resource allocation.  This version assumes your
3985          * HBA has some sort of bus-mastering or onboard DMA capability, with a
3986          * scatter-gather list of length MPTSAS_MAX_DMA_SEGS, as given in the
3987          * ddi_dma_attr_t structure and passed to scsi_impl_dmaget.
3988          */
3989         if (bp && (bp->b_bcount != 0) &&
3990             (cmd->cmd_flags & CFLAG_DMAVALID) == 0) {
3991 
3992                 int     cnt, dma_flags;
3993                 mptti_t *dmap;          /* ptr to the S/G list */
3994 
3995                 /*
3996                  * Set up DMA memory and position to the next DMA segment.
3997                  */
3998                 ASSERT(cmd->cmd_dmahandle != NULL);
3999 
4000                 if (bp->b_flags & B_READ) {
4001                         dma_flags = DDI_DMA_READ;
4002                         cmd->cmd_flags &= ~CFLAG_DMASEND;
4003                 } else {
4004                         dma_flags = DDI_DMA_WRITE;
4005                         cmd->cmd_flags |= CFLAG_DMASEND;
4006                 }
4007                 if (flags & PKT_CONSISTENT) {
4008                         cmd->cmd_flags |= CFLAG_CMDIOPB;
4009                         dma_flags |= DDI_DMA_CONSISTENT;
4010                 }
4011 
4012                 if (flags & PKT_DMA_PARTIAL) {
4013                         dma_flags |= DDI_DMA_PARTIAL;
4014                 }
4015 
4016                 /*
4017                  * workaround for byte hole issue on psycho and
4018                  * schizo pre 2.1
4019                  */
4020                 if ((bp->b_flags & B_READ) && ((bp->b_flags &
4021                     (B_PAGEIO|B_REMAPPED)) != B_PAGEIO) &&
4022                     ((uintptr_t)bp->b_un.b_addr & 0x7)) {
4023                         dma_flags |= DDI_DMA_CONSISTENT;
4024                 }
4025 
4026                 rval = ddi_dma_buf_bind_handle(cmd->cmd_dmahandle, bp,
4027                     dma_flags, callback, arg,
4028                     &cmd->cmd_cookie, &cmd->cmd_cookiec);
4029                 if (rval == DDI_DMA_PARTIAL_MAP) {
4030                         (void) ddi_dma_numwin(cmd->cmd_dmahandle,
4031                             &cmd->cmd_nwin);
4032                         cmd->cmd_winindex = 0;
4033                         (void) ddi_dma_getwin(cmd->cmd_dmahandle,
4034                             cmd->cmd_winindex, &cmd->cmd_dma_offset,
4035                             &cmd->cmd_dma_len, &cmd->cmd_cookie,
4036                             &cmd->cmd_cookiec);
4037                 } else if (rval && (rval != DDI_DMA_MAPPED)) {
4038                         switch (rval) {
4039                         case DDI_DMA_NORESOURCES:
4040                                 bioerror(bp, 0);
4041                                 break;
4042                         case DDI_DMA_BADATTR:
4043                         case DDI_DMA_NOMAPPING:
4044                                 bioerror(bp, EFAULT);
4045                                 break;
4046                         case DDI_DMA_TOOBIG:
4047                         default:
4048                                 bioerror(bp, EINVAL);
4049                                 break;
4050                         }
4051                         cmd->cmd_flags &= ~CFLAG_DMAVALID;
4052                         if (new_cmd) {
4053                                 mptsas_scsi_destroy_pkt(ap, pkt);
4054                         }
4055                         return ((struct scsi_pkt *)NULL);
4056                 }
4057 
4058 get_dma_cookies:
4059                 cmd->cmd_flags |= CFLAG_DMAVALID;
4060                 ASSERT(cmd->cmd_cookiec > 0);
4061 
4062                 if (cmd->cmd_cookiec > MPTSAS_MAX_CMD_SEGS) {
4063                         mptsas_log(mpt, CE_NOTE, "large cookiec received %d\n",
4064                             cmd->cmd_cookiec);
4065                         bioerror(bp, EINVAL);
4066                         if (new_cmd) {
4067                                 mptsas_scsi_destroy_pkt(ap, pkt);
4068                         }
4069                         return ((struct scsi_pkt *)NULL);
4070                 }
4071 
4072                 /*
4073                  * Allocate extra SGL buffer if needed.
4074                  */
4075                 if ((cmd->cmd_cookiec > MPTSAS_MAX_FRAME_SGES64(mpt)) &&
4076                     (cmd->cmd_extra_frames == NULL)) {
4077                         if (mptsas_alloc_extra_sgl_frame(mpt, cmd) ==
4078                             DDI_FAILURE) {
4079                                 mptsas_log(mpt, CE_WARN, "MPT SGL mem alloc "
4080                                     "failed");
4081                                 bioerror(bp, ENOMEM);
4082                                 if (new_cmd) {
4083                                         mptsas_scsi_destroy_pkt(ap, pkt);
4084                                 }
4085                                 return ((struct scsi_pkt *)NULL);
4086                         }
4087                 }
4088 
4089                 /*
4090                  * Always use scatter-gather transfer
4091                  * Use the loop below to store physical addresses of
4092                  * DMA segments, from the DMA cookies, into your HBA's
4093                  * scatter-gather list.
4094                  * We need to ensure we have enough kmem alloc'd
4095                  * for the sg entries since we are no longer using an
4096                  * array inside mptsas_cmd_t.
4097                  *
4098                  * We check cmd->cmd_cookiec against oldcookiec so
4099                  * the scatter-gather list is correctly allocated
4100                  */
4101 
4102                 if (oldcookiec != cmd->cmd_cookiec) {
4103                         if (cmd->cmd_sg != (mptti_t *)NULL) {
4104                                 kmem_free(cmd->cmd_sg, sizeof (mptti_t) *
4105                                     oldcookiec);
4106                                 cmd->cmd_sg = NULL;
4107                         }
4108                 }
4109 
4110                 if (cmd->cmd_sg == (mptti_t *)NULL) {
4111                         cmd->cmd_sg = kmem_alloc((size_t)(sizeof (mptti_t)*
4112                             cmd->cmd_cookiec), kf);
4113 
4114                         if (cmd->cmd_sg == (mptti_t *)NULL) {
4115                                 mptsas_log(mpt, CE_WARN,
4116                                     "unable to kmem_alloc enough memory "
4117                                     "for scatter/gather list");
4118                 /*
4119                  * if we have an ENOMEM condition we need to behave
4120                  * the same way as the rest of this routine
4121                  */
4122 
4123                                 bioerror(bp, ENOMEM);
4124                                 if (new_cmd) {
4125                                         mptsas_scsi_destroy_pkt(ap, pkt);
4126                                 }
4127                                 return ((struct scsi_pkt *)NULL);
4128                         }
4129                 }
4130 
4131                 dmap = cmd->cmd_sg;
4132 
4133                 ASSERT(cmd->cmd_cookie.dmac_size != 0);
4134 
4135                 /*
4136                  * store the first segment into the S/G list
4137                  */
4138                 dmap->count = cmd->cmd_cookie.dmac_size;
4139                 dmap->addr.address64.Low = (uint32_t)
4140                     (cmd->cmd_cookie.dmac_laddress & 0xffffffffull);
4141                 dmap->addr.address64.High = (uint32_t)
4142                     (cmd->cmd_cookie.dmac_laddress >> 32);
4143 
4144                 /*
4145                  * dmacount counts the size of the dma for this window
4146                  * (if partial dma is being used).  totaldmacount
4147                  * keeps track of the total amount of dma we have
4148                  * transferred for all the windows (needed to calculate
4149                  * the resid value below).
4150                  */
4151                 cmd->cmd_dmacount = cmd->cmd_cookie.dmac_size;
4152                 cmd->cmd_totaldmacount += cmd->cmd_cookie.dmac_size;
4153 
4154                 /*
4155                  * We already stored the first DMA scatter gather segment,
4156                  * start at 1 if we need to store more.
4157                  */
4158                 for (cnt = 1; cnt < cmd->cmd_cookiec; cnt++) {
4159                         /*
4160                          * Get next DMA cookie
4161                          */
4162                         ddi_dma_nextcookie(cmd->cmd_dmahandle,
4163                             &cmd->cmd_cookie);
4164                         dmap++;
4165 
4166                         cmd->cmd_dmacount += cmd->cmd_cookie.dmac_size;
4167                         cmd->cmd_totaldmacount += cmd->cmd_cookie.dmac_size;
4168 
4169                         /*
4170                          * store the segment parms into the S/G list
4171                          */
4172                         dmap->count = cmd->cmd_cookie.dmac_size;
4173                         dmap->addr.address64.Low = (uint32_t)
4174                             (cmd->cmd_cookie.dmac_laddress & 0xffffffffull);
4175                         dmap->addr.address64.High = (uint32_t)
4176                             (cmd->cmd_cookie.dmac_laddress >> 32);
4177                 }
4178 
4179                 /*
4180                  * If this was partially allocated we set the resid
4181                  * the amount of data NOT transferred in this window
4182                  * If there is only one window, the resid will be 0
4183                  */
4184                 pkt->pkt_resid = (bp->b_bcount - cmd->cmd_totaldmacount);
4185                 NDBG3(("mptsas_scsi_init_pkt: cmd_dmacount=%d.",
4186                     cmd->cmd_dmacount));
4187         }
4188         return (pkt);
4189 }
4190 
4191 /*
4192  * tran_destroy_pkt(9E) - scsi_pkt(9s) deallocation
4193  *
4194  * Notes:
4195  *      - also frees DMA resources if allocated
4196  *      - implicit DMA synchonization
4197  */
4198 static void
4199 mptsas_scsi_destroy_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
4200 {
4201         mptsas_cmd_t    *cmd = PKT2CMD(pkt);
4202         mptsas_t        *mpt = ADDR2MPT(ap);
4203 
4204         NDBG3(("mptsas_scsi_destroy_pkt: target=%d pkt=0x%p",
4205             ap->a_target, (void *)pkt));
4206 
4207         if (cmd->cmd_flags & CFLAG_DMAVALID) {
4208                 (void) ddi_dma_unbind_handle(cmd->cmd_dmahandle);
4209                 cmd->cmd_flags &= ~CFLAG_DMAVALID;
4210         }
4211 
4212         if (cmd->cmd_sg) {
4213                 kmem_free(cmd->cmd_sg, sizeof (mptti_t) * cmd->cmd_cookiec);
4214                 cmd->cmd_sg = NULL;
4215         }
4216 
4217         mptsas_free_extra_sgl_frame(mpt, cmd);
4218 
4219         if ((cmd->cmd_flags &
4220             (CFLAG_FREE | CFLAG_CDBEXTERN | CFLAG_PRIVEXTERN |
4221             CFLAG_SCBEXTERN)) == 0) {
4222                 cmd->cmd_flags = CFLAG_FREE;
4223                 kmem_cache_free(mpt->m_kmem_cache, (void *)cmd);
4224         } else {
4225                 mptsas_pkt_destroy_extern(mpt, cmd);
4226         }
4227 }
4228 
4229 /*
4230  * kmem cache constructor and destructor:
4231  * When constructing, we bzero the cmd and allocate the dma handle
4232  * When destructing, just free the dma handle
4233  */
4234 static int
4235 mptsas_kmem_cache_constructor(void *buf, void *cdrarg, int kmflags)
4236 {
4237         mptsas_cmd_t            *cmd = buf;
4238         mptsas_t                *mpt  = cdrarg;
4239         int                     (*callback)(caddr_t);
4240 
4241         callback = (kmflags == KM_SLEEP)? DDI_DMA_SLEEP: DDI_DMA_DONTWAIT;
4242 
4243         NDBG4(("mptsas_kmem_cache_constructor"));
4244 
4245         /*
4246          * allocate a dma handle
4247          */
4248         if ((ddi_dma_alloc_handle(mpt->m_dip, &mpt->m_io_dma_attr, callback,
4249             NULL, &cmd->cmd_dmahandle)) != DDI_SUCCESS) {
4250                 cmd->cmd_dmahandle = NULL;
4251                 return (-1);
4252         }
4253         return (0);
4254 }
4255 
4256 static void
4257 mptsas_kmem_cache_destructor(void *buf, void *cdrarg)
4258 {
4259 #ifndef __lock_lint
4260         _NOTE(ARGUNUSED(cdrarg))
4261 #endif
4262         mptsas_cmd_t    *cmd = buf;
4263 
4264         NDBG4(("mptsas_kmem_cache_destructor"));
4265 
4266         if (cmd->cmd_dmahandle) {
4267                 ddi_dma_free_handle(&cmd->cmd_dmahandle);
4268                 cmd->cmd_dmahandle = NULL;
4269         }
4270 }
4271 
4272 static int
4273 mptsas_cache_frames_constructor(void *buf, void *cdrarg, int kmflags)
4274 {
4275         mptsas_cache_frames_t   *p = buf;
4276         mptsas_t                *mpt = cdrarg;
4277         ddi_dma_attr_t          frame_dma_attr;
4278         size_t                  mem_size, alloc_len;
4279         ddi_dma_cookie_t        cookie;
4280         uint_t                  ncookie;
4281         int (*callback)(caddr_t) = (kmflags == KM_SLEEP)
4282             ? DDI_DMA_SLEEP: DDI_DMA_DONTWAIT;
4283 
4284         frame_dma_attr = mpt->m_msg_dma_attr;
4285         frame_dma_attr.dma_attr_align = 0x10;
4286         frame_dma_attr.dma_attr_sgllen = 1;
4287 
4288         if (ddi_dma_alloc_handle(mpt->m_dip, &frame_dma_attr, callback, NULL,
4289             &p->m_dma_hdl) != DDI_SUCCESS) {
4290                 mptsas_log(mpt, CE_WARN, "Unable to allocate dma handle for"
4291                     " extra SGL.");
4292                 return (DDI_FAILURE);
4293         }
4294 
4295         mem_size = (mpt->m_max_request_frames - 1) * mpt->m_req_frame_size;
4296 
4297         if (ddi_dma_mem_alloc(p->m_dma_hdl, mem_size, &mpt->m_dev_acc_attr,
4298             DDI_DMA_CONSISTENT, callback, NULL, (caddr_t *)&p->m_frames_addr,
4299             &alloc_len, &p->m_acc_hdl) != DDI_SUCCESS) {
4300                 ddi_dma_free_handle(&p->m_dma_hdl);
4301                 p->m_dma_hdl = NULL;
4302                 mptsas_log(mpt, CE_WARN, "Unable to allocate dma memory for"
4303                     " extra SGL.");
4304                 return (DDI_FAILURE);
4305         }
4306 
4307         if (ddi_dma_addr_bind_handle(p->m_dma_hdl, NULL, p->m_frames_addr,
4308             alloc_len, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, callback, NULL,
4309             &cookie, &ncookie) != DDI_DMA_MAPPED) {
4310                 (void) ddi_dma_mem_free(&p->m_acc_hdl);
4311                 ddi_dma_free_handle(&p->m_dma_hdl);
4312                 p->m_dma_hdl = NULL;
4313                 mptsas_log(mpt, CE_WARN, "Unable to bind DMA resources for"
4314                     " extra SGL");
4315                 return (DDI_FAILURE);
4316         }
4317 
4318         /*
4319          * Store the SGL memory address.  This chip uses this
4320          * address to dma to and from the driver.  The second
4321          * address is the address mpt uses to fill in the SGL.
4322          */
4323         p->m_phys_addr = cookie.dmac_laddress;
4324 
4325         return (DDI_SUCCESS);
4326 }
4327 
4328 static void
4329 mptsas_cache_frames_destructor(void *buf, void *cdrarg)
4330 {
4331 #ifndef __lock_lint
4332         _NOTE(ARGUNUSED(cdrarg))
4333 #endif
4334         mptsas_cache_frames_t   *p = buf;
4335         if (p->m_dma_hdl != NULL) {
4336                 (void) ddi_dma_unbind_handle(p->m_dma_hdl);
4337                 (void) ddi_dma_mem_free(&p->m_acc_hdl);
4338                 ddi_dma_free_handle(&p->m_dma_hdl);
4339                 p->m_phys_addr = NULL;
4340                 p->m_frames_addr = NULL;
4341                 p->m_dma_hdl = NULL;
4342                 p->m_acc_hdl = NULL;
4343         }
4344 
4345 }
4346 
4347 /*
4348  * allocate and deallocate external pkt space (ie. not part of mptsas_cmd)
4349  * for non-standard length cdb, pkt_private, status areas
4350  * if allocation fails, then deallocate all external space and the pkt
4351  */
4352 /* ARGSUSED */
4353 static int
4354 mptsas_pkt_alloc_extern(mptsas_t *mpt, mptsas_cmd_t *cmd,
4355     int cmdlen, int tgtlen, int statuslen, int kf)
4356 {
4357         caddr_t                 cdbp, scbp, tgt;
4358         size_t                  senselength;
4359 
4360         NDBG3(("mptsas_pkt_alloc_extern: "
4361             "cmd=0x%p cmdlen=%d tgtlen=%d statuslen=%d kf=%x",
4362             (void *)cmd, cmdlen, tgtlen, statuslen, kf));
4363 
4364         tgt = cdbp = scbp = NULL;
4365         cmd->cmd_scblen              = statuslen;
4366         cmd->cmd_privlen     = (uchar_t)tgtlen;
4367 
4368         if (cmdlen > sizeof (cmd->cmd_cdb)) {
4369                 if ((cdbp = kmem_zalloc((size_t)cmdlen, kf)) == NULL) {
4370                         goto fail;
4371                 }
4372                 cmd->cmd_pkt->pkt_cdbp = (opaque_t)cdbp;
4373                 cmd->cmd_flags |= CFLAG_CDBEXTERN;
4374         }
4375         if (tgtlen > PKT_PRIV_LEN) {
4376                 if ((tgt = kmem_zalloc((size_t)tgtlen, kf)) == NULL) {
4377                         goto fail;
4378                 }
4379                 cmd->cmd_flags |= CFLAG_PRIVEXTERN;
4380                 cmd->cmd_pkt->pkt_private = tgt;
4381         }
4382         if (statuslen > EXTCMDS_STATUS_SIZE) {
4383                 if ((scbp = kmem_zalloc((size_t)statuslen, kf)) == NULL) {
4384                         goto fail;
4385                 }
4386                 cmd->cmd_flags |= CFLAG_SCBEXTERN;
4387                 cmd->cmd_pkt->pkt_scbp = (opaque_t)scbp;
4388 
4389                 /* allocate sense data buf for DMA */
4390 
4391                 senselength = statuslen - MPTSAS_GET_ITEM_OFF(
4392                     struct scsi_arq_status, sts_sensedata);
4393                 if (senselength > mpt->m_req_sense_size) {
4394                         unsigned long i;
4395                         cmd->cmd_extrqslen = (uint16_t)senselength;
4396                         cmd->cmd_extrqschunks = (senselength +
4397                             (mpt->m_req_sense_size - 1))/mpt->m_req_sense_size;
4398                         i = rmalloc_wait(mpt->m_erqsense_map,
4399                             cmd->cmd_extrqschunks);
4400                         ASSERT(i != 0);
4401                         cmd->cmd_extrqsidx = i - 1;
4402                         cmd->cmd_arq_buf = mpt->m_extreq_sense +
4403                             (cmd->cmd_extrqsidx * mpt->m_req_sense_size);
4404                 } else {
4405                         cmd->cmd_rqslen = (uchar_t)senselength;
4406                 }
4407         }
4408         return (0);
4409 fail:
4410         mptsas_pkt_destroy_extern(mpt, cmd);
4411         return (1);
4412 }
4413 
4414 /*
4415  * deallocate external pkt space and deallocate the pkt
4416  */
4417 static void
4418 mptsas_pkt_destroy_extern(mptsas_t *mpt, mptsas_cmd_t *cmd)
4419 {
4420         NDBG3(("mptsas_pkt_destroy_extern: cmd=0x%p", (void *)cmd));
4421 
4422         if (cmd->cmd_flags & CFLAG_FREE) {
4423                 mptsas_log(mpt, CE_PANIC,
4424                     "mptsas_pkt_destroy_extern: freeing free packet");
4425                 _NOTE(NOT_REACHED)
4426                 /* NOTREACHED */
4427         }
4428         if (cmd->cmd_extrqslen != 0) {
4429                 rmfree(mpt->m_erqsense_map, cmd->cmd_extrqschunks,
4430                     cmd->cmd_extrqsidx + 1);
4431         }
4432         if (cmd->cmd_flags & CFLAG_CDBEXTERN) {
4433                 kmem_free(cmd->cmd_pkt->pkt_cdbp, (size_t)cmd->cmd_cdblen);
4434         }
4435         if (cmd->cmd_flags & CFLAG_SCBEXTERN) {
4436                 kmem_free(cmd->cmd_pkt->pkt_scbp, (size_t)cmd->cmd_scblen);
4437         }
4438         if (cmd->cmd_flags & CFLAG_PRIVEXTERN) {
4439                 kmem_free(cmd->cmd_pkt->pkt_private, (size_t)cmd->cmd_privlen);
4440         }
4441         cmd->cmd_flags = CFLAG_FREE;
4442         kmem_cache_free(mpt->m_kmem_cache, (void *)cmd);
4443 }
4444 
4445 /*
4446  * tran_sync_pkt(9E) - explicit DMA synchronization
4447  */
4448 /*ARGSUSED*/
4449 static void
4450 mptsas_scsi_sync_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
4451 {
4452         mptsas_cmd_t    *cmd = PKT2CMD(pkt);
4453 
4454         NDBG3(("mptsas_scsi_sync_pkt: target=%d, pkt=0x%p",
4455             ap->a_target, (void *)pkt));
4456 
4457         if (cmd->cmd_dmahandle) {
4458                 (void) ddi_dma_sync(cmd->cmd_dmahandle, 0, 0,
4459                     (cmd->cmd_flags & CFLAG_DMASEND) ?
4460                     DDI_DMA_SYNC_FORDEV : DDI_DMA_SYNC_FORCPU);
4461         }
4462 }
4463 
4464 /*
4465  * tran_dmafree(9E) - deallocate DMA resources allocated for command
4466  */
4467 /*ARGSUSED*/
4468 static void
4469 mptsas_scsi_dmafree(struct scsi_address *ap, struct scsi_pkt *pkt)
4470 {
4471         mptsas_cmd_t    *cmd = PKT2CMD(pkt);
4472         mptsas_t        *mpt = ADDR2MPT(ap);
4473 
4474         NDBG3(("mptsas_scsi_dmafree: target=%d pkt=0x%p",
4475             ap->a_target, (void *)pkt));
4476 
4477         if (cmd->cmd_flags & CFLAG_DMAVALID) {
4478                 (void) ddi_dma_unbind_handle(cmd->cmd_dmahandle);
4479                 cmd->cmd_flags &= ~CFLAG_DMAVALID;
4480         }
4481 
4482         mptsas_free_extra_sgl_frame(mpt, cmd);
4483 }
4484 
4485 static void
4486 mptsas_pkt_comp(struct scsi_pkt *pkt, mptsas_cmd_t *cmd)
4487 {
4488         if ((cmd->cmd_flags & CFLAG_CMDIOPB) &&
4489             (!(cmd->cmd_flags & CFLAG_DMASEND))) {
4490                 (void) ddi_dma_sync(cmd->cmd_dmahandle, 0, 0,
4491                     DDI_DMA_SYNC_FORCPU);
4492         }
4493         (*pkt->pkt_comp)(pkt);
4494 }
4495 
4496 static void
4497 mptsas_sge_mainframe(mptsas_cmd_t *cmd, pMpi2SCSIIORequest_t frame,
4498                 ddi_acc_handle_t acc_hdl, uint_t cookiec,
4499                 uint32_t end_flags)
4500 {
4501         pMpi2SGESimple64_t      sge;
4502         mptti_t                 *dmap;
4503         uint32_t                flags;
4504 
4505         dmap = cmd->cmd_sg;
4506 
4507         sge = (pMpi2SGESimple64_t)(&frame->SGL);
4508         while (cookiec--) {
4509                 ddi_put32(acc_hdl, &sge->Address.Low,
4510                     dmap->addr.address64.Low);
4511                 ddi_put32(acc_hdl, &sge->Address.High,
4512                     dmap->addr.address64.High);
4513                 ddi_put32(acc_hdl, &sge->FlagsLength, dmap->count);
4514                 flags = ddi_get32(acc_hdl, &sge->FlagsLength);
4515                 flags |= ((uint32_t)
4516                     (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
4517                     MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4518                     MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4519                     MPI2_SGE_FLAGS_SHIFT);
4520 
4521                 /*
4522                  * If this is the last cookie, we set the flags
4523                  * to indicate so
4524                  */
4525                 if (cookiec == 0) {
4526                         flags |= end_flags;
4527                 }
4528                 if (cmd->cmd_flags & CFLAG_DMASEND) {
4529                         flags |= (MPI2_SGE_FLAGS_HOST_TO_IOC <<
4530                             MPI2_SGE_FLAGS_SHIFT);
4531                 } else {
4532                         flags |= (MPI2_SGE_FLAGS_IOC_TO_HOST <<
4533                             MPI2_SGE_FLAGS_SHIFT);
4534                 }
4535                 ddi_put32(acc_hdl, &sge->FlagsLength, flags);
4536                 dmap++;
4537                 sge++;
4538         }
4539 }
4540 
4541 static void
4542 mptsas_sge_chain(mptsas_t *mpt, mptsas_cmd_t *cmd,
4543     pMpi2SCSIIORequest_t frame, ddi_acc_handle_t acc_hdl)
4544 {
4545         pMpi2SGESimple64_t      sge;
4546         pMpi2SGEChain64_t       sgechain;
4547         uint64_t                nframe_phys_addr;
4548         uint_t                  cookiec;
4549         mptti_t                 *dmap;
4550         uint32_t                flags;
4551         int                     i, j, k, l, frames, sgemax;
4552         int                     temp, maxframe_sges;
4553         uint8_t                 chainflags;
4554         uint16_t                chainlength;
4555         mptsas_cache_frames_t   *p;
4556 
4557         cookiec = cmd->cmd_cookiec;
4558 
4559         /*
4560          * Hereby we start to deal with multiple frames.
4561          * The process is as follows:
4562          * 1. Determine how many frames are needed for SGL element
4563          *    storage; Note that all frames are stored in contiguous
4564          *    memory space and in 64-bit DMA mode each element is
4565          *    3 double-words (12 bytes) long.
4566          * 2. Fill up the main frame. We need to do this separately
4567          *    since it contains the SCSI IO request header and needs
4568          *    dedicated processing. Note that the last 4 double-words
4569          *    of the SCSI IO header is for SGL element storage
4570          *    (MPI2_SGE_IO_UNION).
4571          * 3. Fill the chain element in the main frame, so the DMA
4572          *    engine can use the following frames.
4573          * 4. Enter a loop to fill the remaining frames. Note that the
4574          *    last frame contains no chain element.  The remaining
4575          *    frames go into the mpt SGL buffer allocated on the fly,
4576          *    not immediately following the main message frame, as in
4577          *    Gen1.
4578          * Some restrictions:
4579          * 1. For 64-bit DMA, the simple element and chain element
4580          *    are both of 3 double-words (12 bytes) in size, even
4581          *    though all frames are stored in the first 4G of mem
4582          *    range and the higher 32-bits of the address are always 0.
4583          * 2. On some controllers (like the 1064/1068), a frame can
4584          *    hold SGL elements with the last 1 or 2 double-words
4585          *    (4 or 8 bytes) un-used. On these controllers, we should
4586          *    recognize that there's not enough room for another SGL
4587          *    element and move the sge pointer to the next frame.
4588          */
4589 
4590         /*
4591          * Sgemax is the number of SGE's that will fit
4592          * each extra frame and frames is total
4593          * number of frames we'll need.  1 sge entry per
4594          * frame is reseverd for the chain element thus the -1 below.
4595          */
4596         sgemax = ((mpt->m_req_frame_size / sizeof (MPI2_SGE_SIMPLE64)) - 1);
4597         maxframe_sges = MPTSAS_MAX_FRAME_SGES64(mpt);
4598         temp = (cookiec - (maxframe_sges - 1)) / sgemax;
4599 
4600         /*
4601          * A little check to see if we need to round up the number
4602          * of frames we need
4603          */
4604         if ((cookiec - (maxframe_sges - 1)) - (temp * sgemax) > 1) {
4605                 frames = (temp + 1);
4606         } else {
4607                 frames = temp;
4608         }
4609         dmap = cmd->cmd_sg;
4610         sge = (pMpi2SGESimple64_t)(&frame->SGL);
4611 
4612         /*
4613          * First fill in the main frame
4614          */
4615         j = maxframe_sges - 1;
4616         mptsas_sge_mainframe(cmd, frame, acc_hdl, j,
4617             ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT) <<
4618             MPI2_SGE_FLAGS_SHIFT));
4619         dmap += j;
4620         sge += j;
4621         j++;
4622 
4623         /*
4624          * Fill in the chain element in the main frame.
4625          * About calculation on ChainOffset:
4626          * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4627          *    in the end reserved for SGL element storage
4628          *    (MPI2_SGE_IO_UNION); we should count it in our
4629          *    calculation.  See its definition in the header file.
4630          * 2. Constant j is the counter of the current SGL element
4631          *    that will be processed, and (j - 1) is the number of
4632          *    SGL elements that have been processed (stored in the
4633          *    main frame).
4634          * 3. ChainOffset value should be in units of double-words (4
4635          *    bytes) so the last value should be divided by 4.
4636          */
4637         ddi_put8(acc_hdl, &frame->ChainOffset,
4638             (sizeof (MPI2_SCSI_IO_REQUEST) -
4639             sizeof (MPI2_SGE_IO_UNION) +
4640             (j - 1) * sizeof (MPI2_SGE_SIMPLE64)) >> 2);
4641         sgechain = (pMpi2SGEChain64_t)sge;
4642         chainflags = (MPI2_SGE_FLAGS_CHAIN_ELEMENT |
4643             MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4644             MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4645         ddi_put8(acc_hdl, &sgechain->Flags, chainflags);
4646 
4647         /*
4648          * The size of the next frame is the accurate size of space
4649          * (in bytes) used to store the SGL elements. j is the counter
4650          * of SGL elements. (j - 1) is the number of SGL elements that
4651          * have been processed (stored in frames).
4652          */
4653         if (frames >= 2) {
4654                 chainlength = mpt->m_req_frame_size /
4655                     sizeof (MPI2_SGE_SIMPLE64) *
4656                     sizeof (MPI2_SGE_SIMPLE64);
4657         } else {
4658                 chainlength = ((cookiec - (j - 1)) *
4659                     sizeof (MPI2_SGE_SIMPLE64));
4660         }
4661 
4662         p = cmd->cmd_extra_frames;
4663 
4664         ddi_put16(acc_hdl, &sgechain->Length, chainlength);
4665         ddi_put32(acc_hdl, &sgechain->Address.Low,
4666             (p->m_phys_addr&0xffffffffull));
4667         ddi_put32(acc_hdl, &sgechain->Address.High, p->m_phys_addr>>32);
4668 
4669         /*
4670          * If there are more than 2 frames left we have to
4671          * fill in the next chain offset to the location of
4672          * the chain element in the next frame.
4673          * sgemax is the number of simple elements in an extra
4674          * frame. Note that the value NextChainOffset should be
4675          * in double-words (4 bytes).
4676          */
4677         if (frames >= 2) {
4678                 ddi_put8(acc_hdl, &sgechain->NextChainOffset,
4679                     (sgemax * sizeof (MPI2_SGE_SIMPLE64)) >> 2);
4680         } else {
4681                 ddi_put8(acc_hdl, &sgechain->NextChainOffset, 0);
4682         }
4683 
4684         /*
4685          * Jump to next frame;
4686          * Starting here, chain buffers go into the per command SGL.
4687          * This buffer is allocated when chain buffers are needed.
4688          */
4689         sge = (pMpi2SGESimple64_t)p->m_frames_addr;
4690         i = cookiec;
4691 
4692         /*
4693          * Start filling in frames with SGE's.  If we
4694          * reach the end of frame and still have SGE's
4695          * to fill we need to add a chain element and
4696          * use another frame.  j will be our counter
4697          * for what cookie we are at and i will be
4698          * the total cookiec. k is the current frame
4699          */
4700         for (k = 1; k <= frames; k++) {
4701                 for (l = 1; (l <= (sgemax + 1)) && (j <= i); j++, l++) {
4702 
4703                         /*
4704                          * If we have reached the end of frame
4705                          * and we have more SGE's to fill in
4706                          * we have to fill the final entry
4707                          * with a chain element and then
4708                          * continue to the next frame
4709                          */
4710                         if ((l == (sgemax + 1)) && (k != frames)) {
4711                                 sgechain = (pMpi2SGEChain64_t)sge;
4712                                 j--;
4713                                 chainflags = (
4714                                     MPI2_SGE_FLAGS_CHAIN_ELEMENT |
4715                                     MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4716                                     MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4717                                 ddi_put8(p->m_acc_hdl,
4718                                     &sgechain->Flags, chainflags);
4719                                 /*
4720                                  * k is the frame counter and (k + 1)
4721                                  * is the number of the next frame.
4722                                  * Note that frames are in contiguous
4723                                  * memory space.
4724                                  */
4725                                 nframe_phys_addr = p->m_phys_addr +
4726                                     (mpt->m_req_frame_size * k);
4727                                 ddi_put32(p->m_acc_hdl,
4728                                     &sgechain->Address.Low,
4729                                     nframe_phys_addr&0xffffffffull);
4730                                 ddi_put32(p->m_acc_hdl,
4731                                     &sgechain->Address.High,
4732                                     nframe_phys_addr>>32);
4733 
4734                                 /*
4735                                  * If there are more than 2 frames left
4736                                  * we have to next chain offset to
4737                                  * the location of the chain element
4738                                  * in the next frame and fill in the
4739                                  * length of the next chain
4740                                  */
4741                                 if ((frames - k) >= 2) {
4742                                         ddi_put8(p->m_acc_hdl,
4743                                             &sgechain->NextChainOffset,
4744                                             (sgemax *
4745                                             sizeof (MPI2_SGE_SIMPLE64))
4746                                             >> 2);
4747                                         ddi_put16(p->m_acc_hdl,
4748                                             &sgechain->Length,
4749                                             mpt->m_req_frame_size /
4750                                             sizeof (MPI2_SGE_SIMPLE64) *
4751                                             sizeof (MPI2_SGE_SIMPLE64));
4752                                 } else {
4753                                         /*
4754                                          * This is the last frame. Set
4755                                          * the NextChainOffset to 0 and
4756                                          * Length is the total size of
4757                                          * all remaining simple elements
4758                                          */
4759                                         ddi_put8(p->m_acc_hdl,
4760                                             &sgechain->NextChainOffset,
4761                                             0);
4762                                         ddi_put16(p->m_acc_hdl,
4763                                             &sgechain->Length,
4764                                             (cookiec - j) *
4765                                             sizeof (MPI2_SGE_SIMPLE64));
4766                                 }
4767 
4768                                 /* Jump to the next frame */
4769                                 sge = (pMpi2SGESimple64_t)
4770                                     ((char *)p->m_frames_addr +
4771                                     (int)mpt->m_req_frame_size * k);
4772 
4773                                 continue;
4774                         }
4775 
4776                         ddi_put32(p->m_acc_hdl,
4777                             &sge->Address.Low,
4778                             dmap->addr.address64.Low);
4779                         ddi_put32(p->m_acc_hdl,
4780                             &sge->Address.High,
4781                             dmap->addr.address64.High);
4782                         ddi_put32(p->m_acc_hdl,
4783                             &sge->FlagsLength, dmap->count);
4784                         flags = ddi_get32(p->m_acc_hdl,
4785                             &sge->FlagsLength);
4786                         flags |= ((uint32_t)(
4787                             MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
4788                             MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4789                             MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4790                             MPI2_SGE_FLAGS_SHIFT);
4791 
4792                         /*
4793                          * If we are at the end of the frame and
4794                          * there is another frame to fill in
4795                          * we set the last simple element as last
4796                          * element
4797                          */
4798                         if ((l == sgemax) && (k != frames)) {
4799                                 flags |= ((uint32_t)
4800                                     (MPI2_SGE_FLAGS_LAST_ELEMENT) <<
4801                                     MPI2_SGE_FLAGS_SHIFT);
4802                         }
4803 
4804                         /*
4805                          * If this is the final cookie we
4806                          * indicate it by setting the flags
4807                          */
4808                         if (j == i) {
4809                                 flags |= ((uint32_t)
4810                                     (MPI2_SGE_FLAGS_LAST_ELEMENT |
4811                                     MPI2_SGE_FLAGS_END_OF_BUFFER |
4812                                     MPI2_SGE_FLAGS_END_OF_LIST) <<
4813                                     MPI2_SGE_FLAGS_SHIFT);
4814                         }
4815                         if (cmd->cmd_flags & CFLAG_DMASEND) {
4816                                 flags |=
4817                                     (MPI2_SGE_FLAGS_HOST_TO_IOC <<
4818                                     MPI2_SGE_FLAGS_SHIFT);
4819                         } else {
4820                                 flags |=
4821                                     (MPI2_SGE_FLAGS_IOC_TO_HOST <<
4822                                     MPI2_SGE_FLAGS_SHIFT);
4823                         }
4824                         ddi_put32(p->m_acc_hdl,
4825                             &sge->FlagsLength, flags);
4826                         dmap++;
4827                         sge++;
4828                 }
4829         }
4830 
4831         /*
4832          * Sync DMA with the chain buffers that were just created
4833          */
4834         (void) ddi_dma_sync(p->m_dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
4835 }
4836 
4837 static void
4838 mptsas_ieee_sge_mainframe(mptsas_cmd_t *cmd, pMpi2SCSIIORequest_t frame,
4839     ddi_acc_handle_t acc_hdl, uint_t cookiec,
4840     uint8_t end_flag)
4841 {
4842         pMpi2IeeeSgeSimple64_t  ieeesge;
4843         mptti_t                 *dmap;
4844         uint8_t                 flags;
4845 
4846         dmap = cmd->cmd_sg;
4847 
4848         NDBG1(("mptsas_ieee_sge_mainframe: cookiec=%d, %s", cookiec,
4849             cmd->cmd_flags & CFLAG_DMASEND?"Out":"In"));
4850 
4851         ieeesge = (pMpi2IeeeSgeSimple64_t)(&frame->SGL);
4852         while (cookiec--) {
4853                 ddi_put32(acc_hdl, &ieeesge->Address.Low,
4854                     dmap->addr.address64.Low);
4855                 ddi_put32(acc_hdl, &ieeesge->Address.High,
4856                     dmap->addr.address64.High);
4857                 ddi_put32(acc_hdl, &ieeesge->Length, dmap->count);
4858                 NDBG1(("mptsas_ieee_sge_mainframe: len=%d, high=0x%x",
4859                     dmap->count, dmap->addr.address64.High));
4860                 flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
4861                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4862 
4863                 /*
4864                  * If this is the last cookie, we set the flags
4865                  * to indicate so
4866                  */
4867                 if (cookiec == 0) {
4868                         flags |= end_flag;
4869                 }
4870 
4871                 /*
4872                  * XXX: Hmmm, what about the direction based on
4873                  * cmd->cmd_flags & CFLAG_DMASEND?
4874                  */
4875                 ddi_put8(acc_hdl, &ieeesge->Flags, flags);
4876                 dmap++;
4877                 ieeesge++;
4878         }
4879 }
4880 
4881 static void
4882 mptsas_ieee_sge_chain(mptsas_t *mpt, mptsas_cmd_t *cmd,
4883     pMpi2SCSIIORequest_t frame, ddi_acc_handle_t acc_hdl)
4884 {
4885         pMpi2IeeeSgeSimple64_t  ieeesge;
4886         pMpi25IeeeSgeChain64_t  ieeesgechain;
4887         uint64_t                nframe_phys_addr;
4888         uint_t                  cookiec;
4889         mptti_t                 *dmap;
4890         uint8_t                 flags;
4891         int                     i, j, k, l, frames, sgemax;
4892         int                     temp, maxframe_sges;
4893         uint8_t                 chainflags;
4894         uint32_t                chainlength;
4895         mptsas_cache_frames_t   *p;
4896 
4897         cookiec = cmd->cmd_cookiec;
4898 
4899         NDBG1(("mptsas_ieee_sge_chain: cookiec=%d", cookiec));
4900 
4901         /*
4902          * Hereby we start to deal with multiple frames.
4903          * The process is as follows:
4904          * 1. Determine how many frames are needed for SGL element
4905          *    storage; Note that all frames are stored in contiguous
4906          *    memory space and in 64-bit DMA mode each element is
4907          *    4 double-words (16 bytes) long.
4908          * 2. Fill up the main frame. We need to do this separately
4909          *    since it contains the SCSI IO request header and needs
4910          *    dedicated processing. Note that the last 4 double-words
4911          *    of the SCSI IO header is for SGL element storage
4912          *    (MPI2_SGE_IO_UNION).
4913          * 3. Fill the chain element in the main frame, so the DMA
4914          *    engine can use the following frames.
4915          * 4. Enter a loop to fill the remaining frames. Note that the
4916          *    last frame contains no chain element.  The remaining
4917          *    frames go into the mpt SGL buffer allocated on the fly,
4918          *    not immediately following the main message frame, as in
4919          *    Gen1.
4920          * Some restrictions:
4921          * 1. For 64-bit DMA, the simple element and chain element
4922          *    are both of 4 double-words (16 bytes) in size, even
4923          *    though all frames are stored in the first 4G of mem
4924          *    range and the higher 32-bits of the address are always 0.
4925          * 2. On some controllers (like the 1064/1068), a frame can
4926          *    hold SGL elements with the last 1 or 2 double-words
4927          *    (4 or 8 bytes) un-used. On these controllers, we should
4928          *    recognize that there's not enough room for another SGL
4929          *    element and move the sge pointer to the next frame.
4930          */
4931 
4932         /*
4933          * Sgemax is the number of SGE's that will fit
4934          * each extra frame and frames is total
4935          * number of frames we'll need.  1 sge entry per
4936          * frame is reseverd for the chain element thus the -1 below.
4937          */
4938         sgemax = ((mpt->m_req_frame_size / sizeof (MPI2_IEEE_SGE_SIMPLE64))
4939             - 1);
4940         maxframe_sges = MPTSAS_MAX_FRAME_SGES64(mpt);
4941         temp = (cookiec - (maxframe_sges - 1)) / sgemax;
4942 
4943         /*
4944          * A little check to see if we need to round up the number
4945          * of frames we need
4946          */
4947         if ((cookiec - (maxframe_sges - 1)) - (temp * sgemax) > 1) {
4948                 frames = (temp + 1);
4949         } else {
4950                 frames = temp;
4951         }
4952         NDBG1(("mptsas_ieee_sge_chain: temp=%d, frames=%d", temp, frames));
4953         dmap = cmd->cmd_sg;
4954         ieeesge = (pMpi2IeeeSgeSimple64_t)(&frame->SGL);
4955 
4956         /*
4957          * First fill in the main frame
4958          */
4959         j = maxframe_sges - 1;
4960         mptsas_ieee_sge_mainframe(cmd, frame, acc_hdl, j, 0);
4961         dmap += j;
4962         ieeesge += j;
4963         j++;
4964 
4965         /*
4966          * Fill in the chain element in the main frame.
4967          * About calculation on ChainOffset:
4968          * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4969          *    in the end reserved for SGL element storage
4970          *    (MPI2_SGE_IO_UNION); we should count it in our
4971          *    calculation.  See its definition in the header file.
4972          * 2. Constant j is the counter of the current SGL element
4973          *    that will be processed, and (j - 1) is the number of
4974          *    SGL elements that have been processed (stored in the
4975          *    main frame).
4976          * 3. ChainOffset value should be in units of quad-words (16
4977          *    bytes) so the last value should be divided by 16.
4978          */
4979         ddi_put8(acc_hdl, &frame->ChainOffset,
4980             (sizeof (MPI2_SCSI_IO_REQUEST) -
4981             sizeof (MPI2_SGE_IO_UNION) +
4982             (j - 1) * sizeof (MPI2_IEEE_SGE_SIMPLE64)) >> 4);
4983         ieeesgechain = (pMpi25IeeeSgeChain64_t)ieeesge;
4984         chainflags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
4985             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4986         ddi_put8(acc_hdl, &ieeesgechain->Flags, chainflags);
4987 
4988         /*
4989          * The size of the next frame is the accurate size of space
4990          * (in bytes) used to store the SGL elements. j is the counter
4991          * of SGL elements. (j - 1) is the number of SGL elements that
4992          * have been processed (stored in frames).
4993          */
4994         if (frames >= 2) {
4995                 chainlength = mpt->m_req_frame_size /
4996                     sizeof (MPI2_IEEE_SGE_SIMPLE64) *
4997                     sizeof (MPI2_IEEE_SGE_SIMPLE64);
4998         } else {
4999                 chainlength = ((cookiec - (j - 1)) *
5000                     sizeof (MPI2_IEEE_SGE_SIMPLE64));
5001         }
5002 
5003         p = cmd->cmd_extra_frames;
5004 
5005         ddi_put32(acc_hdl, &ieeesgechain->Length, chainlength);
5006         ddi_put32(acc_hdl, &ieeesgechain->Address.Low,
5007             p->m_phys_addr&0xffffffffull);
5008         ddi_put32(acc_hdl, &ieeesgechain->Address.High, p->m_phys_addr>>32);
5009 
5010         /*
5011          * If there are more than 2 frames left we have to
5012          * fill in the next chain offset to the location of
5013          * the chain element in the next frame.
5014          * sgemax is the number of simple elements in an extra
5015          * frame. Note that the value NextChainOffset should be
5016          * in double-words (4 bytes).
5017          */
5018         if (frames >= 2) {
5019                 ddi_put8(acc_hdl, &ieeesgechain->NextChainOffset,
5020                     (sgemax * sizeof (MPI2_IEEE_SGE_SIMPLE64)) >> 4);
5021         } else {
5022                 ddi_put8(acc_hdl, &ieeesgechain->NextChainOffset, 0);
5023         }
5024 
5025         /*
5026          * Jump to next frame;
5027          * Starting here, chain buffers go into the per command SGL.
5028          * This buffer is allocated when chain buffers are needed.
5029          */
5030         ieeesge = (pMpi2IeeeSgeSimple64_t)p->m_frames_addr;
5031         i = cookiec;
5032 
5033         /*
5034          * Start filling in frames with SGE's.  If we
5035          * reach the end of frame and still have SGE's
5036          * to fill we need to add a chain element and
5037          * use another frame.  j will be our counter
5038          * for what cookie we are at and i will be
5039          * the total cookiec. k is the current frame
5040          */
5041         for (k = 1; k <= frames; k++) {
5042                 for (l = 1; (l <= (sgemax + 1)) && (j <= i); j++, l++) {
5043 
5044                         /*
5045                          * If we have reached the end of frame
5046                          * and we have more SGE's to fill in
5047                          * we have to fill the final entry
5048                          * with a chain element and then
5049                          * continue to the next frame
5050                          */
5051                         if ((l == (sgemax + 1)) && (k != frames)) {
5052                                 ieeesgechain = (pMpi25IeeeSgeChain64_t)ieeesge;
5053                                 j--;
5054                                 chainflags =
5055                                     MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
5056                                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
5057                                 ddi_put8(p->m_acc_hdl,
5058                                     &ieeesgechain->Flags, chainflags);
5059                                 /*
5060                                  * k is the frame counter and (k + 1)
5061                                  * is the number of the next frame.
5062                                  * Note that frames are in contiguous
5063                                  * memory space.
5064                                  */
5065                                 nframe_phys_addr = p->m_phys_addr +
5066                                     (mpt->m_req_frame_size * k);
5067                                 ddi_put32(p->m_acc_hdl,
5068                                     &ieeesgechain->Address.Low,
5069                                     nframe_phys_addr&0xffffffffull);
5070                                 ddi_put32(p->m_acc_hdl,
5071                                     &ieeesgechain->Address.High,
5072                                     nframe_phys_addr>>32);
5073 
5074                                 /*
5075                                  * If there are more than 2 frames left
5076                                  * we have to next chain offset to
5077                                  * the location of the chain element
5078                                  * in the next frame and fill in the
5079                                  * length of the next chain
5080                                  */
5081                                 if ((frames - k) >= 2) {
5082                                         ddi_put8(p->m_acc_hdl,
5083                                             &ieeesgechain->NextChainOffset,
5084                                             (sgemax *
5085                                             sizeof (MPI2_IEEE_SGE_SIMPLE64))
5086                                             >> 4);
5087                                         ddi_put32(p->m_acc_hdl,
5088                                             &ieeesgechain->Length,
5089                                             mpt->m_req_frame_size /
5090                                             sizeof (MPI2_IEEE_SGE_SIMPLE64) *
5091                                             sizeof (MPI2_IEEE_SGE_SIMPLE64));
5092                                 } else {
5093                                         /*
5094                                          * This is the last frame. Set
5095                                          * the NextChainOffset to 0 and
5096                                          * Length is the total size of
5097                                          * all remaining simple elements
5098                                          */
5099                                         ddi_put8(p->m_acc_hdl,
5100                                             &ieeesgechain->NextChainOffset,
5101                                             0);
5102                                         ddi_put32(p->m_acc_hdl,
5103                                             &ieeesgechain->Length,
5104                                             (cookiec - j) *
5105                                             sizeof (MPI2_IEEE_SGE_SIMPLE64));
5106                                 }
5107 
5108                                 /* Jump to the next frame */
5109                                 ieeesge = (pMpi2IeeeSgeSimple64_t)
5110                                     ((char *)p->m_frames_addr +
5111                                     (int)mpt->m_req_frame_size * k);
5112 
5113                                 continue;
5114                         }
5115 
5116                         ddi_put32(p->m_acc_hdl,
5117                             &ieeesge->Address.Low,
5118                             dmap->addr.address64.Low);
5119                         ddi_put32(p->m_acc_hdl,
5120                             &ieeesge->Address.High,
5121                             dmap->addr.address64.High);
5122                         ddi_put32(p->m_acc_hdl,
5123                             &ieeesge->Length, dmap->count);
5124                         flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
5125                             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
5126 
5127                         /*
5128                          * If we are at the end of the frame and
5129                          * there is another frame to fill in
5130                          * do we need to do anything?
5131                          * if ((l == sgemax) && (k != frames)) {
5132                          * }
5133                          */
5134 
5135                         /*
5136                          * If this is the final cookie set end of list.
5137                          */
5138                         if (j == i) {
5139                                 flags |= MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
5140                         }
5141 
5142                         ddi_put8(p->m_acc_hdl, &ieeesge->Flags, flags);
5143                         dmap++;
5144                         ieeesge++;
5145                 }
5146         }
5147 
5148         /*
5149          * Sync DMA with the chain buffers that were just created
5150          */
5151         (void) ddi_dma_sync(p->m_dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
5152 }
5153 
5154 static void
5155 mptsas_sge_setup(mptsas_t *mpt, mptsas_cmd_t *cmd, uint32_t *control,
5156     pMpi2SCSIIORequest_t frame, ddi_acc_handle_t acc_hdl)
5157 {
5158         ASSERT(cmd->cmd_flags & CFLAG_DMAVALID);
5159 
5160         NDBG1(("mptsas_sge_setup: cookiec=%d", cmd->cmd_cookiec));
5161 
5162         /*
5163          * Set read/write bit in control.
5164          */
5165         if (cmd->cmd_flags & CFLAG_DMASEND) {
5166                 *control |= MPI2_SCSIIO_CONTROL_WRITE;
5167         } else {
5168                 *control |= MPI2_SCSIIO_CONTROL_READ;
5169         }
5170 
5171         ddi_put32(acc_hdl, &frame->DataLength, cmd->cmd_dmacount);
5172 
5173         /*
5174          * We have 4 cases here.  First where we can fit all the
5175          * SG elements into the main frame, and the case
5176          * where we can't. The SG element is also different when using
5177          * MPI2.5 interface.
5178          * If we have more cookies than we can attach to a frame
5179          * we will need to use a chain element to point
5180          * a location of memory where the rest of the S/G
5181          * elements reside.
5182          */
5183         if (cmd->cmd_cookiec <= MPTSAS_MAX_FRAME_SGES64(mpt)) {
5184                 if (mpt->m_MPI25) {
5185                         mptsas_ieee_sge_mainframe(cmd, frame, acc_hdl,
5186                             cmd->cmd_cookiec,
5187                             MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
5188                 } else {
5189                         mptsas_sge_mainframe(cmd, frame, acc_hdl,
5190                             cmd->cmd_cookiec,
5191                             ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT
5192                             | MPI2_SGE_FLAGS_END_OF_BUFFER
5193                             | MPI2_SGE_FLAGS_END_OF_LIST) <<
5194                             MPI2_SGE_FLAGS_SHIFT));
5195                 }
5196         } else {
5197                 if (mpt->m_MPI25) {
5198                         mptsas_ieee_sge_chain(mpt, cmd, frame, acc_hdl);
5199                 } else {
5200                         mptsas_sge_chain(mpt, cmd, frame, acc_hdl);
5201                 }
5202         }
5203 }
5204 
5205 /*
5206  * Interrupt handling
5207  * Utility routine.  Poll for status of a command sent to HBA
5208  * without interrupts (a FLAG_NOINTR command).
5209  */
5210 int
5211 mptsas_poll(mptsas_t *mpt, mptsas_cmd_t *poll_cmd, int polltime)
5212 {
5213         int             rval = TRUE;
5214         uint32_t        int_mask;
5215 
5216         NDBG5(("mptsas_poll: cmd=0x%p, flags 0x%x", (void *)poll_cmd,
5217             poll_cmd->cmd_flags));
5218 
5219         /*
5220          * Get the current interrupt mask and disable interrupts.  When
5221          * re-enabling ints, set mask to saved value.
5222          */
5223         int_mask = ddi_get32(mpt->m_datap, &mpt->m_reg->HostInterruptMask);
5224         MPTSAS_DISABLE_INTR(mpt);
5225 
5226         mpt->m_polled_intr = 1;
5227 
5228         if ((poll_cmd->cmd_flags & CFLAG_TM_CMD) == 0) {
5229                 mptsas_restart_hba(mpt);
5230         }
5231 
5232         /*
5233          * Wait, using drv_usecwait(), long enough for the command to
5234          * reasonably return from the target if the target isn't
5235          * "dead".  A polled command may well be sent from scsi_poll, and
5236          * there are retries built in to scsi_poll if the transport
5237          * accepted the packet (TRAN_ACCEPT).  scsi_poll waits 1 second
5238          * and retries the transport up to scsi_poll_busycnt times
5239          * (currently 60) if
5240          * 1. pkt_reason is CMD_INCOMPLETE and pkt_state is 0, or
5241          * 2. pkt_reason is CMD_CMPLT and *pkt_scbp has STATUS_BUSY
5242          *
5243          * limit the waiting to avoid a hang in the event that the
5244          * cmd never gets started but we are still receiving interrupts
5245          */
5246         while (!(poll_cmd->cmd_flags & CFLAG_FINISHED)) {
5247                 if (mptsas_wait_intr(mpt, polltime) == FALSE) {
5248                         NDBG5(("mptsas_poll: command incomplete"));
5249                         rval = FALSE;
5250                         break;
5251                 }
5252         }
5253 
5254         if (rval == FALSE) {
5255 
5256                 /*
5257                  * this isn't supposed to happen, the hba must be wedged
5258                  * Mark this cmd as a timeout.
5259                  */
5260                 mptsas_set_pkt_reason(mpt, poll_cmd, CMD_TIMEOUT,
5261                     (STAT_TIMEOUT|STAT_ABORTED));
5262 
5263                 if (poll_cmd->cmd_queued == FALSE) {
5264 
5265                         NDBG5(("mptsas_poll: not on waitq"));
5266 
5267                         poll_cmd->cmd_pkt->pkt_state |=
5268                             (STATE_GOT_BUS|STATE_GOT_TARGET|STATE_SENT_CMD);
5269                 } else {
5270 
5271                         /* find and remove it from the waitq */
5272                         NDBG5(("mptsas_poll: delete from waitq"));
5273                         mptsas_waitq_delete(mpt, poll_cmd);
5274                 }
5275 
5276         }
5277         mptsas_fma_check(mpt, poll_cmd);
5278 
5279         /*
5280          * Clear polling flag, re-enable interrupts.
5281          */
5282         mpt->m_polled_intr = 0;
5283         ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptMask, int_mask);
5284 
5285         /*
5286          * If there are queued cmd, start them now.
5287          */
5288         if (mpt->m_waitq != NULL) {
5289                 mptsas_restart_waitq(mpt);
5290         }
5291 
5292         NDBG5(("mptsas_poll: done"));
5293         return (rval);
5294 }
5295 
5296 /*
5297  * Used for polling cmds and TM function
5298  */
5299 static int
5300 mptsas_wait_intr(mptsas_t *mpt, int polltime)
5301 {
5302         int                             cnt, rval = FALSE;
5303         pMpi2ReplyDescriptorsUnion_t    reply_desc_union;
5304         mptsas_reply_pqueue_t           *rpqp;
5305 
5306         NDBG5(("mptsas_wait_intr"));
5307         ASSERT(mutex_owned(&mpt->m_mutex));
5308 
5309         /*
5310          * Keep polling for at least (polltime * 1000) seconds
5311          */
5312         rpqp = mpt->m_rep_post_queues;
5313 
5314         /*
5315          * Drop the main mutex and grab the mutex for reply queue 0
5316          */
5317         mutex_exit(&mpt->m_mutex);
5318         mutex_enter(&rpqp->rpq_mutex);
5319         for (cnt = 0; cnt < polltime; cnt++) {
5320                 (void) ddi_dma_sync(mpt->m_dma_post_queue_hdl, 0, 0,
5321                     DDI_DMA_SYNC_FORCPU);
5322 
5323                 /*
5324                  * Polled requests should only come back through
5325                  * the first interrupt.
5326                  */
5327                 reply_desc_union = (pMpi2ReplyDescriptorsUnion_t)
5328                     MPTSAS_GET_NEXT_REPLY(rpqp, rpqp->rpq_index);
5329 
5330                 if (ddi_get32(mpt->m_acc_post_queue_hdl,
5331                     &reply_desc_union->Words.Low) == 0xFFFFFFFF ||
5332                     ddi_get32(mpt->m_acc_post_queue_hdl,
5333                     &reply_desc_union->Words.High) == 0xFFFFFFFF) {
5334                         drv_usecwait(1000);
5335                         continue;
5336                 }
5337 
5338                 /*
5339                  * The reply is valid, process it according to its
5340                  * type.
5341                  */
5342                 mptsas_process_intr(mpt, rpqp, reply_desc_union);
5343 
5344                 /*
5345                  * Clear the reply descriptor for re-use.
5346                  */
5347                 ddi_put64(mpt->m_acc_post_queue_hdl,
5348                     &((uint64_t *)(void *)rpqp->rpq_queue)[rpqp->rpq_index],
5349                     0xFFFFFFFFFFFFFFFF);
5350                 (void) ddi_dma_sync(mpt->m_dma_post_queue_hdl, 0, 0,
5351                     DDI_DMA_SYNC_FORDEV);
5352 
5353                 if (++rpqp->rpq_index == mpt->m_post_queue_depth) {
5354                         rpqp->rpq_index = 0;
5355                 }
5356 
5357                 /*
5358                  * Update the reply index
5359                  */
5360                 ddi_put32(mpt->m_datap,
5361                     &mpt->m_reg->ReplyPostHostIndex, rpqp->rpq_index);
5362                 rval = TRUE;
5363                 break;
5364         }
5365 
5366         mutex_exit(&rpqp->rpq_mutex);
5367         mutex_enter(&mpt->m_mutex);
5368 
5369         return (rval);
5370 }
5371 
5372 static void
5373 mptsas_handle_scsi_io_success(mptsas_t *mpt,
5374     mptsas_reply_pqueue_t *rpqp,
5375     pMpi2ReplyDescriptorsUnion_t reply_desc)
5376 {
5377         pMpi2SCSIIOSuccessReplyDescriptor_t     scsi_io_success;
5378         uint16_t                                SMID;
5379         mptsas_slots_t                          *slots = mpt->m_active;
5380         mptsas_cmd_t                            *cmd = NULL;
5381         struct scsi_pkt                         *pkt;
5382 
5383         scsi_io_success = (pMpi2SCSIIOSuccessReplyDescriptor_t)reply_desc;
5384         SMID = ddi_get16(mpt->m_acc_post_queue_hdl, &scsi_io_success->SMID);
5385 
5386         /*
5387          * This is a success reply so just complete the IO.  First, do a sanity
5388          * check on the SMID.  The final slot is used for TM requests, which
5389          * would not come into this reply handler.
5390          */
5391         if ((SMID == 0) || (SMID > slots->m_n_normal)) {
5392                 mptsas_log(mpt, CE_WARN, "?Received invalid SMID of %d\n",
5393                     SMID);
5394                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
5395                 return;
5396         }
5397 
5398         cmd = slots->m_slot[SMID];
5399 
5400         /*
5401          * print warning and return if the slot is empty
5402          */
5403         if (cmd == NULL) {
5404                 mptsas_log(mpt, CE_WARN, "?NULL command for successful SCSI IO "
5405                     "in slot %d", SMID);
5406                 return;
5407         }
5408         ASSERT(cmd->cmd_rpqidx == rpqp->rpq_num);
5409 
5410         pkt = CMD2PKT(cmd);
5411         pkt->pkt_state |= (STATE_GOT_BUS | STATE_GOT_TARGET | STATE_SENT_CMD |
5412             STATE_GOT_STATUS);
5413         if (cmd->cmd_flags & CFLAG_DMAVALID) {
5414                 pkt->pkt_state |= STATE_XFERRED_DATA;
5415         }
5416         pkt->pkt_resid = 0;
5417 
5418         if (cmd->cmd_flags & CFLAG_PASSTHRU) {
5419                 cmd->cmd_flags |= CFLAG_FINISHED;
5420                 cv_broadcast(&mpt->m_passthru_cv);
5421                 return;
5422         }
5423         if (!(cmd->cmd_flags & CFLAG_TM_CMD)) {
5424                 if (cmd->cmd_flags & CFLAG_CMDIOC) {
5425                         mutex_enter(&mpt->m_mutex);
5426                         mptsas_remove_cmd(mpt, cmd);
5427                         mutex_exit(&mpt->m_mutex);
5428                 } else {
5429 #ifdef MPTSAS_DEBUG
5430                         /*
5431                          * In order to test timeout for a command set
5432                          * mptsas_test_timeout via mdb to avoid completion
5433                          * processing here.
5434                          */
5435                         if (mptsas_test_timeout) {
5436                                 mptsas_test_timeout = 0;
5437                                 return;
5438                         }
5439 #endif
5440                         /*
5441                          * This is the normal path, avoid grabbing
5442                          * the m_mutex.
5443                          */
5444                         mptsas_remove_cmd_nomtx(mpt, cmd);
5445                 }
5446         }
5447 
5448         if (cmd->cmd_flags & CFLAG_RETRY) {
5449                 /*
5450                  * The target returned QFULL or busy, do not add tihs
5451                  * pkt to the doneq since the hba will retry
5452                  * this cmd.
5453                  *
5454                  * The pkt has already been resubmitted in
5455                  * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5456                  * Remove this cmd_flag here.
5457                  */
5458                 cmd->cmd_flags &= ~CFLAG_RETRY;
5459         } else {
5460                 mptsas_rpdoneq_add(mpt, rpqp, cmd);
5461         }
5462 }
5463 
5464 static void
5465 mptsas_handle_address_reply(mptsas_t *mpt,
5466     pMpi2ReplyDescriptorsUnion_t reply_desc)
5467 {
5468         pMpi2AddressReplyDescriptor_t   address_reply;
5469         pMPI2DefaultReply_t             reply;
5470         mptsas_fw_diagnostic_buffer_t   *pBuffer;
5471         uint32_t                        reply_addr, reply_frame_dma_baseaddr;
5472         uint16_t                        SMID, iocstatus;
5473         mptsas_slots_t                  *slots = mpt->m_active;
5474         mptsas_cmd_t                    *cmd = NULL;
5475         uint8_t                         function, buffer_type;
5476         m_replyh_arg_t                  *args;
5477         int                             reply_frame_no;
5478 
5479         ASSERT(mutex_owned(&mpt->m_mutex));
5480 
5481         address_reply = (pMpi2AddressReplyDescriptor_t)reply_desc;
5482         reply_addr = ddi_get32(mpt->m_acc_post_queue_hdl,
5483             &address_reply->ReplyFrameAddress);
5484         SMID = ddi_get16(mpt->m_acc_post_queue_hdl, &address_reply->SMID);
5485 
5486         /*
5487          * If reply frame is not in the proper range we should ignore this
5488          * message and exit the interrupt handler.
5489          */
5490         reply_frame_dma_baseaddr = mpt->m_reply_frame_dma_addr & 0xfffffffful;
5491         if ((reply_addr < reply_frame_dma_baseaddr) ||
5492             (reply_addr >= (reply_frame_dma_baseaddr +
5493             (mpt->m_reply_frame_size * mpt->m_max_replies))) ||
5494             ((reply_addr - reply_frame_dma_baseaddr) %
5495             mpt->m_reply_frame_size != 0)) {
5496                 mptsas_log(mpt, CE_WARN, "?Received invalid reply frame "
5497                     "address 0x%x\n", reply_addr);
5498                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
5499                 return;
5500         }
5501 
5502         (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
5503             DDI_DMA_SYNC_FORCPU);
5504         reply = (pMPI2DefaultReply_t)(mpt->m_reply_frame + (reply_addr -
5505             reply_frame_dma_baseaddr));
5506         function = ddi_get8(mpt->m_acc_reply_frame_hdl, &reply->Function);
5507 
5508         NDBG31(("mptsas_handle_address_reply: function 0x%x, reply_addr=0x%x",
5509             function, reply_addr));
5510 
5511         /*
5512          * don't get slot information and command for events since these values
5513          * don't exist
5514          */
5515         if ((function != MPI2_FUNCTION_EVENT_NOTIFICATION) &&
5516             (function != MPI2_FUNCTION_DIAG_BUFFER_POST)) {
5517                 /*
5518                  * This could be a TM reply, which use the last allocated SMID,
5519                  * so allow for that.
5520                  */
5521                 if ((SMID == 0) || (SMID > (slots->m_n_normal + 1))) {
5522                         mptsas_log(mpt, CE_WARN, "?Received invalid SMID of "
5523                             "%d\n", SMID);
5524                         ddi_fm_service_impact(mpt->m_dip,
5525                             DDI_SERVICE_UNAFFECTED);
5526                         return;
5527                 }
5528 
5529                 cmd = slots->m_slot[SMID];
5530 
5531                 /*
5532                  * print warning and return if the slot is empty
5533                  */
5534                 if (cmd == NULL) {
5535                         mptsas_log(mpt, CE_WARN, "?NULL command for address "
5536                             "reply in slot %d", SMID);
5537                         return;
5538                 }
5539                 if ((cmd->cmd_flags &
5540                     (CFLAG_PASSTHRU | CFLAG_CONFIG | CFLAG_FW_DIAG))) {
5541                         cmd->cmd_rfm = reply_addr;
5542                         cmd->cmd_flags |= CFLAG_FINISHED;
5543                         cv_broadcast(&mpt->m_passthru_cv);
5544                         cv_broadcast(&mpt->m_config_cv);
5545                         cv_broadcast(&mpt->m_fw_diag_cv);
5546                         return;
5547                 } else if (!(cmd->cmd_flags & CFLAG_FW_CMD)) {
5548                         mptsas_remove_cmd(mpt, cmd);
5549                 }
5550                 NDBG31(("\t\tmptsas_process_intr: slot=%d", SMID));
5551         }
5552         /*
5553          * Depending on the function, we need to handle
5554          * the reply frame (and cmd) differently.
5555          */
5556         switch (function) {
5557         case MPI2_FUNCTION_SCSI_IO_REQUEST:
5558                 mptsas_check_scsi_io_error(mpt, (pMpi2SCSIIOReply_t)reply, cmd);
5559                 break;
5560         case MPI2_FUNCTION_SCSI_TASK_MGMT:
5561                 cmd->cmd_rfm = reply_addr;
5562                 mptsas_check_task_mgt(mpt, (pMpi2SCSIManagementReply_t)reply,
5563                     cmd);
5564                 break;
5565         case MPI2_FUNCTION_FW_DOWNLOAD:
5566                 cmd->cmd_flags |= CFLAG_FINISHED;
5567                 cv_signal(&mpt->m_fw_cv);
5568                 break;
5569         case MPI2_FUNCTION_EVENT_NOTIFICATION:
5570                 reply_frame_no = (reply_addr - reply_frame_dma_baseaddr) /
5571                     mpt->m_reply_frame_size;
5572                 args = &mpt->m_replyh_args[reply_frame_no];
5573                 args->mpt = (void *)mpt;
5574                 args->rfm = reply_addr;
5575 
5576                 /*
5577                  * Record the event if its type is enabled in
5578                  * this mpt instance by ioctl.
5579                  */
5580                 mptsas_record_event(args);
5581 
5582                 /*
5583                  * Handle time critical events
5584                  * NOT_RESPONDING/ADDED only now
5585                  */
5586                 if (mptsas_handle_event_sync(args) == DDI_SUCCESS) {
5587                         /*
5588                          * Would not return main process,
5589                          * just let taskq resolve ack action
5590                          * and ack would be sent in taskq thread
5591                          */
5592                         NDBG20(("send mptsas_handle_event_sync success"));
5593                 }
5594 
5595                 if (mpt->m_in_reset) {
5596                         NDBG20(("dropping event received during reset"));
5597                         return;
5598                 }
5599 
5600                 if ((ddi_taskq_dispatch(mpt->m_event_taskq, mptsas_handle_event,
5601                     (void *)args, DDI_NOSLEEP)) != DDI_SUCCESS) {
5602                         mptsas_log(mpt, CE_WARN, "No memory available"
5603                         "for dispatch taskq");
5604                         /*
5605                          * Return the reply frame to the free queue.
5606                          */
5607                         ddi_put32(mpt->m_acc_free_queue_hdl,
5608                             &((uint32_t *)(void *)
5609                             mpt->m_free_queue)[mpt->m_free_index], reply_addr);
5610                         (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
5611                             DDI_DMA_SYNC_FORDEV);
5612                         if (++mpt->m_free_index == mpt->m_free_queue_depth) {
5613                                 mpt->m_free_index = 0;
5614                         }
5615 
5616                         ddi_put32(mpt->m_datap,
5617                             &mpt->m_reg->ReplyFreeHostIndex, mpt->m_free_index);
5618                 }
5619                 return;
5620         case MPI2_FUNCTION_DIAG_BUFFER_POST:
5621                 /*
5622                  * If SMID is 0, this implies that the reply is due to a
5623                  * release function with a status that the buffer has been
5624                  * released.  Set the buffer flags accordingly.
5625                  */
5626                 if (SMID == 0) {
5627                         iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
5628                             &reply->IOCStatus);
5629                         buffer_type = ddi_get8(mpt->m_acc_reply_frame_hdl,
5630                             &(((pMpi2DiagBufferPostReply_t)reply)->BufferType));
5631                         if (iocstatus == MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) {
5632                                 pBuffer =
5633                                     &mpt->m_fw_diag_buffer_list[buffer_type];
5634                                 pBuffer->valid_data = TRUE;
5635                                 pBuffer->owned_by_firmware = FALSE;
5636                                 pBuffer->immediate = FALSE;
5637                         }
5638                 } else {
5639                         /*
5640                          * Normal handling of diag post reply with SMID.
5641                          */
5642                         cmd = slots->m_slot[SMID];
5643 
5644                         /*
5645                          * print warning and return if the slot is empty
5646                          */
5647                         if (cmd == NULL) {
5648                                 mptsas_log(mpt, CE_WARN, "?NULL command for "
5649                                     "address reply in slot %d", SMID);
5650                                 return;
5651                         }
5652                         cmd->cmd_rfm = reply_addr;
5653                         cmd->cmd_flags |= CFLAG_FINISHED;
5654                         cv_broadcast(&mpt->m_fw_diag_cv);
5655                 }
5656                 return;
5657         default:
5658                 mptsas_log(mpt, CE_WARN, "Unknown function 0x%x ", function);
5659                 break;
5660         }
5661 
5662         /*
5663          * Return the reply frame to the free queue.
5664          */
5665         ddi_put32(mpt->m_acc_free_queue_hdl,
5666             &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
5667             reply_addr);
5668         (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
5669             DDI_DMA_SYNC_FORDEV);
5670         if (++mpt->m_free_index == mpt->m_free_queue_depth) {
5671                 mpt->m_free_index = 0;
5672         }
5673         ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
5674             mpt->m_free_index);
5675 
5676         if (cmd->cmd_flags & CFLAG_FW_CMD)
5677                 return;
5678 
5679         if (cmd->cmd_flags & CFLAG_RETRY) {
5680                 /*
5681                  * The target returned QFULL or busy, do not add this
5682                  * pkt to the doneq since the hba will retry
5683                  * this cmd.
5684                  *
5685                  * The pkt has already been resubmitted in
5686                  * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5687                  * Remove this cmd_flag here.
5688                  */
5689                 cmd->cmd_flags &= ~CFLAG_RETRY;
5690         } else {
5691                 mptsas_doneq_add(mpt, cmd);
5692         }
5693 }
5694 
5695 #ifdef MPTSAS_DEBUG
5696 static uint8_t mptsas_last_sense[256];
5697 #endif
5698 
5699 static void
5700 mptsas_check_scsi_io_error(mptsas_t *mpt, pMpi2SCSIIOReply_t reply,
5701     mptsas_cmd_t *cmd)
5702 {
5703         uint8_t                 scsi_status, scsi_state;
5704         uint16_t                ioc_status, cmd_rqs_len;
5705         uint32_t                xferred, sensecount, responsedata, loginfo = 0;
5706         struct scsi_pkt         *pkt;
5707         struct scsi_arq_status  *arqstat;
5708         mptsas_target_t         *ptgt = cmd->cmd_tgt_addr;
5709         uint8_t                 *sensedata = NULL;
5710         uint64_t                sas_wwn;
5711         uint8_t                 phy;
5712         char                    wwn_str[MPTSAS_WWN_STRLEN];
5713 
5714         scsi_status = ddi_get8(mpt->m_acc_reply_frame_hdl, &reply->SCSIStatus);
5715         ioc_status = ddi_get16(mpt->m_acc_reply_frame_hdl, &reply->IOCStatus);
5716         scsi_state = ddi_get8(mpt->m_acc_reply_frame_hdl, &reply->SCSIState);
5717         xferred = ddi_get32(mpt->m_acc_reply_frame_hdl, &reply->TransferCount);
5718         sensecount = ddi_get32(mpt->m_acc_reply_frame_hdl, &reply->SenseCount);
5719         responsedata = ddi_get32(mpt->m_acc_reply_frame_hdl,
5720             &reply->ResponseInfo);
5721 
5722         if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
5723                 sas_wwn = ptgt->m_addr.mta_wwn;
5724                 phy = ptgt->m_phynum;
5725                 if (sas_wwn == 0) {
5726                         (void) sprintf(wwn_str, "p%x", phy);
5727                 } else {
5728                         (void) sprintf(wwn_str, "w%016"PRIx64, sas_wwn);
5729                 }
5730                 loginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
5731                     &reply->IOCLogInfo);
5732                 mptsas_log(mpt, CE_NOTE,
5733                     "?Log info 0x%x received for target %d %s.\n"
5734                     "\tscsi_status=0x%x, ioc_status=0x%x, scsi_state=0x%x",
5735                     loginfo, Tgt(cmd), wwn_str, scsi_status, ioc_status,
5736                     scsi_state);
5737         }
5738 
5739         NDBG31(("\t\tscsi_status=0x%x, ioc_status=0x%x, scsi_state=0x%x",
5740             scsi_status, ioc_status, scsi_state));
5741 
5742         pkt = CMD2PKT(cmd);
5743         *(pkt->pkt_scbp) = scsi_status;
5744 
5745         if (loginfo == 0x31170000) {
5746                 /*
5747                  * if loginfo PL_LOGINFO_CODE_IO_DEVICE_MISSING_DELAY_RETRY
5748                  * 0x31170000 comes, that means the device missing delay
5749                  * is in progressing, the command need retry later.
5750                  */
5751                 *(pkt->pkt_scbp) = STATUS_BUSY;
5752                 return;
5753         }
5754 
5755         if ((scsi_state & MPI2_SCSI_STATE_NO_SCSI_STATUS) &&
5756             ((ioc_status & MPI2_IOCSTATUS_MASK) ==
5757             MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE)) {
5758                 pkt->pkt_reason = CMD_INCOMPLETE;
5759                 pkt->pkt_state |= STATE_GOT_BUS;
5760                 mutex_enter(&ptgt->m_t_mutex);
5761                 if (ptgt->m_reset_delay == 0) {
5762                         mptsas_set_throttle(mpt, ptgt,
5763                             DRAIN_THROTTLE);
5764                 }
5765                 mutex_exit(&ptgt->m_t_mutex);
5766                 return;
5767         }
5768 
5769         if (scsi_state & MPI2_SCSI_STATE_RESPONSE_INFO_VALID) {
5770                 responsedata &= 0x000000FF;
5771                 if (responsedata & MPTSAS_SCSI_RESPONSE_CODE_TLR_OFF) {
5772                         mptsas_log(mpt, CE_NOTE, "Do not support the TLR\n");
5773                         pkt->pkt_reason = CMD_TLR_OFF;
5774                         return;
5775                 }
5776         }
5777 
5778 
5779         switch (scsi_status) {
5780         case MPI2_SCSI_STATUS_CHECK_CONDITION:
5781                 (void) ddi_dma_sync(mpt->m_dma_req_sense_hdl, 0, 0,
5782                     DDI_DMA_SYNC_FORCPU);
5783                 pkt->pkt_resid = (cmd->cmd_dmacount - xferred);
5784                 arqstat = (void*)(pkt->pkt_scbp);
5785                 arqstat->sts_rqpkt_status = *((struct scsi_status *)
5786                     (pkt->pkt_scbp));
5787                 pkt->pkt_state |= (STATE_GOT_BUS | STATE_GOT_TARGET |
5788                     STATE_SENT_CMD | STATE_GOT_STATUS | STATE_ARQ_DONE);
5789                 if (cmd->cmd_flags & CFLAG_XARQ) {
5790                         pkt->pkt_state |= STATE_XARQ_DONE;
5791                 }
5792                 if (pkt->pkt_resid != cmd->cmd_dmacount) {
5793                         pkt->pkt_state |= STATE_XFERRED_DATA;
5794                 }
5795                 arqstat->sts_rqpkt_reason = pkt->pkt_reason;
5796                 arqstat->sts_rqpkt_state  = pkt->pkt_state;
5797                 arqstat->sts_rqpkt_state |= STATE_XFERRED_DATA;
5798                 arqstat->sts_rqpkt_statistics = pkt->pkt_statistics;
5799                 sensedata = (uint8_t *)&arqstat->sts_sensedata;
5800 #ifdef MPTSAS_DEBUG
5801                 bcopy((uchar_t *)cmd->cmd_arq_buf, mptsas_last_sense,
5802                     cmd->cmd_rqslen);
5803 #endif
5804                 if (cmd->cmd_extrqslen != 0) {
5805                         cmd_rqs_len = cmd->cmd_extrqslen;
5806                 } else {
5807                         cmd_rqs_len = cmd->cmd_rqslen;
5808                 }
5809                 bcopy((uchar_t *)cmd->cmd_arq_buf, sensedata,
5810                     ((cmd->cmd_rqslen >= sensecount) ? sensecount :
5811                     cmd_rqs_len));
5812                 arqstat->sts_rqpkt_resid = (cmd_rqs_len - sensecount);
5813                 cmd->cmd_flags |= CFLAG_CMDARQ;
5814                 /*
5815                  * Set proper status for pkt if autosense was valid
5816                  */
5817                 if (scsi_state & MPI2_SCSI_STATE_AUTOSENSE_VALID) {
5818                         struct scsi_status zero_status = { 0 };
5819                         arqstat->sts_rqpkt_status = zero_status;
5820                 }
5821 
5822                 /*
5823                  * ASC=0x47 is parity error
5824                  * ASC=0x48 is initiator detected error received
5825                  */
5826                 if ((scsi_sense_key(sensedata) == KEY_ABORTED_COMMAND) &&
5827                     ((scsi_sense_asc(sensedata) == 0x47) ||
5828                     (scsi_sense_asc(sensedata) == 0x48))) {
5829                         mptsas_log(mpt, CE_NOTE, "Aborted_command!");
5830                 }
5831 
5832                 /*
5833                  * ASC/ASCQ=0x3F/0x0E means report_luns data changed
5834                  * ASC/ASCQ=0x25/0x00 means invalid lun
5835                  */
5836                 if (((scsi_sense_key(sensedata) == KEY_UNIT_ATTENTION) &&
5837                     (scsi_sense_asc(sensedata) == 0x3F) &&
5838                     (scsi_sense_ascq(sensedata) == 0x0E)) ||
5839                     ((scsi_sense_key(sensedata) == KEY_ILLEGAL_REQUEST) &&
5840                     (scsi_sense_asc(sensedata) == 0x25) &&
5841                     (scsi_sense_ascq(sensedata) == 0x00))) {
5842                         mptsas_topo_change_list_t *topo_node = NULL;
5843 
5844                         topo_node = kmem_zalloc(
5845                             sizeof (mptsas_topo_change_list_t),
5846                             KM_NOSLEEP);
5847                         if (topo_node == NULL) {
5848                                 mptsas_log(mpt, CE_NOTE, "No memory"
5849                                     "resource for handle SAS dynamic"
5850                                     "reconfigure.\n");
5851                                 break;
5852                         }
5853                         topo_node->mpt = mpt;
5854                         topo_node->event = MPTSAS_DR_EVENT_RECONFIG_TARGET;
5855                         topo_node->un.phymask = ptgt->m_addr.mta_phymask;
5856                         topo_node->devhdl = ptgt->m_devhdl;
5857                         topo_node->object = (void *)ptgt;
5858                         topo_node->flags = MPTSAS_TOPO_FLAG_LUN_ASSOCIATED;
5859 
5860                         if ((ddi_taskq_dispatch(mpt->m_dr_taskq,
5861                             mptsas_handle_dr,
5862                             (void *)topo_node,
5863                             DDI_NOSLEEP)) != DDI_SUCCESS) {
5864                                 kmem_free(topo_node,
5865                                     sizeof (mptsas_topo_change_list_t));
5866                                 mptsas_log(mpt, CE_NOTE, "mptsas start taskq"
5867                                     "for handle SAS dynamic reconfigure"
5868                                     "failed. \n");
5869                         }
5870                 }
5871                 break;
5872         case MPI2_SCSI_STATUS_GOOD:
5873                 switch (ioc_status & MPI2_IOCSTATUS_MASK) {
5874                 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
5875                         pkt->pkt_reason = CMD_DEV_GONE;
5876                         pkt->pkt_state |= STATE_GOT_BUS;
5877                         mutex_enter(&ptgt->m_t_mutex);
5878                         if (ptgt->m_reset_delay == 0) {
5879                                 mptsas_set_throttle(mpt, ptgt, DRAIN_THROTTLE);
5880                         }
5881                         mutex_exit(&ptgt->m_t_mutex);
5882                         NDBG31(("lost disk for target%d, command:%x",
5883                             Tgt(cmd), pkt->pkt_cdbp[0]));
5884                         break;
5885                 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
5886                         NDBG31(("data overrun: xferred=%d", xferred));
5887                         NDBG31(("dmacount=%d", cmd->cmd_dmacount));
5888                         pkt->pkt_reason = CMD_DATA_OVR;
5889                         pkt->pkt_state |= (STATE_GOT_BUS | STATE_GOT_TARGET
5890                             | STATE_SENT_CMD | STATE_GOT_STATUS
5891                             | STATE_XFERRED_DATA);
5892                         pkt->pkt_resid = 0;
5893                         break;
5894                 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
5895                 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
5896                         NDBG31(("data underrun: xferred=%d", xferred));
5897                         NDBG31(("dmacount=%d", cmd->cmd_dmacount));
5898                         pkt->pkt_state |= (STATE_GOT_BUS | STATE_GOT_TARGET
5899                             | STATE_SENT_CMD | STATE_GOT_STATUS);
5900                         pkt->pkt_resid = (cmd->cmd_dmacount - xferred);
5901                         if (pkt->pkt_resid != cmd->cmd_dmacount) {
5902                                 pkt->pkt_state |= STATE_XFERRED_DATA;
5903                         }
5904                         break;
5905                 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
5906                         if (cmd->cmd_active_expiration <= gethrtime()) {
5907                                 /*
5908                                  * When timeout requested, propagate
5909                                  * proper reason and statistics to
5910                                  * target drivers.
5911                                  */
5912                                 mptsas_set_pkt_reason(mpt, cmd, CMD_TIMEOUT,
5913                                     STAT_BUS_RESET | STAT_TIMEOUT);
5914                         } else {
5915                                 mptsas_set_pkt_reason(mpt, cmd, CMD_RESET,
5916                                     STAT_BUS_RESET);
5917                         }
5918                         break;
5919                 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
5920                 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
5921                         mptsas_set_pkt_reason(mpt,
5922                             cmd, CMD_RESET, STAT_DEV_RESET);
5923                         break;
5924                 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
5925                 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
5926                         pkt->pkt_state |= (STATE_GOT_BUS | STATE_GOT_TARGET);
5927                         mptsas_set_pkt_reason(mpt,
5928                             cmd, CMD_TERMINATED, STAT_TERMINATED);
5929                         break;
5930                 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
5931                 case MPI2_IOCSTATUS_BUSY:
5932                         /*
5933                          * set throttles to drain
5934                          */
5935                         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
5936                             ptgt = refhash_next(mpt->m_targets, ptgt)) {
5937                                 mptsas_set_throttle_mtx(mpt, ptgt,
5938                                     DRAIN_THROTTLE);
5939                         }
5940 
5941                         /*
5942                          * retry command
5943                          */
5944                         mptsas_retry_pkt(mpt, cmd);
5945                         break;
5946                 default:
5947                         mptsas_log(mpt, CE_WARN,
5948                             "unknown ioc_status = %x\n", ioc_status);
5949                         mptsas_log(mpt, CE_CONT, "scsi_state = %x, transfer "
5950                             "count = %x, scsi_status = %x", scsi_state,
5951                             xferred, scsi_status);
5952                         break;
5953                 }
5954                 break;
5955         case MPI2_SCSI_STATUS_TASK_SET_FULL:
5956                 mptsas_handle_qfull(mpt, cmd);
5957                 break;
5958         case MPI2_SCSI_STATUS_BUSY:
5959                 NDBG31(("scsi_status busy received"));
5960                 break;
5961         case MPI2_SCSI_STATUS_RESERVATION_CONFLICT:
5962                 NDBG31(("scsi_status reservation conflict received"));
5963                 break;
5964         default:
5965                 mptsas_log(mpt, CE_WARN, "scsi_status=%x, ioc_status=%x\n",
5966                     scsi_status, ioc_status);
5967                 mptsas_log(mpt, CE_WARN,
5968                     "mptsas_process_intr: invalid scsi status\n");
5969                 break;
5970         }
5971 }
5972 
5973 static void
5974 mptsas_check_task_mgt(mptsas_t *mpt, pMpi2SCSIManagementReply_t reply,
5975         mptsas_cmd_t *cmd)
5976 {
5977         uint8_t         task_type;
5978         uint16_t        ioc_status;
5979         uint32_t        log_info;
5980         uint16_t        dev_handle;
5981         struct scsi_pkt *pkt = CMD2PKT(cmd);
5982 
5983         task_type = ddi_get8(mpt->m_acc_reply_frame_hdl, &reply->TaskType);
5984         ioc_status = ddi_get16(mpt->m_acc_reply_frame_hdl, &reply->IOCStatus);
5985         log_info = ddi_get32(mpt->m_acc_reply_frame_hdl, &reply->IOCLogInfo);
5986         dev_handle = ddi_get16(mpt->m_acc_reply_frame_hdl, &reply->DevHandle);
5987 
5988         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
5989                 mptsas_log(mpt, CE_WARN, "mptsas_check_task_mgt: Task 0x%x "
5990                     "failed. IOCStatus=0x%x IOCLogInfo=0x%x target=%d\n",
5991                     task_type, ioc_status, log_info, dev_handle);
5992                 pkt->pkt_reason = CMD_INCOMPLETE;
5993                 return;
5994         }
5995 
5996         switch (task_type) {
5997         case MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK:
5998         case MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET:
5999         case MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK:
6000         case MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA:
6001         case MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET:
6002         case MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION:
6003                 break;
6004         case MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET:
6005         case MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET:
6006         case MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET:
6007                 /*
6008                  * Check for invalid DevHandle of 0 in case application
6009                  * sends bad command.  DevHandle of 0 could cause problems.
6010                  */
6011                 if (dev_handle == 0) {
6012                         mptsas_log(mpt, CE_WARN, "!Can't flush target with"
6013                             " DevHandle of 0.");
6014                 } else {
6015                         mptsas_flush_target(mpt, dev_handle, Lun(cmd),
6016                             task_type);
6017                 }
6018                 break;
6019         default:
6020                 mptsas_log(mpt, CE_WARN, "Unknown task management type %d.",
6021                     task_type);
6022                 mptsas_log(mpt, CE_WARN, "ioc status = %x", ioc_status);
6023                 break;
6024         }
6025 }
6026 
6027 static void
6028 mptsas_doneq_thread(mptsas_thread_arg_t *arg)
6029 {
6030         mptsas_t                        *mpt = arg->mpt;
6031         uint32_t                        t = arg->t;
6032         mptsas_cmd_t                    *cmd;
6033         struct scsi_pkt                 *pkt;
6034         mptsas_doneq_thread_list_t      *item = &mpt->m_doneq_thread_id[t];
6035 
6036         mutex_enter(&item->mutex);
6037         while (item->flag & MPTSAS_DONEQ_THREAD_ACTIVE) {
6038                 if (!item->dlist.dl_q) {
6039                         cv_wait(&item->cv, &item->mutex);
6040                 }
6041                 pkt = NULL;
6042                 if ((cmd = mptsas_doneq_thread_rm(mpt, t)) != NULL) {
6043                         cmd->cmd_flags |= CFLAG_COMPLETED;
6044                         pkt = CMD2PKT(cmd);
6045                 }
6046                 mutex_exit(&item->mutex);
6047                 if (pkt) {
6048                         mptsas_pkt_comp(pkt, cmd);
6049                 }
6050                 mutex_enter(&item->mutex);
6051         }
6052         mutex_exit(&item->mutex);
6053         mutex_enter(&mpt->m_qthread_mutex);
6054         mpt->m_doneq_thread_n--;
6055         cv_broadcast(&mpt->m_qthread_cv);
6056         mutex_exit(&mpt->m_qthread_mutex);
6057 }
6058 
6059 
6060 /*
6061  * mpt interrupt handler.
6062  */
6063 static uint_t
6064 mptsas_intr(caddr_t arg1, caddr_t arg2)
6065 {
6066         mptsas_t                        *mpt = (void *)arg1;
6067         mptsas_reply_pqueue_t           *rpqp;
6068         int                             reply_q = (int)(uintptr_t)arg2;
6069         pMpi2ReplyDescriptorsUnion_t    reply_desc_union;
6070         int                             found = 0, i, rpqidx;
6071         size_t                          dma_sync_len;
6072         off_t                           dma_sync_offset;
6073         uint32_t                        istat;
6074 
6075         NDBG18(("mptsas_intr: arg1 0x%p reply_q 0x%d", (void *)arg1, reply_q));
6076 
6077         rpqp = &mpt->m_rep_post_queues[reply_q];
6078 
6079         /*
6080          * If interrupts are shared by two channels then check whether this
6081          * interrupt is genuinely for this channel by making sure first the
6082          * chip is in high power state.
6083          */
6084         if ((mpt->m_options & MPTSAS_OPT_PM) &&
6085             (mpt->m_power_level != PM_LEVEL_D0)) {
6086                 mpt->m_unclaimed_pm_interrupt_count++;
6087                 return (DDI_INTR_UNCLAIMED);
6088         }
6089 
6090         istat = MPTSAS_GET_ISTAT(mpt);
6091         if (!(istat & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT)) {
6092                 NDBG18(("Interrupt bit not set, istat 0x%x", istat));
6093                 mpt->m_unclaimed_no_interrupt_count++;
6094                 /*
6095                  * Really need a good definition of when this is valid.
6096                  * It appears not to be if you have multiple reply post
6097                  * queues, there may be a better way - need LSI info.
6098                  * For now just count them.
6099                  */
6100 #if 0
6101                 return (DDI_INTR_UNCLAIMED);
6102 #endif
6103         }
6104 
6105         /*
6106          * If polling, interrupt was triggered by some shared interrupt because
6107          * IOC interrupts are disabled during polling, so polling routine will
6108          * handle any replies.  Considering this, if polling is happening,
6109          * return with interrupt unclaimed.
6110          */
6111         if (mpt->m_polled_intr) {
6112                 mptsas_log(mpt, CE_WARN,
6113                     "Unclaimed interrupt, rpq %d (Polling), istat 0x%x",
6114                     reply_q, istat);
6115                 mpt->m_unclaimed_polled_interrupt_count++;
6116                 return (DDI_INTR_UNCLAIMED);
6117         }
6118 
6119         /*
6120          * At the moment this is the only place the mutex is grabbed.
6121          * So it should never fail!
6122          */
6123         if (mutex_tryenter(&rpqp->rpq_mutex) == 0) {
6124                 mutex_enter(&rpqp->rpq_mutex);
6125                 rpqp->rpq_intr_mutexbusy++;
6126         }
6127 
6128         dma_sync_len = mpt->m_post_queue_depth * 8;
6129         dma_sync_offset = dma_sync_len * reply_q;
6130         (void) ddi_dma_sync(mpt->m_dma_post_queue_hdl,
6131             dma_sync_offset, dma_sync_len, DDI_DMA_SYNC_FORCPU);
6132 
6133         /*
6134          * Go around the reply queue and process each descriptor until
6135          * we get to the next unused one.
6136          * It seems to be an occupational hazard that we get interrupts
6137          * with nothing to do. These are counted below.
6138          */
6139         rpqidx = rpqp->rpq_index;
6140 #ifndef __lock_lint
6141         _NOTE(CONSTCOND)
6142 #endif
6143         while (TRUE) {
6144                 reply_desc_union = (pMpi2ReplyDescriptorsUnion_t)
6145                     MPTSAS_GET_NEXT_REPLY(rpqp, rpqidx);
6146 
6147                 if (ddi_get32(mpt->m_acc_post_queue_hdl,
6148                     &reply_desc_union->Words.Low) == 0xFFFFFFFF ||
6149                     ddi_get32(mpt->m_acc_post_queue_hdl,
6150                     &reply_desc_union->Words.High) == 0xFFFFFFFF) {
6151                         break;
6152                 }
6153 
6154                 found++;
6155 
6156                 ASSERT(ddi_get8(mpt->m_acc_post_queue_hdl,
6157                     &reply_desc_union->Default.MSIxIndex) == reply_q);
6158 
6159                 /*
6160                  * Process it according to its type.
6161                  */
6162                 mptsas_process_intr(mpt, rpqp, reply_desc_union);
6163 
6164                 /*
6165                  * Clear the reply descriptor for re-use.
6166                  */
6167                 ddi_put64(mpt->m_acc_post_queue_hdl,
6168                     &((uint64_t *)(void *)rpqp->rpq_queue)[rpqidx],
6169                     0xFFFFFFFFFFFFFFFF);
6170 
6171                 /*
6172                  * Increment post index and roll over if needed.
6173                  */
6174                 if (++rpqidx == mpt->m_post_queue_depth) {
6175                         rpqidx = 0;
6176                 }
6177         }
6178 
6179         if (found == 0) {
6180                 rpqp->rpq_intr_unclaimed++;
6181                 mutex_exit(&rpqp->rpq_mutex);
6182                 mpt->m_unclaimed_nocmd_interrupt_count++;
6183                 return (DDI_INTR_UNCLAIMED);
6184         }
6185         rpqp->rpq_index = rpqidx;
6186 
6187         rpqp->rpq_intr_count++;
6188         NDBG18(("mptsas_intr complete(%d), did %d loops", reply_q, found));
6189 
6190         (void) ddi_dma_sync(mpt->m_dma_post_queue_hdl,
6191             dma_sync_offset, dma_sync_len, DDI_DMA_SYNC_FORDEV);
6192 
6193         mpt->m_interrupt_count++;
6194 
6195         /*
6196          * Update the reply index if at least one reply was processed.
6197          * For more than 8 reply queues on SAS3 controllers we have to do
6198          * things a little different. See Chapter 20 in the MPI 2.5 spec.
6199          */
6200         if (mpt->m_post_reply_qcount > 8) {
6201                 /*
6202                  * The offsets from the base are multiples of 0x10.
6203                  * We are indexing into 32 bit quantities so calculate
6204                  * the index for that.
6205                  */
6206                 i = (reply_q&~0x7) >> 1;
6207                 ddi_put32(mpt->m_datap,
6208                     &mpt->m_reg->SuppReplyPostHostIndex[i],
6209                     rpqp->rpq_index |
6210                     ((reply_q&0x7)<<MPI2_RPHI_MSIX_INDEX_SHIFT));
6211                 (void) ddi_get32(mpt->m_datap,
6212                     &mpt->m_reg->SuppReplyPostHostIndex[i]);
6213         } else {
6214                 ddi_put32(mpt->m_datap,
6215                     &mpt->m_reg->ReplyPostHostIndex,
6216                     rpqp->rpq_index | (reply_q<<MPI2_RPHI_MSIX_INDEX_SHIFT));
6217                 (void) ddi_get32(mpt->m_datap,
6218                     &mpt->m_reg->ReplyPostHostIndex);
6219         }
6220 
6221         /*
6222          * If no helper threads are created, process the doneq in ISR. If
6223          * helpers are created, use the doneq length as a metric to measure the
6224          * load on the interrupt CPU. If it is long enough, which indicates the
6225          * load is heavy, then we deliver the IO completions to the helpers.
6226          * This measurement has some limitations, although it is simple and
6227          * straightforward and works well for most of the cases at present.
6228          * To always use the threads set mptsas_doneq_length_threshold_prop
6229          * to zero in the mpt_sas3.conf file.
6230          *
6231          * Check the current reply queue done queue.
6232          */
6233         if (rpqp->rpq_dlist.dl_len) {
6234                 if (!mpt->m_doneq_thread_n ||
6235                     (rpqp->rpq_dlist.dl_len <= mpt->m_doneq_length_threshold)) {
6236                         mptsas_rpdoneq_empty(rpqp);
6237                 } else {
6238                         mptsas_deliver_doneq_thread(mpt, &rpqp->rpq_dlist);
6239                 }
6240         }
6241 
6242         mutex_exit(&rpqp->rpq_mutex);
6243 
6244         /*
6245          * Check the main done queue. If we find something
6246          * grab the mutex and check again before processing.
6247          */
6248         if (mpt->m_dlist.dl_len) {
6249                 mutex_enter(&mpt->m_mutex);
6250                 if (mpt->m_dlist.dl_len) {
6251                         if (!mpt->m_doneq_thread_n ||
6252                             (mpt->m_dlist.dl_len <=
6253                             mpt->m_doneq_length_threshold)) {
6254                                 mptsas_doneq_empty(mpt);
6255                         } else {
6256                                 mptsas_deliver_doneq_thread(mpt, &mpt->m_dlist);
6257                         }
6258                 }
6259                 mutex_exit(&mpt->m_mutex);
6260         }
6261 
6262         /*
6263          * If there are queued cmd, start them now.
6264          */
6265         if (mpt->m_waitq != NULL) {
6266                 mutex_enter(&mpt->m_mutex);
6267                 if (mpt->m_waitq != NULL && mpt->m_polled_intr == 0) {
6268                         mptsas_restart_waitq(mpt);
6269                 }
6270                 mutex_exit(&mpt->m_mutex);
6271         }
6272         return (DDI_INTR_CLAIMED);
6273 }
6274 
6275 static void
6276 mptsas_process_intr(mptsas_t *mpt, mptsas_reply_pqueue_t *rpqp,
6277     pMpi2ReplyDescriptorsUnion_t reply_desc_union)
6278 {
6279         uint8_t reply_type;
6280 
6281         /*
6282          * Should get here with the reply queue mutex held, but not
6283          * the main mpt mutex. Want to avoid grabbing that during
6284          * normal operations if possible.
6285          */
6286         ASSERT(mutex_owned(&rpqp->rpq_mutex));
6287 
6288         /*
6289          * The reply is valid, process it according to its
6290          * type.  Also, set a flag for updated the reply index
6291          * after they've all been processed.
6292          */
6293         reply_type = ddi_get8(mpt->m_acc_post_queue_hdl,
6294             &reply_desc_union->Default.ReplyFlags);
6295         NDBG18(("mptsas_process_intr(rpq %d) reply_type 0x%x", rpqp->rpq_num,
6296             reply_type));
6297         reply_type &= MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
6298         if (reply_type == MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS ||
6299             reply_type == MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS) {
6300                 mptsas_handle_scsi_io_success(mpt, rpqp, reply_desc_union);
6301         } else if (reply_type == MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
6302                 mutex_enter(&mpt->m_mutex);
6303                 mptsas_handle_address_reply(mpt, reply_desc_union);
6304                 mutex_exit(&mpt->m_mutex);
6305         } else {
6306                 mptsas_log(mpt, CE_WARN, "?Bad reply type %x", reply_type);
6307                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
6308         }
6309 }
6310 
6311 /*
6312  * handle qfull condition
6313  */
6314 static void
6315 mptsas_handle_qfull(mptsas_t *mpt, mptsas_cmd_t *cmd)
6316 {
6317         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
6318 
6319         mutex_enter(&ptgt->m_t_mutex);
6320         if ((++cmd->cmd_qfull_retries > ptgt->m_qfull_retries) ||
6321             (ptgt->m_qfull_retries == 0)) {
6322                 /*
6323                  * We have exhausted the retries on QFULL, or,
6324                  * the target driver has indicated that it
6325                  * wants to handle QFULL itself by setting
6326                  * qfull-retries capability to 0. In either case
6327                  * we want the target driver's QFULL handling
6328                  * to kick in. We do this by having pkt_reason
6329                  * as CMD_CMPLT and pkt_scbp as STATUS_QFULL.
6330                  */
6331                 mptsas_set_throttle(mpt, ptgt, DRAIN_THROTTLE);
6332         } else {
6333                 if (ptgt->m_reset_delay == 0) {
6334                         ptgt->m_t_throttle =
6335                             max((ptgt->m_t_ncmds - 2), 0);
6336                 }
6337                 mutex_exit(&ptgt->m_t_mutex);
6338 
6339                 cmd->cmd_flags &= ~(CFLAG_TRANFLAG);
6340 
6341                 mptsas_retry_pkt(mpt, cmd);
6342 
6343                 mutex_enter(&ptgt->m_t_mutex);
6344                 /*
6345                  * when target gives queue full status with no commands
6346                  * outstanding (m_t_ncmds == 0), throttle is set to 0
6347                  * (HOLD_THROTTLE), and the queue full handling start
6348                  * (see psarc/1994/313); if there are commands outstanding,
6349                  * throttle is set to (m_t_ncmds - 2)
6350                  */
6351                 if (ptgt->m_t_throttle == HOLD_THROTTLE) {
6352                         /*
6353                          * By setting throttle to QFULL_THROTTLE, we
6354                          * avoid submitting new commands and in
6355                          * mptsas_restart_cmd find out slots which need
6356                          * their throttles to be cleared.
6357                          */
6358                         mptsas_set_throttle(mpt, ptgt, QFULL_THROTTLE);
6359                         if (mpt->m_restart_cmd_timeid == 0) {
6360                                 mpt->m_restart_cmd_timeid =
6361                                     timeout(mptsas_restart_cmd, mpt,
6362                                     ptgt->m_qfull_retry_interval);
6363                         }
6364                 }
6365         }
6366         mutex_exit(&ptgt->m_t_mutex);
6367 }
6368 
6369 mptsas_phymask_t
6370 mptsas_physport_to_phymask(mptsas_t *mpt, uint8_t physport)
6371 {
6372         mptsas_phymask_t        phy_mask = 0;
6373         uint8_t                 i = 0;
6374 
6375         NDBG20(("mptsas3%d physport_to_phymask enter", mpt->m_instance));
6376 
6377         ASSERT(mutex_owned(&mpt->m_mutex));
6378 
6379         /*
6380          * If physport is 0xFF, this is a RAID volume.  Use phymask of 0.
6381          */
6382         if (physport == 0xFF) {
6383                 return (0);
6384         }
6385 
6386         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
6387                 if (mpt->m_phy_info[i].attached_devhdl &&
6388                     (mpt->m_phy_info[i].phy_mask != 0) &&
6389                     (mpt->m_phy_info[i].port_num == physport)) {
6390                         phy_mask = mpt->m_phy_info[i].phy_mask;
6391                         break;
6392                 }
6393         }
6394         NDBG20(("mptsas3%d physport_to_phymask:physport :%x phymask :%x, ",
6395             mpt->m_instance, physport, phy_mask));
6396         return (phy_mask);
6397 }
6398 
6399 /*
6400  * mpt free device handle after device gone, by use of passthrough
6401  */
6402 static int
6403 mptsas_free_devhdl(mptsas_t *mpt, uint16_t devhdl)
6404 {
6405         Mpi2SasIoUnitControlRequest_t   req;
6406         Mpi2SasIoUnitControlReply_t     rep;
6407         int                             ret;
6408 
6409         ASSERT(mutex_owned(&mpt->m_mutex));
6410 
6411         /*
6412          * Need to compose a SAS IO Unit Control request message
6413          * and call mptsas_do_passthru() function
6414          */
6415         bzero(&req, sizeof (req));
6416         bzero(&rep, sizeof (rep));
6417 
6418         req.Function = MPI2_FUNCTION_SAS_IO_UNIT_CONTROL;
6419         req.Operation = MPI2_SAS_OP_REMOVE_DEVICE;
6420         req.DevHandle = LE_16(devhdl);
6421 
6422         ret = mptsas_do_passthru(mpt, (uint8_t *)&req, (uint8_t *)&rep, NULL,
6423             sizeof (req), sizeof (rep), NULL, 0, NULL, 0, 60, FKIOCTL);
6424         if (ret != 0) {
6425                 cmn_err(CE_WARN, "mptsas_free_devhdl: passthru SAS IO Unit "
6426                     "Control error %d", ret);
6427                 return (DDI_FAILURE);
6428         }
6429 
6430         /* do passthrough success, check the ioc status */
6431         if (LE_16(rep.IOCStatus) != MPI2_IOCSTATUS_SUCCESS) {
6432                 cmn_err(CE_WARN, "mptsas_free_devhdl: passthru SAS IO Unit "
6433                     "Control IOCStatus %d", LE_16(rep.IOCStatus));
6434                 return (DDI_FAILURE);
6435         }
6436 
6437         return (DDI_SUCCESS);
6438 }
6439 
6440 static void
6441 mptsas_update_phymask(mptsas_t *mpt)
6442 {
6443         mptsas_phymask_t mask = 0, phy_mask;
6444         char            *phy_mask_name;
6445         uint8_t         current_port;
6446         int             i, j;
6447 
6448         NDBG20(("mptsas3%d update phymask ", mpt->m_instance));
6449 
6450         ASSERT(mutex_owned(&mpt->m_mutex));
6451 
6452         (void) mptsas_get_sas_io_unit_page(mpt);
6453 
6454         phy_mask_name = kmem_zalloc(MPTSAS_MAX_PHYS, KM_SLEEP);
6455 
6456         for (i = 0; i < mpt->m_num_phys; i++) {
6457                 phy_mask = 0x00;
6458 
6459                 if (mpt->m_phy_info[i].attached_devhdl == 0)
6460                         continue;
6461 
6462                 bzero(phy_mask_name, sizeof (phy_mask_name));
6463 
6464                 current_port = mpt->m_phy_info[i].port_num;
6465 
6466                 if ((mask & (1 << i)) != 0)
6467                         continue;
6468 
6469                 for (j = 0; j < mpt->m_num_phys; j++) {
6470                         if (mpt->m_phy_info[j].attached_devhdl &&
6471                             (mpt->m_phy_info[j].port_num == current_port)) {
6472                                 phy_mask |= (1 << j);
6473                         }
6474                 }
6475                 mask = mask | phy_mask;
6476 
6477                 for (j = 0; j < mpt->m_num_phys; j++) {
6478                         if ((phy_mask >> j) & 0x01) {
6479                                 mpt->m_phy_info[j].phy_mask = phy_mask;
6480                         }
6481                 }
6482 
6483                 (void) sprintf(phy_mask_name, "%x", phy_mask);
6484 
6485                 mutex_exit(&mpt->m_mutex);
6486                 /*
6487                  * register a iport, if the port has already been existed
6488                  * SCSA will do nothing and just return.
6489                  */
6490                 (void) scsi_hba_iport_register(mpt->m_dip, phy_mask_name);
6491                 mutex_enter(&mpt->m_mutex);
6492         }
6493         kmem_free(phy_mask_name, MPTSAS_MAX_PHYS);
6494         NDBG20(("mptsas3%d update phymask return", mpt->m_instance));
6495 }
6496 
6497 /*
6498  * mptsas_handle_dr is a task handler for DR, the DR action includes:
6499  * 1. Directly attched Device Added/Removed.
6500  * 2. Expander Device Added/Removed.
6501  * 3. Indirectly Attached Device Added/Expander.
6502  * 4. LUNs of a existing device status change.
6503  * 5. RAID volume created/deleted.
6504  * 6. Member of RAID volume is released because of RAID deletion.
6505  * 7. Physical disks are removed because of RAID creation.
6506  */
6507 static void
6508 mptsas_handle_dr(void *args) {
6509         mptsas_topo_change_list_t       *topo_node = NULL;
6510         mptsas_topo_change_list_t       *save_node = NULL;
6511         mptsas_t                        *mpt;
6512         dev_info_t                      *parent = NULL;
6513         mptsas_phymask_t                phymask = 0;
6514         char                            phy_mask_name[MPTSAS_MAX_PHYS];
6515         uint8_t                         flags = 0, physport = 0xff;
6516         uint8_t                         port_update = 0;
6517         uint_t                          event;
6518 
6519         topo_node = (mptsas_topo_change_list_t *)args;
6520 
6521         mpt = topo_node->mpt;
6522         event = topo_node->event;
6523         flags = topo_node->flags;
6524 
6525         NDBG20(("mptsas3%d handle_dr enter", mpt->m_instance));
6526 
6527         switch (event) {
6528         case MPTSAS_DR_EVENT_RECONFIG_TARGET:
6529                 if ((flags == MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE) ||
6530                     (flags == MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE) ||
6531                     (flags == MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED)) {
6532                         /*
6533                          * Direct attached or expander attached device added
6534                          * into system or a Phys Disk that is being unhidden.
6535                          */
6536                         port_update = 1;
6537                 }
6538                 break;
6539         case MPTSAS_DR_EVENT_RECONFIG_SMP:
6540                 /*
6541                  * New expander added into system, it must be the head
6542                  * of topo_change_list_t
6543                  */
6544                 port_update = 1;
6545                 break;
6546         default:
6547                 port_update = 0;
6548                 break;
6549         }
6550         /*
6551          * All cases port_update == 1 may cause initiator port form change
6552          */
6553         mutex_enter(&mpt->m_mutex);
6554         if (mpt->m_port_chng && port_update) {
6555                 /*
6556                  * mpt->m_port_chng flag indicates some PHYs of initiator
6557                  * port have changed to online. So when expander added or
6558                  * directly attached device online event come, we force to
6559                  * update port information by issueing SAS IO Unit Page and
6560                  * update PHYMASKs.
6561                  */
6562                 (void) mptsas_update_phymask(mpt);
6563                 mpt->m_port_chng = 0;
6564 
6565         }
6566         mutex_exit(&mpt->m_mutex);
6567 
6568         while (topo_node) {
6569                 phymask = 0;
6570                 flags = topo_node->flags;
6571                 event = topo_node->event;
6572                 if (event == MPTSAS_DR_EVENT_REMOVE_HANDLE) {
6573                         goto handle_topo_change;
6574                 }
6575                 if ((event == MPTSAS_DR_EVENT_RECONFIG_TARGET) &&
6576                     (flags == MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED)) {
6577                         /*
6578                          * There is no any field in IR_CONFIG_CHANGE
6579                          * event indicate physport/phynum, let's get
6580                          * parent after SAS Device Page0 request.
6581                          */
6582                         goto handle_topo_change;
6583                 }
6584 
6585                 if (parent == NULL) {
6586                         physport = topo_node->un.physport;
6587                         if (event & (MPTSAS_DR_EVENT_OFFLINE_TARGET |
6588                             MPTSAS_DR_EVENT_OFFLINE_SMP)) {
6589                                 /*
6590                                  * For all offline events, phymask is known
6591                                  */
6592                                 phymask = topo_node->un.phymask;
6593                                 goto find_parent;
6594                         }
6595                         if (flags & MPTSAS_TOPO_FLAG_LUN_ASSOCIATED) {
6596                                 phymask = topo_node->un.phymask;
6597                                 goto find_parent;
6598                         }
6599 
6600                         mutex_enter(&mpt->m_mutex);
6601                         if (flags == MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE) {
6602                                 /*
6603                                  * If the direct attached device added or a
6604                                  * phys disk is being unhidden, argument
6605                                  * physport actually is PHY#, so we have to get
6606                                  * phymask according PHY#.
6607                                  */
6608                                 physport = mpt->m_phy_info[physport].port_num;
6609                         }
6610 
6611                         /*
6612                          * Translate physport to phymask so that we can search
6613                          * parent dip.
6614                          */
6615                         phymask = mptsas_physport_to_phymask(mpt, physport);
6616                         mutex_exit(&mpt->m_mutex);
6617 
6618 find_parent:
6619                         bzero(phy_mask_name, MPTSAS_MAX_PHYS);
6620                         /*
6621                          * For RAID topology change node, write the iport name
6622                          * as v0.
6623                          */
6624                         if (flags & MPTSAS_TOPO_FLAG_RAID_ASSOCIATED) {
6625                                 (void) sprintf(phy_mask_name, "v0");
6626                         } else {
6627                                 /*
6628                                  * phymask can be 0 if the drive has been
6629                                  * pulled by the time an add event is
6630                                  * processed.  If phymask is 0, just skip this
6631                                  * event and continue.
6632                                  */
6633                                 if (phymask == 0) {
6634                                         save_node = topo_node;
6635                                         topo_node = topo_node->next;
6636                                         ASSERT(save_node);
6637                                         kmem_free(save_node,
6638                                             sizeof (mptsas_topo_change_list_t));
6639                                         parent = NULL;
6640                                         continue;
6641                                 }
6642                                 (void) sprintf(phy_mask_name, "%x", phymask);
6643                         }
6644                         parent = scsi_hba_iport_find(mpt->m_dip,
6645                             phy_mask_name);
6646                         if (parent == NULL) {
6647                                 mptsas_log(mpt, CE_WARN, "Failed to find an "
6648                                     "iport for \"%s\", should not happen!",
6649                                     phy_mask_name);
6650                                 save_node = topo_node;
6651                                 topo_node = topo_node->next;
6652                                 ASSERT(save_node);
6653                                 kmem_free(save_node,
6654                                     sizeof (mptsas_topo_change_list_t));
6655                                 continue;
6656                         }
6657 
6658                 }
6659                 ASSERT(parent);
6660 handle_topo_change:
6661 
6662                 mutex_enter(&mpt->m_mutex);
6663                 /*
6664                  * If HBA is being reset, don't perform operations depending
6665                  * on the IOC. We must free the topo list, however.
6666                  */
6667                 if (!mpt->m_in_reset)
6668                         mptsas_handle_topo_change(topo_node, parent);
6669                 else
6670                         NDBG20(("skipping topo change received during reset"));
6671                 mutex_exit(&mpt->m_mutex);
6672                 save_node = topo_node;
6673                 topo_node = topo_node->next;
6674                 ASSERT(save_node);
6675                 kmem_free(save_node, sizeof (mptsas_topo_change_list_t));
6676 
6677                 if ((flags == MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE) ||
6678                     (flags == MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED) ||
6679                     (flags == MPTSAS_TOPO_FLAG_RAID_ASSOCIATED)) {
6680                         /*
6681                          * If direct attached device associated, make sure
6682                          * reset the parent before start the next one. But
6683                          * all devices associated with expander shares the
6684                          * parent.  Also, reset parent if this is for RAID.
6685                          */
6686                         parent = NULL;
6687                 }
6688         }
6689 }
6690 
6691 static void
6692 mptsas_offline_target(mptsas_t *mpt, mptsas_target_t *ptgt,
6693     uint8_t topo_flags, dev_info_t *parent)
6694 {
6695         uint64_t        sas_wwn = 0;
6696         uint8_t         phy;
6697         char            wwn_str[MPTSAS_WWN_STRLEN];
6698         uint16_t        devhdl;
6699         int             circ = 0, circ1 = 0;
6700         int             rval = 0;
6701 
6702         sas_wwn = ptgt->m_addr.mta_wwn;
6703         phy = ptgt->m_phynum;
6704         devhdl = ptgt->m_devhdl;
6705 
6706         if (sas_wwn) {
6707                 (void) sprintf(wwn_str, "w%016"PRIx64, sas_wwn);
6708         } else {
6709                 (void) sprintf(wwn_str, "p%x", phy);
6710         }
6711 
6712         /*
6713          * Abort all outstanding command on the device
6714          */
6715         rval = mptsas_do_scsi_reset(mpt, devhdl);
6716         if (rval) {
6717                 NDBG20(("mptsas3%d: mptsas_offline_target: reset target "
6718                     "before offline devhdl:%x, phymask:%x, rval:%x",
6719                     mpt->m_instance, ptgt->m_devhdl,
6720                     ptgt->m_addr.mta_phymask, rval));
6721         }
6722 
6723         mutex_exit(&mpt->m_mutex);
6724 
6725         ndi_devi_enter(scsi_vhci_dip, &circ);
6726         ndi_devi_enter(parent, &circ1);
6727         rval = mptsas_offline_targetdev(parent, wwn_str);
6728         ndi_devi_exit(parent, circ1);
6729         ndi_devi_exit(scsi_vhci_dip, circ);
6730         NDBG20(("mptsas3%d: mptsas_offline_target %s devhdl:%x, "
6731             "phymask:%x, rval:%x", mpt->m_instance, wwn_str,
6732             ptgt->m_devhdl, ptgt->m_addr.mta_phymask, rval));
6733 
6734         /*
6735          * Clear parent's props for SMHBA support
6736          */
6737         if (topo_flags == MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE) {
6738                 if (ddi_prop_update_string(DDI_DEV_T_NONE, parent,
6739                     SCSI_ADDR_PROP_ATTACHED_PORT, "") !=
6740                     DDI_PROP_SUCCESS) {
6741                         (void) ddi_prop_remove(DDI_DEV_T_NONE, parent,
6742                             SCSI_ADDR_PROP_ATTACHED_PORT);
6743                         mptsas_log(mpt, CE_WARN, "mptsas attached port "
6744                             "prop update failed");
6745                 }
6746                 if (ddi_prop_update_int(DDI_DEV_T_NONE, parent,
6747                     MPTSAS_NUM_PHYS, 0) != DDI_PROP_SUCCESS) {
6748                         (void) ddi_prop_remove(DDI_DEV_T_NONE, parent,
6749                             MPTSAS_NUM_PHYS);
6750                         mptsas_log(mpt, CE_WARN, "mptsas num phys "
6751                             "prop update failed");
6752                 }
6753                 if (ddi_prop_update_int(DDI_DEV_T_NONE, parent,
6754                     MPTSAS_VIRTUAL_PORT, 1) != DDI_PROP_SUCCESS) {
6755                         (void) ddi_prop_remove(DDI_DEV_T_NONE, parent,
6756                             MPTSAS_VIRTUAL_PORT);
6757                         mptsas_log(mpt, CE_WARN, "mptsas virtual port "
6758                             "prop update failed");
6759                 }
6760         }
6761 
6762         mutex_enter(&mpt->m_mutex);
6763         ptgt->m_led_status = 0;
6764         (void) mptsas_flush_led_status(mpt, ptgt);
6765         if (rval == DDI_SUCCESS) {
6766                 mutex_destroy(&ptgt->m_t_mutex);
6767                 refhash_remove(mpt->m_targets, ptgt);
6768                 ptgt = NULL;
6769         } else {
6770                 /*
6771                  * clean DR_INTRANSITION flag to allow I/O down to
6772                  * PHCI driver since failover finished.
6773                  * Invalidate the devhdl
6774                  */
6775                 ptgt->m_devhdl = MPTSAS_INVALID_DEVHDL;
6776                 ptgt->m_tgt_unconfigured = 0;
6777                 ptgt->m_dr_flag = MPTSAS_DR_INACTIVE;
6778         }
6779 }
6780 
6781 static void
6782 mptsas_handle_topo_change(mptsas_topo_change_list_t *topo_node,
6783     dev_info_t *parent)
6784 {
6785         mptsas_target_t *ptgt = NULL;
6786         mptsas_smp_t    *psmp = NULL;
6787         mptsas_t        *mpt = (void *)topo_node->mpt;
6788         uint16_t        devhdl;
6789         uint16_t        attached_devhdl;
6790         int             rval = 0;
6791         uint32_t        page_address;
6792         uint8_t         flags;
6793         dev_info_t      *lundip;
6794         int             circ = 0, circ1 = 0;
6795         char            attached_wwnstr[MPTSAS_WWN_STRLEN];
6796 
6797         NDBG20(("mptsas3%d handle_topo_change enter, devhdl 0x%x,"
6798             "event 0x%x, flags 0x%x", mpt->m_instance, topo_node->devhdl,
6799             topo_node->event, topo_node->flags));
6800 
6801         ASSERT(mutex_owned(&mpt->m_mutex));
6802 
6803         switch (topo_node->event) {
6804         case MPTSAS_DR_EVENT_RECONFIG_TARGET:
6805         {
6806                 char *phy_mask_name;
6807                 mptsas_phymask_t phymask = 0;
6808 
6809                 if (topo_node->flags == MPTSAS_TOPO_FLAG_RAID_ASSOCIATED) {
6810                         /*
6811                          * Get latest RAID info.
6812                          */
6813                         (void) mptsas_get_raid_info(mpt);
6814                         ptgt = refhash_linear_search(mpt->m_targets,
6815                             mptsas_target_eval_devhdl, &topo_node->devhdl);
6816                         if (ptgt == NULL)
6817                                 break;
6818                 } else {
6819                         ptgt = (void *)topo_node->object;
6820                 }
6821 
6822                 if (ptgt == NULL) {
6823                         /*
6824                          * If a Phys Disk was deleted, RAID info needs to be
6825                          * updated to reflect the new topology.
6826                          */
6827                         (void) mptsas_get_raid_info(mpt);
6828 
6829                         /*
6830                          * Get sas device page 0 by DevHandle to make sure if
6831                          * SSP/SATA end device exist.
6832                          */
6833                         page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
6834                             MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
6835                             topo_node->devhdl;
6836 
6837                         rval = mptsas_get_target_device_info(mpt, page_address,
6838                             &devhdl, &ptgt);
6839                         if (rval == DEV_INFO_WRONG_DEVICE_TYPE) {
6840                                 mptsas_log(mpt, CE_NOTE,
6841                                     "mptsas_handle_topo_change: target %d is "
6842                                     "not a SAS/SATA device. \n",
6843                                     topo_node->devhdl);
6844                         } else if (rval == DEV_INFO_FAIL_ALLOC) {
6845                                 mptsas_log(mpt, CE_NOTE,
6846                                     "mptsas_handle_topo_change: could not "
6847                                     "allocate memory. \n");
6848                         }
6849                         /*
6850                          * If rval is DEV_INFO_PHYS_DISK than there is nothing
6851                          * else to do, just leave.
6852                          */
6853                         if (rval != DEV_INFO_SUCCESS) {
6854                                 return;
6855                         }
6856                 }
6857 
6858                 ASSERT(ptgt->m_devhdl == topo_node->devhdl);
6859 
6860                 mutex_exit(&mpt->m_mutex);
6861                 flags = topo_node->flags;
6862 
6863                 if (flags == MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED) {
6864                         phymask = ptgt->m_addr.mta_phymask;
6865                         phy_mask_name = kmem_zalloc(MPTSAS_MAX_PHYS, KM_SLEEP);
6866                         (void) sprintf(phy_mask_name, "%x", phymask);
6867                         parent = scsi_hba_iport_find(mpt->m_dip,
6868                             phy_mask_name);
6869                         kmem_free(phy_mask_name, MPTSAS_MAX_PHYS);
6870                         if (parent == NULL) {
6871                                 mptsas_log(mpt, CE_WARN, "Failed to find a "
6872                                     "iport for PD, should not happen!");
6873                                 mutex_enter(&mpt->m_mutex);
6874                                 break;
6875                         }
6876                 }
6877 
6878                 if (flags == MPTSAS_TOPO_FLAG_RAID_ASSOCIATED) {
6879                         ndi_devi_enter(parent, &circ1);
6880                         (void) mptsas_config_raid(parent, topo_node->devhdl,
6881                             &lundip);
6882                         ndi_devi_exit(parent, circ1);
6883                 } else {
6884                         /*
6885                          * hold nexus for bus configure
6886                          */
6887                         ndi_devi_enter(scsi_vhci_dip, &circ);
6888                         ndi_devi_enter(parent, &circ1);
6889                         rval = mptsas_config_target(parent, ptgt);
6890                         /*
6891                          * release nexus for bus configure
6892                          */
6893                         ndi_devi_exit(parent, circ1);
6894                         ndi_devi_exit(scsi_vhci_dip, circ);
6895 
6896                         /*
6897                          * Add parent's props for SMHBA support
6898                          */
6899                         if (flags == MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE) {
6900                                 bzero(attached_wwnstr,
6901                                     sizeof (attached_wwnstr));
6902                                 (void) sprintf(attached_wwnstr, "w%016"PRIx64,
6903                                     ptgt->m_addr.mta_wwn);
6904                                 if (ddi_prop_update_string(DDI_DEV_T_NONE,
6905                                     parent,
6906                                     SCSI_ADDR_PROP_ATTACHED_PORT,
6907                                     attached_wwnstr)
6908                                     != DDI_PROP_SUCCESS) {
6909                                         (void) ddi_prop_remove(DDI_DEV_T_NONE,
6910                                             parent,
6911                                             SCSI_ADDR_PROP_ATTACHED_PORT);
6912                                         mptsas_log(mpt, CE_WARN, "Failed to"
6913                                             "attached-port props");
6914                                         return;
6915                                 }
6916                                 if (ddi_prop_update_int(DDI_DEV_T_NONE, parent,
6917                                     MPTSAS_NUM_PHYS, 1) !=
6918                                     DDI_PROP_SUCCESS) {
6919                                         (void) ddi_prop_remove(DDI_DEV_T_NONE,
6920                                             parent, MPTSAS_NUM_PHYS);
6921                                         mptsas_log(mpt, CE_WARN, "Failed to"
6922                                             " create num-phys props");
6923                                         return;
6924                                 }
6925 
6926                                 /*
6927                                  * Update PHY info for smhba
6928                                  */
6929                                 mutex_enter(&mpt->m_mutex);
6930                                 if (mptsas_smhba_phy_init(mpt)) {
6931                                         mutex_exit(&mpt->m_mutex);
6932                                         mptsas_log(mpt, CE_WARN, "mptsas phy"
6933                                             " update failed");
6934                                         return;
6935                                 }
6936                                 mutex_exit(&mpt->m_mutex);
6937 
6938                                 /*
6939                                  * topo_node->un.physport is really the PHY#
6940                                  * for direct attached devices
6941                                  */
6942                                 mptsas_smhba_set_one_phy_props(mpt, parent,
6943                                     topo_node->un.physport, &attached_devhdl);
6944 
6945                                 if (ddi_prop_update_int(DDI_DEV_T_NONE, parent,
6946                                     MPTSAS_VIRTUAL_PORT, 0) !=
6947                                     DDI_PROP_SUCCESS) {
6948                                         (void) ddi_prop_remove(DDI_DEV_T_NONE,
6949                                             parent, MPTSAS_VIRTUAL_PORT);
6950                                         mptsas_log(mpt, CE_WARN,
6951                                             "mptsas virtual-port"
6952                                             "port prop update failed");
6953                                         return;
6954                                 }
6955                         }
6956                 }
6957                 mutex_enter(&mpt->m_mutex);
6958 
6959                 NDBG20(("mptsas3%d handle_topo_change to online devhdl:%x, "
6960                     "phymask:%x.", mpt->m_instance, ptgt->m_devhdl,
6961                     ptgt->m_addr.mta_phymask));
6962                 break;
6963         }
6964         case MPTSAS_DR_EVENT_OFFLINE_TARGET:
6965         {
6966                 devhdl = topo_node->devhdl;
6967                 ptgt = refhash_linear_search(mpt->m_targets,
6968                     mptsas_target_eval_devhdl, &devhdl);
6969                 if (ptgt == NULL)
6970                         break;
6971 
6972                 ASSERT(ptgt->m_devhdl == devhdl);
6973 
6974                 if ((topo_node->flags == MPTSAS_TOPO_FLAG_RAID_ASSOCIATED) ||
6975                     (topo_node->flags ==
6976                     MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED)) {
6977                         /*
6978                          * Get latest RAID info if RAID volume status changes
6979                          * or Phys Disk status changes
6980                          */
6981                         (void) mptsas_get_raid_info(mpt);
6982                 }
6983 
6984                 mptsas_offline_target(mpt, ptgt, topo_node->flags, parent);
6985 
6986                 /*
6987                  * Send SAS IO Unit Control to free the dev handle
6988                  */
6989                 if ((flags == MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE) ||
6990                     (flags == MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE)) {
6991                         rval = mptsas_free_devhdl(mpt, devhdl);
6992 
6993                         NDBG20(("mptsas3%d handle_topo_change to remove "
6994                             "devhdl:%x, rval:%x", mpt->m_instance, devhdl,
6995                             rval));
6996                 }
6997 
6998                 break;
6999         }
7000         case MPTSAS_DR_EVENT_REMOVE_HANDLE:
7001         {
7002                 devhdl = topo_node->devhdl;
7003 
7004                 /*
7005                  * Do a reset first.
7006                  */
7007                 rval = mptsas_do_scsi_reset(mpt, devhdl);
7008                 NDBG20(("mpt%d reset target before remove "
7009                     "devhdl:%x, rval:%x", mpt->m_instance, devhdl, rval));
7010 
7011                 /*
7012                  * Send SAS IO Unit Control to free the dev handle
7013                  */
7014                 rval = mptsas_free_devhdl(mpt, devhdl);
7015                 NDBG20(("mptsas3%d handle_topo_change to remove "
7016                     "devhdl:%x, rval:%x", mpt->m_instance, devhdl,
7017                     rval));
7018                 break;
7019         }
7020         case MPTSAS_DR_EVENT_RECONFIG_SMP:
7021         {
7022                 mptsas_smp_t smp;
7023                 dev_info_t *smpdip;
7024 
7025                 devhdl = topo_node->devhdl;
7026 
7027                 page_address = (MPI2_SAS_EXPAND_PGAD_FORM_HNDL &
7028                     MPI2_SAS_EXPAND_PGAD_FORM_MASK) | (uint32_t)devhdl;
7029                 rval = mptsas_get_sas_expander_page0(mpt, page_address, &smp);
7030                 if (rval != DDI_SUCCESS) {
7031                         mptsas_log(mpt, CE_WARN, "failed to online smp, "
7032                             "handle %x", devhdl);
7033                         return;
7034                 }
7035 
7036                 psmp = mptsas_smp_alloc(mpt, &smp);
7037                 if (psmp == NULL) {
7038                         return;
7039                 }
7040 
7041                 mutex_exit(&mpt->m_mutex);
7042                 ndi_devi_enter(parent, &circ1);
7043                 (void) mptsas_online_smp(parent, psmp, &smpdip);
7044                 ndi_devi_exit(parent, circ1);
7045 
7046                 mutex_enter(&mpt->m_mutex);
7047                 break;
7048         }
7049         case MPTSAS_DR_EVENT_OFFLINE_SMP:
7050         {
7051                 devhdl = topo_node->devhdl;
7052                 uint32_t dev_info;
7053 
7054                 psmp = refhash_linear_search(mpt->m_smp_targets,
7055                     mptsas_smp_eval_devhdl, &devhdl);
7056                 if (psmp == NULL)
7057                         break;
7058                 /*
7059                  * The mptsas_smp_t data is released only if the dip is offlined
7060                  * successfully.
7061                  */
7062                 mutex_exit(&mpt->m_mutex);
7063 
7064                 ndi_devi_enter(parent, &circ1);
7065                 rval = mptsas_offline_smp(parent, psmp, NDI_DEVI_REMOVE);
7066                 ndi_devi_exit(parent, circ1);
7067 
7068                 dev_info = psmp->m_deviceinfo;
7069                 if ((dev_info & DEVINFO_DIRECT_ATTACHED) ==
7070                     DEVINFO_DIRECT_ATTACHED) {
7071                         if (ddi_prop_update_int(DDI_DEV_T_NONE, parent,
7072                             MPTSAS_VIRTUAL_PORT, 1) !=
7073                             DDI_PROP_SUCCESS) {
7074                                 (void) ddi_prop_remove(DDI_DEV_T_NONE, parent,
7075                                     MPTSAS_VIRTUAL_PORT);
7076                                 mptsas_log(mpt, CE_WARN, "mptsas virtual port "
7077                                     "prop update failed");
7078                                 return;
7079                         }
7080                         /*
7081                          * Check whether the smp connected to the iport,
7082                          */
7083                         if (ddi_prop_update_int(DDI_DEV_T_NONE, parent,
7084                             MPTSAS_NUM_PHYS, 0) !=
7085                             DDI_PROP_SUCCESS) {
7086                                 (void) ddi_prop_remove(DDI_DEV_T_NONE, parent,
7087                                     MPTSAS_NUM_PHYS);
7088                                 mptsas_log(mpt, CE_WARN, "mptsas num phys"
7089                                     "prop update failed");
7090                                 return;
7091                         }
7092                         /*
7093                          * Clear parent's attached-port props
7094                          */
7095                         bzero(attached_wwnstr, sizeof (attached_wwnstr));
7096                         if (ddi_prop_update_string(DDI_DEV_T_NONE, parent,
7097                             SCSI_ADDR_PROP_ATTACHED_PORT, attached_wwnstr) !=
7098                             DDI_PROP_SUCCESS) {
7099                                 (void) ddi_prop_remove(DDI_DEV_T_NONE, parent,
7100                                     SCSI_ADDR_PROP_ATTACHED_PORT);
7101                                 mptsas_log(mpt, CE_WARN, "mptsas attached port "
7102                                     "prop update failed");
7103                                 return;
7104                         }
7105                 }
7106 
7107                 mutex_enter(&mpt->m_mutex);
7108                 NDBG20(("mptsas3%d handle_topo_change to remove devhdl:%x, "
7109                     "rval:%x", mpt->m_instance, psmp->m_devhdl, rval));
7110                 if (rval == DDI_SUCCESS) {
7111                         refhash_remove(mpt->m_smp_targets, psmp);
7112                 } else {
7113                         psmp->m_devhdl = MPTSAS_INVALID_DEVHDL;
7114                 }
7115 
7116                 bzero(attached_wwnstr, sizeof (attached_wwnstr));
7117 
7118                 break;
7119         }
7120         default:
7121                 return;
7122         }
7123 }
7124 
7125 /*
7126  * Record the event if its type is enabled in mpt instance by ioctl.
7127  */
7128 static void
7129 mptsas_record_event(void *args)
7130 {
7131         m_replyh_arg_t                  *replyh_arg;
7132         pMpi2EventNotificationReply_t   eventreply;
7133         uint32_t                        event, rfm;
7134         mptsas_t                        *mpt;
7135         int                             i, j;
7136         uint16_t                        event_data_len;
7137         boolean_t                       sendAEN = FALSE;
7138 
7139         replyh_arg = (m_replyh_arg_t *)args;
7140         rfm = replyh_arg->rfm;
7141         mpt = replyh_arg->mpt;
7142 
7143         eventreply = (pMpi2EventNotificationReply_t)
7144             (mpt->m_reply_frame + (rfm -
7145             (mpt->m_reply_frame_dma_addr&0xfffffffful)));
7146         event = ddi_get16(mpt->m_acc_reply_frame_hdl, &eventreply->Event);
7147 
7148 
7149         /*
7150          * Generate a system event to let anyone who cares know that a
7151          * LOG_ENTRY_ADDED event has occurred.  This is sent no matter what the
7152          * event mask is set to.
7153          */
7154         if (event == MPI2_EVENT_LOG_ENTRY_ADDED) {
7155                 sendAEN = TRUE;
7156         }
7157 
7158         /*
7159          * Record the event only if it is not masked.  Determine which dword
7160          * and bit of event mask to test.
7161          */
7162         i = (uint8_t)(event / 32);
7163         j = (uint8_t)(event % 32);
7164         if ((i < 4) && ((1 << j) & mpt->m_event_mask[i])) {
7165                 i = mpt->m_event_index;
7166                 mpt->m_events[i].Type = event;
7167                 mpt->m_events[i].Number = ++mpt->m_event_number;
7168                 bzero(mpt->m_events[i].Data, MPTSAS_MAX_EVENT_DATA_LENGTH * 4);
7169                 event_data_len = ddi_get16(mpt->m_acc_reply_frame_hdl,
7170                     &eventreply->EventDataLength);
7171 
7172                 if (event_data_len > 0) {
7173                         /*
7174                          * Limit data to size in m_event entry
7175                          */
7176                         if (event_data_len > MPTSAS_MAX_EVENT_DATA_LENGTH) {
7177                                 event_data_len = MPTSAS_MAX_EVENT_DATA_LENGTH;
7178                         }
7179                         for (j = 0; j < event_data_len; j++) {
7180                                 mpt->m_events[i].Data[j] =
7181                                     ddi_get32(mpt->m_acc_reply_frame_hdl,
7182                                     &(eventreply->EventData[j]));
7183                         }
7184 
7185                         /*
7186                          * check for index wrap-around
7187                          */
7188                         if (++i == MPTSAS_EVENT_QUEUE_SIZE) {
7189                                 i = 0;
7190                         }
7191                         mpt->m_event_index = (uint8_t)i;
7192 
7193                         /*
7194                          * Set flag to send the event.
7195                          */
7196                         sendAEN = TRUE;
7197                 }
7198         }
7199 
7200         /*
7201          * Generate a system event if flag is set to let anyone who cares know
7202          * that an event has occurred.
7203          */
7204         if (sendAEN) {
7205                 (void) ddi_log_sysevent(mpt->m_dip, DDI_VENDOR_LSI, "MPT_SAS",
7206                     "SAS", NULL, NULL, DDI_NOSLEEP);
7207         }
7208 }
7209 
7210 #define SMP_RESET_IN_PROGRESS MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS
7211 /*
7212  * handle sync events from ioc in interrupt
7213  * return value:
7214  * DDI_SUCCESS: The event is handled by this func
7215  * DDI_FAILURE: Event is not handled
7216  */
7217 static int
7218 mptsas_handle_event_sync(void *args)
7219 {
7220         m_replyh_arg_t                  *replyh_arg;
7221         pMpi2EventNotificationReply_t   eventreply;
7222         uint32_t                        event, rfm;
7223         mptsas_t                        *mpt;
7224         uint_t                          iocstatus;
7225 
7226         replyh_arg = (m_replyh_arg_t *)args;
7227         rfm = replyh_arg->rfm;
7228         mpt = replyh_arg->mpt;
7229 
7230         ASSERT(mutex_owned(&mpt->m_mutex));
7231 
7232         eventreply = (pMpi2EventNotificationReply_t)
7233             (mpt->m_reply_frame + (rfm -
7234             (mpt->m_reply_frame_dma_addr&0xfffffffful)));
7235         event = ddi_get16(mpt->m_acc_reply_frame_hdl, &eventreply->Event);
7236 
7237         if (iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
7238             &eventreply->IOCStatus)) {
7239                 if (iocstatus == MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
7240                         mptsas_log(mpt, CE_WARN,
7241                             "!mptsas_handle_event_sync: event 0x%x, "
7242                             "IOCStatus=0x%x, "
7243                             "IOCLogInfo=0x%x", event, iocstatus,
7244                             ddi_get32(mpt->m_acc_reply_frame_hdl,
7245                             &eventreply->IOCLogInfo));
7246                 } else {
7247                         mptsas_log(mpt, CE_WARN,
7248                             "mptsas_handle_event_sync: event 0x%x, "
7249                             "IOCStatus=0x%x, "
7250                             "(IOCLogInfo=0x%x)", event, iocstatus,
7251                             ddi_get32(mpt->m_acc_reply_frame_hdl,
7252                             &eventreply->IOCLogInfo));
7253                 }
7254         }
7255 
7256         /*
7257          * figure out what kind of event we got and handle accordingly
7258          */
7259         switch (event) {
7260         case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
7261         {
7262                 pMpi2EventDataSasTopologyChangeList_t   sas_topo_change_list;
7263                 uint8_t                         num_entries, expstatus, phy;
7264                 uint8_t                         phystatus, physport, state, i;
7265                 uint8_t                         start_phy_num, link_rate;
7266                 uint16_t                        dev_handle, reason_code;
7267                 uint16_t                        enc_handle, expd_handle;
7268                 char                            string[80], curr[80], prev[80];
7269                 mptsas_topo_change_list_t       *topo_head = NULL;
7270                 mptsas_topo_change_list_t       *topo_tail = NULL;
7271                 mptsas_topo_change_list_t       *topo_node = NULL;
7272                 mptsas_target_t                 *ptgt;
7273                 mptsas_smp_t                    *psmp;
7274                 uint8_t                         flags = 0, exp_flag;
7275                 smhba_info_t                    *pSmhba = NULL;
7276 
7277                 NDBG20(("mptsas_handle_event_sync: SAS topology change"));
7278 
7279                 sas_topo_change_list = (pMpi2EventDataSasTopologyChangeList_t)
7280                     eventreply->EventData;
7281 
7282                 enc_handle = ddi_get16(mpt->m_acc_reply_frame_hdl,
7283                     &sas_topo_change_list->EnclosureHandle);
7284                 expd_handle = ddi_get16(mpt->m_acc_reply_frame_hdl,
7285                     &sas_topo_change_list->ExpanderDevHandle);
7286                 num_entries = ddi_get8(mpt->m_acc_reply_frame_hdl,
7287                     &sas_topo_change_list->NumEntries);
7288                 start_phy_num = ddi_get8(mpt->m_acc_reply_frame_hdl,
7289                     &sas_topo_change_list->StartPhyNum);
7290                 expstatus = ddi_get8(mpt->m_acc_reply_frame_hdl,
7291                     &sas_topo_change_list->ExpStatus);
7292                 physport = ddi_get8(mpt->m_acc_reply_frame_hdl,
7293                     &sas_topo_change_list->PhysicalPort);
7294 
7295                 string[0] = 0;
7296                 if (expd_handle) {
7297                         flags = MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED;
7298                         switch (expstatus) {
7299                         case MPI2_EVENT_SAS_TOPO_ES_ADDED:
7300                                 (void) sprintf(string, " added");
7301                                 /*
7302                                  * New expander device added
7303                                  */
7304                                 mpt->m_port_chng = 1;
7305                                 topo_node = kmem_zalloc(
7306                                     sizeof (mptsas_topo_change_list_t),
7307                                     KM_SLEEP);
7308                                 topo_node->mpt = mpt;
7309                                 topo_node->event = MPTSAS_DR_EVENT_RECONFIG_SMP;
7310                                 topo_node->un.physport = physport;
7311                                 topo_node->devhdl = expd_handle;
7312                                 topo_node->flags = flags;
7313                                 topo_node->object = NULL;
7314                                 if (topo_head == NULL) {
7315                                         topo_head = topo_tail = topo_node;
7316                                 } else {
7317                                         topo_tail->next = topo_node;
7318                                         topo_tail = topo_node;
7319                                 }
7320                                 break;
7321                         case MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING:
7322                                 (void) sprintf(string, " not responding, "
7323                                     "removed");
7324                                 psmp = refhash_linear_search(mpt->m_smp_targets,
7325                                     mptsas_smp_eval_devhdl, &expd_handle);
7326                                 if (psmp == NULL)
7327                                         break;
7328 
7329                                 topo_node = kmem_zalloc(
7330                                     sizeof (mptsas_topo_change_list_t),
7331                                     KM_SLEEP);
7332                                 topo_node->mpt = mpt;
7333                                 topo_node->un.phymask =
7334                                     psmp->m_addr.mta_phymask;
7335                                 topo_node->event = MPTSAS_DR_EVENT_OFFLINE_SMP;
7336                                 topo_node->devhdl = expd_handle;
7337                                 topo_node->flags = flags;
7338                                 topo_node->object = NULL;
7339                                 if (topo_head == NULL) {
7340                                         topo_head = topo_tail = topo_node;
7341                                 } else {
7342                                         topo_tail->next = topo_node;
7343                                         topo_tail = topo_node;
7344                                 }
7345                                 break;
7346                         case MPI2_EVENT_SAS_TOPO_ES_RESPONDING:
7347                                 break;
7348                         case MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING:
7349                                 (void) sprintf(string, " not responding, "
7350                                     "delaying removal");
7351                                 break;
7352                         default:
7353                                 break;
7354                         }
7355                 } else {
7356                         flags = MPTSAS_TOPO_FLAG_DIRECT_ATTACHED_DEVICE;
7357                 }
7358 
7359                 NDBG20(("SAS TOPOLOGY CHANGE for enclosure %x expander %x%s\n",
7360                     enc_handle, expd_handle, string));
7361                 for (i = 0; i < num_entries; i++) {
7362                         phy = i + start_phy_num;
7363                         phystatus = ddi_get8(mpt->m_acc_reply_frame_hdl,
7364                             &sas_topo_change_list->PHY[i].PhyStatus);
7365                         dev_handle = ddi_get16(mpt->m_acc_reply_frame_hdl,
7366                             &sas_topo_change_list->PHY[i].AttachedDevHandle);
7367                         reason_code = phystatus & MPI2_EVENT_SAS_TOPO_RC_MASK;
7368                         /*
7369                          * Filter out processing of Phy Vacant Status unless
7370                          * the reason code is "Not Responding".  Process all
7371                          * other combinations of Phy Status and Reason Codes.
7372                          */
7373                         if ((phystatus &
7374                             MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT) &&
7375                             (reason_code !=
7376                             MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING)) {
7377                                 continue;
7378                         }
7379                         curr[0] = 0;
7380                         prev[0] = 0;
7381                         string[0] = 0;
7382                         switch (reason_code) {
7383                         case MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED:
7384                         {
7385                                 NDBG20(("mptsas3%d phy %d physical_port %d "
7386                                     "dev_handle %d added", mpt->m_instance, phy,
7387                                     physport, dev_handle));
7388                                 link_rate = ddi_get8(mpt->m_acc_reply_frame_hdl,
7389                                     &sas_topo_change_list->PHY[i].LinkRate);
7390                                 state = (link_rate &
7391                                     MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7392                                     MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7393                                 switch (state) {
7394                                 case MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED:
7395                                         (void) sprintf(curr, "is disabled");
7396                                         break;
7397                                 case MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED:
7398                                         (void) sprintf(curr, "is offline, "
7399                                             "failed speed negotiation");
7400                                         break;
7401                                 case MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE:
7402                                         (void) sprintf(curr, "SATA OOB "
7403                                             "complete");
7404                                         break;
7405                                 case SMP_RESET_IN_PROGRESS:
7406                                         (void) sprintf(curr, "SMP reset in "
7407                                             "progress");
7408                                         break;
7409                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_1_5:
7410                                         (void) sprintf(curr, "is online at "
7411                                             "1.5 Gbps");
7412                                         break;
7413                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_3_0:
7414                                         (void) sprintf(curr, "is online at 3.0 "
7415                                             "Gbps");
7416                                         break;
7417                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_6_0:
7418                                         (void) sprintf(curr, "is online at 6.0 "
7419                                             "Gbps");
7420                                         break;
7421                                 case MPI25_EVENT_SAS_TOPO_LR_RATE_12_0:
7422                                         (void) sprintf(curr,
7423                                             "is online at 12.0 Gbps");
7424                                         break;
7425                                 default:
7426                                         (void) sprintf(curr, "state is "
7427                                             "unknown");
7428                                         break;
7429                                 }
7430                                 /*
7431                                  * New target device added into the system.
7432                                  * Set association flag according to if an
7433                                  * expander is used or not.
7434                                  */
7435                                 exp_flag =
7436                                     MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7437                                 if (flags ==
7438                                     MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7439                                         flags = exp_flag;
7440                                 }
7441                                 topo_node = kmem_zalloc(
7442                                     sizeof (mptsas_topo_change_list_t),
7443                                     KM_SLEEP);
7444                                 topo_node->mpt = mpt;
7445                                 topo_node->event =
7446                                     MPTSAS_DR_EVENT_RECONFIG_TARGET;
7447                                 if (expd_handle == 0) {
7448                                         /*
7449                                          * Per MPI 2, if expander dev handle
7450                                          * is 0, it's a directly attached
7451                                          * device. So driver use PHY to decide
7452                                          * which iport is associated
7453                                          */
7454                                         physport = phy;
7455                                         mpt->m_port_chng = 1;
7456                                 }
7457                                 topo_node->un.physport = physport;
7458                                 topo_node->devhdl = dev_handle;
7459                                 topo_node->flags = flags;
7460                                 topo_node->object = NULL;
7461                                 if (topo_head == NULL) {
7462                                         topo_head = topo_tail = topo_node;
7463                                 } else {
7464                                         topo_tail->next = topo_node;
7465                                         topo_tail = topo_node;
7466                                 }
7467                                 break;
7468                         }
7469                         case MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING:
7470                         {
7471                                 NDBG20(("mptsas3%d phy %d physical_port %d "
7472                                     "dev_handle %d removed", mpt->m_instance,
7473                                     phy, physport, dev_handle));
7474                                 /*
7475                                  * Set association flag according to if an
7476                                  * expander is used or not.
7477                                  */
7478                                 exp_flag =
7479                                     MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7480                                 if (flags ==
7481                                     MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7482                                         flags = exp_flag;
7483                                 }
7484                                 /*
7485                                  * Target device is removed from the system
7486                                  * Before the device is really offline from
7487                                  * from system.
7488                                  */
7489                                 ptgt = refhash_linear_search(mpt->m_targets,
7490                                     mptsas_target_eval_devhdl, &dev_handle);
7491                                 /*
7492                                  * If ptgt is NULL here, it means that the
7493                                  * DevHandle is not in the hash table.  This is
7494                                  * reasonable sometimes.  For example, if a
7495                                  * disk was pulled, then added, then pulled
7496                                  * again, the disk will not have been put into
7497                                  * the hash table because the add event will
7498                                  * have an invalid phymask.  BUT, this does not
7499                                  * mean that the DevHandle is invalid.  The
7500                                  * controller will still have a valid DevHandle
7501                                  * that must be removed.  To do this, use the
7502                                  * MPTSAS_DR_EVENT_REMOVE_HANDLE event.
7503                                  */
7504                                 if (ptgt == NULL) {
7505                                         topo_node = kmem_zalloc(
7506                                             sizeof (mptsas_topo_change_list_t),
7507                                             KM_SLEEP);
7508                                         topo_node->mpt = mpt;
7509                                         topo_node->un.phymask = 0;
7510                                         topo_node->event =
7511                                             MPTSAS_DR_EVENT_REMOVE_HANDLE;
7512                                         topo_node->devhdl = dev_handle;
7513                                         topo_node->flags = flags;
7514                                         topo_node->object = NULL;
7515                                         if (topo_head == NULL) {
7516                                                 topo_head = topo_tail =
7517                                                     topo_node;
7518                                         } else {
7519                                                 topo_tail->next = topo_node;
7520                                                 topo_tail = topo_node;
7521                                         }
7522                                         break;
7523                                 }
7524 
7525                                 /*
7526                                  * Update DR flag immediately avoid I/O failure
7527                                  * before failover finish. We won't add
7528                                  * any following commands into waitq, instead,
7529                                  * we need return TRAN_BUSY in the tran_start
7530                                  * context.
7531                                  */
7532                                 ptgt->m_dr_flag = MPTSAS_DR_INTRANSITION;
7533 
7534                                 topo_node = kmem_zalloc(
7535                                     sizeof (mptsas_topo_change_list_t),
7536                                     KM_SLEEP);
7537                                 topo_node->mpt = mpt;
7538                                 topo_node->un.phymask =
7539                                     ptgt->m_addr.mta_phymask;
7540                                 topo_node->event =
7541                                     MPTSAS_DR_EVENT_OFFLINE_TARGET;
7542                                 topo_node->devhdl = dev_handle;
7543                                 topo_node->flags = flags;
7544                                 topo_node->object = NULL;
7545                                 if (topo_head == NULL) {
7546                                         topo_head = topo_tail = topo_node;
7547                                 } else {
7548                                         topo_tail->next = topo_node;
7549                                         topo_tail = topo_node;
7550                                 }
7551                                 break;
7552                         }
7553                         case MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED:
7554                                 link_rate = ddi_get8(mpt->m_acc_reply_frame_hdl,
7555                                     &sas_topo_change_list->PHY[i].LinkRate);
7556                                 state = (link_rate &
7557                                     MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7558                                     MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7559                                 pSmhba = &mpt->m_phy_info[i].smhba_info;
7560                                 pSmhba->negotiated_link_rate = state;
7561                                 switch (state) {
7562                                 case MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED:
7563                                         (void) sprintf(curr, "is disabled");
7564                                         mptsas_smhba_log_sysevent(mpt,
7565                                             ESC_SAS_PHY_EVENT,
7566                                             SAS_PHY_REMOVE,
7567                                             &mpt->m_phy_info[i].smhba_info);
7568                                         mpt->m_phy_info[i].smhba_info.
7569                                             negotiated_link_rate
7570                                             = 0x1;
7571                                         break;
7572                                 case MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED:
7573                                         (void) sprintf(curr, "is offline, "
7574                                             "failed speed negotiation");
7575                                         mptsas_smhba_log_sysevent(mpt,
7576                                             ESC_SAS_PHY_EVENT,
7577                                             SAS_PHY_OFFLINE,
7578                                             &mpt->m_phy_info[i].smhba_info);
7579                                         break;
7580                                 case MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE:
7581                                         (void) sprintf(curr, "SATA OOB "
7582                                             "complete");
7583                                         break;
7584                                 case SMP_RESET_IN_PROGRESS:
7585                                         (void) sprintf(curr, "SMP reset in "
7586                                             "progress");
7587                                         break;
7588                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_1_5:
7589                                         (void) sprintf(curr, "is online at "
7590                                             "1.5 Gbps");
7591                                         if ((expd_handle == 0) &&
7592                                             (enc_handle == 1)) {
7593                                                 mpt->m_port_chng = 1;
7594                                         }
7595                                         mptsas_smhba_log_sysevent(mpt,
7596                                             ESC_SAS_PHY_EVENT,
7597                                             SAS_PHY_ONLINE,
7598                                             &mpt->m_phy_info[i].smhba_info);
7599                                         break;
7600                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_3_0:
7601                                         (void) sprintf(curr, "is online at 3.0 "
7602                                             "Gbps");
7603                                         if ((expd_handle == 0) &&
7604                                             (enc_handle == 1)) {
7605                                                 mpt->m_port_chng = 1;
7606                                         }
7607                                         mptsas_smhba_log_sysevent(mpt,
7608                                             ESC_SAS_PHY_EVENT,
7609                                             SAS_PHY_ONLINE,
7610                                             &mpt->m_phy_info[i].smhba_info);
7611                                         break;
7612                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_6_0:
7613                                         (void) sprintf(curr, "is online at "
7614                                             "6.0 Gbps");
7615                                         if ((expd_handle == 0) &&
7616                                             (enc_handle == 1)) {
7617                                                 mpt->m_port_chng = 1;
7618                                         }
7619                                         mptsas_smhba_log_sysevent(mpt,
7620                                             ESC_SAS_PHY_EVENT,
7621                                             SAS_PHY_ONLINE,
7622                                             &mpt->m_phy_info[i].smhba_info);
7623                                         break;
7624                                 case MPI25_EVENT_SAS_TOPO_LR_RATE_12_0:
7625                                         (void) sprintf(curr, "is online at "
7626                                             "12.0 Gbps");
7627                                         if ((expd_handle == 0) &&
7628                                             (enc_handle == 1)) {
7629                                                 mpt->m_port_chng = 1;
7630                                         }
7631                                         mptsas_smhba_log_sysevent(mpt,
7632                                             ESC_SAS_PHY_EVENT,
7633                                             SAS_PHY_ONLINE,
7634                                             &mpt->m_phy_info[i].smhba_info);
7635                                         break;
7636                                 default:
7637                                         (void) sprintf(curr, "state is "
7638                                             "unknown");
7639                                         break;
7640                                 }
7641 
7642                                 state = (link_rate &
7643                                     MPI2_EVENT_SAS_TOPO_LR_PREV_MASK) >>
7644                                     MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT;
7645                                 switch (state) {
7646                                 case MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED:
7647                                         (void) sprintf(prev, ", was disabled");
7648                                         break;
7649                                 case MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED:
7650                                         (void) sprintf(prev, ", was offline, "
7651                                             "failed speed negotiation");
7652                                         break;
7653                                 case MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE:
7654                                         (void) sprintf(prev, ", was SATA OOB "
7655                                             "complete");
7656                                         break;
7657                                 case SMP_RESET_IN_PROGRESS:
7658                                         (void) sprintf(prev, ", was SMP reset "
7659                                             "in progress");
7660                                         break;
7661                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_1_5:
7662                                         (void) sprintf(prev, ", was online at "
7663                                             "1.5 Gbps");
7664                                         break;
7665                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_3_0:
7666                                         (void) sprintf(prev, ", was online at "
7667                                             "3.0 Gbps");
7668                                         break;
7669                                 case MPI2_EVENT_SAS_TOPO_LR_RATE_6_0:
7670                                         (void) sprintf(prev, ", was online at "
7671                                             "6.0 Gbps");
7672                                         break;
7673                                 case MPI25_EVENT_SAS_TOPO_LR_RATE_12_0:
7674                                         (void) sprintf(prev, ", was online at "
7675                                             "12.0 Gbps");
7676                                         break;
7677                                 default:
7678                                 break;
7679                                 }
7680                                 (void) sprintf(&string[strlen(string)], "link "
7681                                     "changed, ");
7682                                 break;
7683                         case MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE:
7684                                 continue;
7685                         case MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING:
7686                                 (void) sprintf(&string[strlen(string)],
7687                                     "target not responding, delaying "
7688                                     "removal");
7689                                 break;
7690                         }
7691                         NDBG20(("mptsas3%d phy %d DevHandle %x, %s%s%s\n",
7692                             mpt->m_instance, phy, dev_handle, string, curr,
7693                             prev));
7694                 }
7695                 if (topo_head != NULL) {
7696                         /*
7697                          * Launch DR taskq to handle topology change
7698                          */
7699                         if ((ddi_taskq_dispatch(mpt->m_dr_taskq,
7700                             mptsas_handle_dr, (void *)topo_head,
7701                             DDI_NOSLEEP)) != DDI_SUCCESS) {
7702                                 while (topo_head != NULL) {
7703                                         topo_node = topo_head;
7704                                         topo_head = topo_head->next;
7705                                         kmem_free(topo_node,
7706                                             sizeof (mptsas_topo_change_list_t));
7707                                 }
7708                                 mptsas_log(mpt, CE_NOTE, "mptsas start taskq "
7709                                     "for handle SAS DR event failed. \n");
7710                         }
7711                 }
7712                 break;
7713         }
7714         case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
7715         {
7716                 Mpi2EventDataIrConfigChangeList_t       *irChangeList;
7717                 mptsas_topo_change_list_t               *topo_head = NULL;
7718                 mptsas_topo_change_list_t               *topo_tail = NULL;
7719                 mptsas_topo_change_list_t               *topo_node = NULL;
7720                 mptsas_target_t                         *ptgt;
7721                 uint8_t                                 num_entries, i, reason;
7722                 uint16_t                                volhandle, diskhandle;
7723 
7724                 irChangeList = (pMpi2EventDataIrConfigChangeList_t)
7725                     eventreply->EventData;
7726                 num_entries = ddi_get8(mpt->m_acc_reply_frame_hdl,
7727                     &irChangeList->NumElements);
7728 
7729                 NDBG20(("mptsas3%d IR_CONFIGURATION_CHANGE_LIST event received",
7730                     mpt->m_instance));
7731 
7732                 for (i = 0; i < num_entries; i++) {
7733                         reason = ddi_get8(mpt->m_acc_reply_frame_hdl,
7734                             &irChangeList->ConfigElement[i].ReasonCode);
7735                         volhandle = ddi_get16(mpt->m_acc_reply_frame_hdl,
7736                             &irChangeList->ConfigElement[i].VolDevHandle);
7737                         diskhandle = ddi_get16(mpt->m_acc_reply_frame_hdl,
7738                             &irChangeList->ConfigElement[i].PhysDiskDevHandle);
7739 
7740                         switch (reason) {
7741                         case MPI2_EVENT_IR_CHANGE_RC_ADDED:
7742                         case MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED:
7743                         {
7744                                 NDBG20(("mptsas %d volume added\n",
7745                                     mpt->m_instance));
7746 
7747                                 topo_node = kmem_zalloc(
7748                                     sizeof (mptsas_topo_change_list_t),
7749                                     KM_SLEEP);
7750 
7751                                 topo_node->mpt = mpt;
7752                                 topo_node->event =
7753                                     MPTSAS_DR_EVENT_RECONFIG_TARGET;
7754                                 topo_node->un.physport = 0xff;
7755                                 topo_node->devhdl = volhandle;
7756                                 topo_node->flags =
7757                                     MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7758                                 topo_node->object = NULL;
7759                                 if (topo_head == NULL) {
7760                                         topo_head = topo_tail = topo_node;
7761                                 } else {
7762                                         topo_tail->next = topo_node;
7763                                         topo_tail = topo_node;
7764                                 }
7765                                 break;
7766                         }
7767                         case MPI2_EVENT_IR_CHANGE_RC_REMOVED:
7768                         case MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED:
7769                         {
7770                                 NDBG20(("mptsas %d volume deleted\n",
7771                                     mpt->m_instance));
7772                                 ptgt = refhash_linear_search(mpt->m_targets,
7773                                     mptsas_target_eval_devhdl, &volhandle);
7774                                 if (ptgt == NULL)
7775                                         break;
7776 
7777                                 /*
7778                                  * Clear any flags related to volume
7779                                  */
7780                                 (void) mptsas_delete_volume(mpt, volhandle);
7781 
7782                                 /*
7783                                  * Update DR flag immediately avoid I/O failure
7784                                  */
7785                                 ptgt->m_dr_flag = MPTSAS_DR_INTRANSITION;
7786 
7787                                 topo_node = kmem_zalloc(
7788                                     sizeof (mptsas_topo_change_list_t),
7789                                     KM_SLEEP);
7790                                 topo_node->mpt = mpt;
7791                                 topo_node->un.phymask =
7792                                     ptgt->m_addr.mta_phymask;
7793                                 topo_node->event =
7794                                     MPTSAS_DR_EVENT_OFFLINE_TARGET;
7795                                 topo_node->devhdl = volhandle;
7796                                 topo_node->flags =
7797                                     MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7798                                 topo_node->object = (void *)ptgt;
7799                                 if (topo_head == NULL) {
7800                                         topo_head = topo_tail = topo_node;
7801                                 } else {
7802                                         topo_tail->next = topo_node;
7803                                         topo_tail = topo_node;
7804                                 }
7805                                 break;
7806                         }
7807                         case MPI2_EVENT_IR_CHANGE_RC_PD_CREATED:
7808                         case MPI2_EVENT_IR_CHANGE_RC_HIDE:
7809                         {
7810                                 ptgt = refhash_linear_search(mpt->m_targets,
7811                                     mptsas_target_eval_devhdl, &diskhandle);
7812                                 if (ptgt == NULL)
7813                                         break;
7814 
7815                                 /*
7816                                  * Update DR flag immediately avoid I/O failure
7817                                  */
7818                                 ptgt->m_dr_flag = MPTSAS_DR_INTRANSITION;
7819 
7820                                 topo_node = kmem_zalloc(
7821                                     sizeof (mptsas_topo_change_list_t),
7822                                     KM_SLEEP);
7823                                 topo_node->mpt = mpt;
7824                                 topo_node->un.phymask =
7825                                     ptgt->m_addr.mta_phymask;
7826                                 topo_node->event =
7827                                     MPTSAS_DR_EVENT_OFFLINE_TARGET;
7828                                 topo_node->devhdl = diskhandle;
7829                                 topo_node->flags =
7830                                     MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7831                                 topo_node->object = (void *)ptgt;
7832                                 if (topo_head == NULL) {
7833                                         topo_head = topo_tail = topo_node;
7834                                 } else {
7835                                         topo_tail->next = topo_node;
7836                                         topo_tail = topo_node;
7837                                 }
7838                                 break;
7839                         }
7840                         case MPI2_EVENT_IR_CHANGE_RC_UNHIDE:
7841                         case MPI2_EVENT_IR_CHANGE_RC_PD_DELETED:
7842                         {
7843                                 /*
7844                                  * The physical drive is released by a IR
7845                                  * volume. But we cannot get the the physport
7846                                  * or phynum from the event data, so we only
7847                                  * can get the physport/phynum after SAS
7848                                  * Device Page0 request for the devhdl.
7849                                  */
7850                                 topo_node = kmem_zalloc(
7851                                     sizeof (mptsas_topo_change_list_t),
7852                                     KM_SLEEP);
7853                                 topo_node->mpt = mpt;
7854                                 topo_node->un.phymask = 0;
7855                                 topo_node->event =
7856                                     MPTSAS_DR_EVENT_RECONFIG_TARGET;
7857                                 topo_node->devhdl = diskhandle;
7858                                 topo_node->flags =
7859                                     MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7860                                 topo_node->object = NULL;
7861                                 mpt->m_port_chng = 1;
7862                                 if (topo_head == NULL) {
7863                                         topo_head = topo_tail = topo_node;
7864                                 } else {
7865                                         topo_tail->next = topo_node;
7866                                         topo_tail = topo_node;
7867                                 }
7868                                 break;
7869                         }
7870                         default:
7871                                 break;
7872                         }
7873                 }
7874 
7875                 if (topo_head != NULL) {
7876                         /*
7877                          * Launch DR taskq to handle topology change
7878                          */
7879                         if ((ddi_taskq_dispatch(mpt->m_dr_taskq,
7880                             mptsas_handle_dr, (void *)topo_head,
7881                             DDI_NOSLEEP)) != DDI_SUCCESS) {
7882                                 while (topo_head != NULL) {
7883                                         topo_node = topo_head;
7884                                         topo_head = topo_head->next;
7885                                         kmem_free(topo_node,
7886                                             sizeof (mptsas_topo_change_list_t));
7887                                 }
7888                                 mptsas_log(mpt, CE_NOTE, "mptsas start taskq "
7889                                     "for handle SAS DR event failed. \n");
7890                         }
7891                 }
7892                 break;
7893         }
7894         default:
7895                 return (DDI_FAILURE);
7896         }
7897 
7898         return (DDI_SUCCESS);
7899 }
7900 
7901 /*
7902  * handle events from ioc
7903  */
7904 static void
7905 mptsas_handle_event(void *args)
7906 {
7907         m_replyh_arg_t                  *replyh_arg;
7908         pMpi2EventNotificationReply_t   eventreply;
7909         uint32_t                        event, iocloginfo, rfm;
7910         uint32_t                        status;
7911         uint8_t                         port;
7912         mptsas_t                        *mpt;
7913         uint_t                          iocstatus;
7914 
7915         replyh_arg = (m_replyh_arg_t *)args;
7916         rfm = replyh_arg->rfm;
7917         mpt = replyh_arg->mpt;
7918 
7919         mutex_enter(&mpt->m_mutex);
7920         /*
7921          * If HBA is being reset, drop incoming event.
7922          */
7923         if (mpt->m_in_reset) {
7924                 NDBG20(("dropping event received prior to reset"));
7925                 mutex_exit(&mpt->m_mutex);
7926                 return;
7927         }
7928 
7929         eventreply = (pMpi2EventNotificationReply_t)
7930             (mpt->m_reply_frame + (rfm -
7931             (mpt->m_reply_frame_dma_addr&0xfffffffful)));
7932         event = ddi_get16(mpt->m_acc_reply_frame_hdl, &eventreply->Event);
7933 
7934         if (iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
7935             &eventreply->IOCStatus)) {
7936                 if (iocstatus == MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
7937                         mptsas_log(mpt, CE_WARN,
7938                             "!mptsas_handle_event: IOCStatus=0x%x, "
7939                             "IOCLogInfo=0x%x", iocstatus,
7940                             ddi_get32(mpt->m_acc_reply_frame_hdl,
7941                             &eventreply->IOCLogInfo));
7942                 } else {
7943                         mptsas_log(mpt, CE_WARN,
7944                             "mptsas_handle_event: IOCStatus=0x%x, "
7945                             "IOCLogInfo=0x%x", iocstatus,
7946                             ddi_get32(mpt->m_acc_reply_frame_hdl,
7947                             &eventreply->IOCLogInfo));
7948                 }
7949         }
7950 
7951         /*
7952          * figure out what kind of event we got and handle accordingly
7953          */
7954         switch (event) {
7955         case MPI2_EVENT_LOG_ENTRY_ADDED:
7956                 break;
7957         case MPI2_EVENT_LOG_DATA:
7958                 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
7959                     &eventreply->IOCLogInfo);
7960                 NDBG20(("mptsas %d log info %x received.\n", mpt->m_instance,
7961                     iocloginfo));
7962                 break;
7963         case MPI2_EVENT_STATE_CHANGE:
7964                 NDBG20(("mptsas3%d state change.", mpt->m_instance));
7965                 break;
7966         case MPI2_EVENT_HARD_RESET_RECEIVED:
7967                 NDBG20(("mptsas3%d event change.", mpt->m_instance));
7968                 break;
7969         case MPI2_EVENT_SAS_DISCOVERY:
7970         {
7971                 MPI2_EVENT_DATA_SAS_DISCOVERY   *sasdiscovery;
7972                 char                            string[80];
7973                 uint8_t                         rc;
7974 
7975                 sasdiscovery =
7976                     (pMpi2EventDataSasDiscovery_t)eventreply->EventData;
7977 
7978                 rc = ddi_get8(mpt->m_acc_reply_frame_hdl,
7979                     &sasdiscovery->ReasonCode);
7980                 port = ddi_get8(mpt->m_acc_reply_frame_hdl,
7981                     &sasdiscovery->PhysicalPort);
7982                 status = ddi_get32(mpt->m_acc_reply_frame_hdl,
7983                     &sasdiscovery->DiscoveryStatus);
7984 
7985                 string[0] = 0;
7986                 switch (rc) {
7987                 case MPI2_EVENT_SAS_DISC_RC_STARTED:
7988                         (void) sprintf(string, "STARTING");
7989                         break;
7990                 case MPI2_EVENT_SAS_DISC_RC_COMPLETED:
7991                         (void) sprintf(string, "COMPLETED");
7992                         break;
7993                 default:
7994                         (void) sprintf(string, "UNKNOWN");
7995                         break;
7996                 }
7997 
7998                 NDBG20(("SAS DISCOVERY is %s for port %d, status %x", string,
7999                     port, status));
8000 
8001                 break;
8002         }
8003         case MPI2_EVENT_EVENT_CHANGE:
8004                 NDBG20(("mptsas3%d event change.", mpt->m_instance));
8005                 break;
8006         case MPI2_EVENT_TASK_SET_FULL:
8007         {
8008                 pMpi2EventDataTaskSetFull_t     taskfull;
8009 
8010                 taskfull = (pMpi2EventDataTaskSetFull_t)eventreply->EventData;
8011 
8012                 NDBG20(("TASK_SET_FULL received for mptsas3%d, depth %d\n",
8013                     mpt->m_instance,  ddi_get16(mpt->m_acc_reply_frame_hdl,
8014                     &taskfull->CurrentDepth)));
8015                 break;
8016         }
8017         case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
8018         {
8019                 /*
8020                  * SAS TOPOLOGY CHANGE LIST Event has already been handled
8021                  * in mptsas_handle_event_sync() of interrupt context
8022                  */
8023                 break;
8024         }
8025         case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
8026         {
8027                 pMpi2EventDataSasEnclDevStatusChange_t  encstatus;
8028                 uint8_t                                 rc;
8029                 char                                    string[80];
8030 
8031                 encstatus = (pMpi2EventDataSasEnclDevStatusChange_t)
8032                     eventreply->EventData;
8033 
8034                 rc = ddi_get8(mpt->m_acc_reply_frame_hdl,
8035                     &encstatus->ReasonCode);
8036                 switch (rc) {
8037                 case MPI2_EVENT_SAS_ENCL_RC_ADDED:
8038                         (void) sprintf(string, "added");
8039                         break;
8040                 case MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING:
8041                         (void) sprintf(string, ", not responding");
8042                         break;
8043                 default:
8044                 break;
8045                 }
8046                 NDBG20(("mptsas3%d ENCLOSURE STATUS CHANGE for enclosure "
8047                     "%x%s\n", mpt->m_instance,
8048                     ddi_get16(mpt->m_acc_reply_frame_hdl,
8049                     &encstatus->EnclosureHandle), string));
8050                 break;
8051         }
8052 
8053         /*
8054          * MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE is handled by
8055          * mptsas_handle_event_sync,in here just send ack message.
8056          */
8057         case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
8058         {
8059                 pMpi2EventDataSasDeviceStatusChange_t   statuschange;
8060                 uint8_t                                 rc;
8061                 uint16_t                                devhdl;
8062                 uint64_t                                wwn = 0;
8063                 uint32_t                                wwn_lo, wwn_hi;
8064 
8065                 statuschange = (pMpi2EventDataSasDeviceStatusChange_t)
8066                     eventreply->EventData;
8067                 rc = ddi_get8(mpt->m_acc_reply_frame_hdl,
8068                     &statuschange->ReasonCode);
8069                 wwn_lo = ddi_get32(mpt->m_acc_reply_frame_hdl,
8070                     (uint32_t *)(void *)&statuschange->SASAddress);
8071                 wwn_hi = ddi_get32(mpt->m_acc_reply_frame_hdl,
8072                     (uint32_t *)(void *)&statuschange->SASAddress + 1);
8073                 wwn = ((uint64_t)wwn_hi << 32) | wwn_lo;
8074                 devhdl =  ddi_get16(mpt->m_acc_reply_frame_hdl,
8075                     &statuschange->DevHandle);
8076 
8077                 NDBG13(("MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE wwn is %"PRIx64,
8078                     wwn));
8079 
8080                 switch (rc) {
8081                 case MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
8082                         NDBG20(("SMART data received, ASC/ASCQ = %02x/%02x",
8083                             ddi_get8(mpt->m_acc_reply_frame_hdl,
8084                             &statuschange->ASC),
8085                             ddi_get8(mpt->m_acc_reply_frame_hdl,
8086                             &statuschange->ASCQ)));
8087                         break;
8088 
8089                 case MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED:
8090                         NDBG20(("Device not supported"));
8091                         break;
8092 
8093                 case MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
8094                         NDBG20(("IOC internally generated the Target Reset "
8095                             "for devhdl:%x", devhdl));
8096                         break;
8097 
8098                 case MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET:
8099                         NDBG20(("IOC's internally generated Target Reset "
8100                             "completed for devhdl:%x", devhdl));
8101                         break;
8102 
8103                 case MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
8104                         NDBG20(("IOC internally generated Abort Task"));
8105                         break;
8106 
8107                 case MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL:
8108                         NDBG20(("IOC's internally generated Abort Task "
8109                             "completed"));
8110                         break;
8111 
8112                 case MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
8113                         NDBG20(("IOC internally generated Abort Task Set"));
8114                         break;
8115 
8116                 case MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
8117                         NDBG20(("IOC internally generated Clear Task Set"));
8118                         break;
8119 
8120                 case MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
8121                         NDBG20(("IOC internally generated Query Task"));
8122                         break;
8123 
8124                 case MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION:
8125                         NDBG20(("Device sent an Asynchronous Notification"));
8126                         break;
8127 
8128                 default:
8129                         break;
8130                 }
8131                 break;
8132         }
8133         case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
8134         {
8135                 /*
8136                  * IR TOPOLOGY CHANGE LIST Event has already been handled
8137                  * in mpt_handle_event_sync() of interrupt context
8138                  */
8139                 break;
8140         }
8141         case MPI2_EVENT_IR_OPERATION_STATUS:
8142         {
8143                 Mpi2EventDataIrOperationStatus_t        *irOpStatus;
8144                 char                                    reason_str[80];
8145                 uint8_t                                 rc, percent;
8146                 uint16_t                                handle;
8147 
8148                 irOpStatus = (pMpi2EventDataIrOperationStatus_t)
8149                     eventreply->EventData;
8150                 rc = ddi_get8(mpt->m_acc_reply_frame_hdl,
8151                     &irOpStatus->RAIDOperation);
8152                 percent = ddi_get8(mpt->m_acc_reply_frame_hdl,
8153                     &irOpStatus->PercentComplete);
8154                 handle = ddi_get16(mpt->m_acc_reply_frame_hdl,
8155                     &irOpStatus->VolDevHandle);
8156 
8157                 switch (rc) {
8158                         case MPI2_EVENT_IR_RAIDOP_RESYNC:
8159                                 (void) sprintf(reason_str, "resync");
8160                                 break;
8161                         case MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION:
8162                                 (void) sprintf(reason_str, "online capacity "
8163                                     "expansion");
8164                                 break;
8165                         case MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK:
8166                                 (void) sprintf(reason_str, "consistency check");
8167                                 break;
8168                         default:
8169                                 (void) sprintf(reason_str, "unknown reason %x",
8170                                     rc);
8171                 }
8172 
8173                 NDBG20(("mptsas3%d raid operational status: (%s)"
8174                     "\thandle(0x%04x), percent complete(%d)\n",
8175                     mpt->m_instance, reason_str, handle, percent));
8176                 break;
8177         }
8178         case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
8179         {
8180                 pMpi2EventDataSasBroadcastPrimitive_t   sas_broadcast;
8181                 uint8_t                                 phy_num;
8182                 uint8_t                                 primitive;
8183 
8184                 sas_broadcast = (pMpi2EventDataSasBroadcastPrimitive_t)
8185                     eventreply->EventData;
8186 
8187                 phy_num = ddi_get8(mpt->m_acc_reply_frame_hdl,
8188                     &sas_broadcast->PhyNum);
8189                 primitive = ddi_get8(mpt->m_acc_reply_frame_hdl,
8190                     &sas_broadcast->Primitive);
8191 
8192                 switch (primitive) {
8193                 case MPI2_EVENT_PRIMITIVE_CHANGE:
8194                         mptsas_smhba_log_sysevent(mpt,
8195                             ESC_SAS_HBA_PORT_BROADCAST,
8196                             SAS_PORT_BROADCAST_CHANGE,
8197                             &mpt->m_phy_info[phy_num].smhba_info);
8198                         break;
8199                 case MPI2_EVENT_PRIMITIVE_SES:
8200                         mptsas_smhba_log_sysevent(mpt,
8201                             ESC_SAS_HBA_PORT_BROADCAST,
8202                             SAS_PORT_BROADCAST_SES,
8203                             &mpt->m_phy_info[phy_num].smhba_info);
8204                         break;
8205                 case MPI2_EVENT_PRIMITIVE_EXPANDER:
8206                         mptsas_smhba_log_sysevent(mpt,
8207                             ESC_SAS_HBA_PORT_BROADCAST,
8208                             SAS_PORT_BROADCAST_D01_4,
8209                             &mpt->m_phy_info[phy_num].smhba_info);
8210                         break;
8211                 case MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT:
8212                         mptsas_smhba_log_sysevent(mpt,
8213                             ESC_SAS_HBA_PORT_BROADCAST,
8214                             SAS_PORT_BROADCAST_D04_7,
8215                             &mpt->m_phy_info[phy_num].smhba_info);
8216                         break;
8217                 case MPI2_EVENT_PRIMITIVE_RESERVED3:
8218                         mptsas_smhba_log_sysevent(mpt,
8219                             ESC_SAS_HBA_PORT_BROADCAST,
8220                             SAS_PORT_BROADCAST_D16_7,
8221                             &mpt->m_phy_info[phy_num].smhba_info);
8222                         break;
8223                 case MPI2_EVENT_PRIMITIVE_RESERVED4:
8224                         mptsas_smhba_log_sysevent(mpt,
8225                             ESC_SAS_HBA_PORT_BROADCAST,
8226                             SAS_PORT_BROADCAST_D29_7,
8227                             &mpt->m_phy_info[phy_num].smhba_info);
8228                         break;
8229                 case MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED:
8230                         mptsas_smhba_log_sysevent(mpt,
8231                             ESC_SAS_HBA_PORT_BROADCAST,
8232                             SAS_PORT_BROADCAST_D24_0,
8233                             &mpt->m_phy_info[phy_num].smhba_info);
8234                         break;
8235                 case MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED:
8236                         mptsas_smhba_log_sysevent(mpt,
8237                             ESC_SAS_HBA_PORT_BROADCAST,
8238                             SAS_PORT_BROADCAST_D27_4,
8239                             &mpt->m_phy_info[phy_num].smhba_info);
8240                         break;
8241                 default:
8242                         NDBG16(("mptsas3%d: unknown BROADCAST PRIMITIVE"
8243                             " %x received",
8244                             mpt->m_instance, primitive));
8245                         break;
8246                 }
8247                 NDBG16(("mptsas3%d sas broadcast primitive: "
8248                     "\tprimitive(0x%04x), phy(%d) complete\n",
8249                     mpt->m_instance, primitive, phy_num));
8250                 break;
8251         }
8252         case MPI2_EVENT_IR_VOLUME:
8253         {
8254                 Mpi2EventDataIrVolume_t         *irVolume;
8255                 uint16_t                        devhandle;
8256                 uint32_t                        state;
8257                 int                             config, vol;
8258                 uint8_t                         found = FALSE;
8259 
8260                 irVolume = (pMpi2EventDataIrVolume_t)eventreply->EventData;
8261                 state = ddi_get32(mpt->m_acc_reply_frame_hdl,
8262                     &irVolume->NewValue);
8263                 devhandle = ddi_get16(mpt->m_acc_reply_frame_hdl,
8264                     &irVolume->VolDevHandle);
8265 
8266                 NDBG20(("EVENT_IR_VOLUME event is received"));
8267 
8268                 /*
8269                  * Get latest RAID info and then find the DevHandle for this
8270                  * event in the configuration.  If the DevHandle is not found
8271                  * just exit the event.
8272                  */
8273                 (void) mptsas_get_raid_info(mpt);
8274                 for (config = 0; (config < mpt->m_num_raid_configs) &&
8275                     (!found); config++) {
8276                         for (vol = 0; vol < MPTSAS_MAX_RAIDVOLS; vol++) {
8277                                 if (mpt->m_raidconfig[config].m_raidvol[vol].
8278                                     m_raidhandle == devhandle) {
8279                                         found = TRUE;
8280                                         break;
8281                                 }
8282                         }
8283                 }
8284                 if (!found) {
8285                         break;
8286                 }
8287 
8288                 switch (irVolume->ReasonCode) {
8289                 case MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED:
8290                 {
8291                         uint32_t i;
8292                         mpt->m_raidconfig[config].m_raidvol[vol].m_settings =
8293                             state;
8294 
8295                         i = state & MPI2_RAIDVOL0_SETTING_MASK_WRITE_CACHING;
8296                         mptsas_log(mpt, CE_NOTE, " Volume %d settings changed"
8297                             ", auto-config of hot-swap drives is %s"
8298                             ", write caching is %s"
8299                             ", hot-spare pool mask is %02x\n",
8300                             vol, state &
8301                             MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE
8302                             ? "disabled" : "enabled",
8303                             i == MPI2_RAIDVOL0_SETTING_UNCHANGED
8304                             ? "controlled by member disks" :
8305                             i == MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING
8306                             ? "disabled" :
8307                             i == MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING
8308                             ? "enabled" :
8309                             "incorrectly set",
8310                             (state >> 16) & 0xff);
8311                                 break;
8312                 }
8313                 case MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED:
8314                 {
8315                         mpt->m_raidconfig[config].m_raidvol[vol].m_state =
8316                             (uint8_t)state;
8317 
8318                         mptsas_log(mpt, CE_NOTE,
8319                             "Volume %d is now %s\n", vol,
8320                             state == MPI2_RAID_VOL_STATE_OPTIMAL
8321                             ? "optimal" :
8322                             state == MPI2_RAID_VOL_STATE_DEGRADED
8323                             ? "degraded" :
8324                             state == MPI2_RAID_VOL_STATE_ONLINE
8325                             ? "online" :
8326                             state == MPI2_RAID_VOL_STATE_INITIALIZING
8327                             ? "initializing" :
8328                             state == MPI2_RAID_VOL_STATE_FAILED
8329                             ? "failed" :
8330                             state == MPI2_RAID_VOL_STATE_MISSING
8331                             ? "missing" :
8332                             "state unknown");
8333                         break;
8334                 }
8335                 case MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED:
8336                 {
8337                         mpt->m_raidconfig[config].m_raidvol[vol].
8338                             m_statusflags = state;
8339 
8340                         mptsas_log(mpt, CE_NOTE,
8341                             " Volume %d is now %s%s%s%s%s%s%s%s%s\n",
8342                             vol,
8343                             state & MPI2_RAIDVOL0_STATUS_FLAG_ENABLED
8344                             ? ", enabled" : ", disabled",
8345                             state & MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED
8346                             ? ", quiesced" : "",
8347                             state & MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE
8348                             ? ", inactive" : ", active",
8349                             state &
8350                             MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL
8351                             ? ", bad block table is full" : "",
8352                             state &
8353                             MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
8354                             ? ", resync in progress" : "",
8355                             state & MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT
8356                             ? ", background initialization in progress" : "",
8357                             state &
8358                             MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION
8359                             ? ", capacity expansion in progress" : "",
8360                             state &
8361                             MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK
8362                             ? ", consistency check in progress" : "",
8363                             state & MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB
8364                             ? ", data scrub in progress" : "");
8365                         break;
8366                 }
8367                 default:
8368                         break;
8369                 }
8370                 break;
8371         }
8372         case MPI2_EVENT_IR_PHYSICAL_DISK:
8373         {
8374                 Mpi2EventDataIrPhysicalDisk_t   *irPhysDisk;
8375                 uint16_t                        devhandle, enchandle, slot;
8376                 uint32_t                        status, state;
8377                 uint8_t                         physdisknum, reason;
8378 
8379                 irPhysDisk = (Mpi2EventDataIrPhysicalDisk_t *)
8380                     eventreply->EventData;
8381                 physdisknum = ddi_get8(mpt->m_acc_reply_frame_hdl,
8382                     &irPhysDisk->PhysDiskNum);
8383                 devhandle = ddi_get16(mpt->m_acc_reply_frame_hdl,
8384                     &irPhysDisk->PhysDiskDevHandle);
8385                 enchandle = ddi_get16(mpt->m_acc_reply_frame_hdl,
8386                     &irPhysDisk->EnclosureHandle);
8387                 slot = ddi_get16(mpt->m_acc_reply_frame_hdl,
8388                     &irPhysDisk->Slot);
8389                 state = ddi_get32(mpt->m_acc_reply_frame_hdl,
8390                     &irPhysDisk->NewValue);
8391                 reason = ddi_get8(mpt->m_acc_reply_frame_hdl,
8392                     &irPhysDisk->ReasonCode);
8393 
8394                 NDBG20(("EVENT_IR_PHYSICAL_DISK event is received"));
8395 
8396                 switch (reason) {
8397                 case MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED:
8398                         mptsas_log(mpt, CE_NOTE,
8399                             " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8400                             "for enclosure with handle 0x%x is now in hot "
8401                             "spare pool %d",
8402                             physdisknum, devhandle, slot, enchandle,
8403                             (state >> 16) & 0xff);
8404                         break;
8405 
8406                 case MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED:
8407                         status = state;
8408                         mptsas_log(mpt, CE_NOTE,
8409                             " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8410                             "for enclosure with handle 0x%x is now "
8411                             "%s%s%s%s%s\n", physdisknum, devhandle, slot,
8412                             enchandle,
8413                             status & MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME
8414                             ? ", inactive" : ", active",
8415                             status & MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
8416                             ? ", out of sync" : "",
8417                             status & MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED
8418                             ? ", quiesced" : "",
8419                             status &
8420                             MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED
8421                             ? ", write cache enabled" : "",
8422                             status & MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET
8423                             ? ", capacity expansion target" : "");
8424                         break;
8425 
8426                 case MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED:
8427                         mptsas_log(mpt, CE_NOTE,
8428                             " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8429                             "for enclosure with handle 0x%x is now %s\n",
8430                             physdisknum, devhandle, slot, enchandle,
8431                             state == MPI2_RAID_PD_STATE_OPTIMAL
8432                             ? "optimal" :
8433                             state == MPI2_RAID_PD_STATE_REBUILDING
8434                             ? "rebuilding" :
8435                             state == MPI2_RAID_PD_STATE_DEGRADED
8436                             ? "degraded" :
8437                             state == MPI2_RAID_PD_STATE_HOT_SPARE
8438                             ? "a hot spare" :
8439                             state == MPI2_RAID_PD_STATE_ONLINE
8440                             ? "online" :
8441                             state == MPI2_RAID_PD_STATE_OFFLINE
8442                             ? "offline" :
8443                             state == MPI2_RAID_PD_STATE_NOT_COMPATIBLE
8444                             ? "not compatible" :
8445                             state == MPI2_RAID_PD_STATE_NOT_CONFIGURED
8446                             ? "not configured" :
8447                             "state unknown");
8448                         break;
8449                 }
8450                 break;
8451         }
8452         default:
8453                 NDBG20(("mptsas3%d: unknown event %x received",
8454                     mpt->m_instance, event));
8455                 break;
8456         }
8457 
8458         /*
8459          * Return the reply frame to the free queue.
8460          */
8461         ddi_put32(mpt->m_acc_free_queue_hdl,
8462             &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index], rfm);
8463         (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
8464             DDI_DMA_SYNC_FORDEV);
8465         if (++mpt->m_free_index == mpt->m_free_queue_depth) {
8466                 mpt->m_free_index = 0;
8467         }
8468         ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
8469             mpt->m_free_index);
8470         mutex_exit(&mpt->m_mutex);
8471 }
8472 
8473 /*
8474  * invoked from timeout() to restart qfull cmds with throttle == 0
8475  */
8476 static void
8477 mptsas_restart_cmd(void *arg)
8478 {
8479         mptsas_t        *mpt = arg;
8480         mptsas_target_t *ptgt = NULL;
8481 
8482         mutex_enter(&mpt->m_mutex);
8483 
8484         mpt->m_restart_cmd_timeid = 0;
8485 
8486         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
8487             ptgt = refhash_next(mpt->m_targets, ptgt)) {
8488                 mutex_enter(&ptgt->m_t_mutex);
8489                 if (ptgt->m_reset_delay == 0) {
8490                         if (ptgt->m_t_throttle == QFULL_THROTTLE) {
8491                                 mptsas_set_throttle(mpt, ptgt,
8492                                     MAX_THROTTLE);
8493                         }
8494                 }
8495                 mutex_exit(&ptgt->m_t_mutex);
8496         }
8497         mptsas_restart_hba(mpt);
8498         mutex_exit(&mpt->m_mutex);
8499 }
8500 
8501 /*
8502  * Assume some checks have been done prior to calling this
8503  * function so we don't need to consider taking the m_mutex.
8504  */
8505 static void
8506 mptsas_remove_cmd_nomtx(mptsas_t *mpt, mptsas_cmd_t *cmd)
8507 {
8508         int             slot;
8509         mptsas_slots_t  *slots = mpt->m_active;
8510         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
8511 
8512         ASSERT(cmd != NULL);
8513         ASSERT(cmd->cmd_queued == FALSE);
8514         ASSERT((cmd->cmd_flags & CFLAG_CMDIOC) == 0);
8515 
8516         slot = cmd->cmd_slot;
8517 
8518         /*
8519          * remove the cmd.
8520          */
8521         if (cmd == slots->m_slot[slot]) {
8522                 NDBG31(("mptsas_remove_cmd_nomtx: removing cmd=0x%p, flags "
8523                     "0x%x", (void *)cmd, cmd->cmd_flags));
8524                 slots->m_slot[slot] = NULL;
8525                 ASSERT(mpt->m_ncmds != 0);
8526                 atomic_dec_32(&mpt->m_ncmds);
8527                 ASSERT(mpt->m_rep_post_queues[cmd->cmd_rpqidx].rpq_ncmds != 0);
8528                 atomic_dec_32(
8529                     &mpt->m_rep_post_queues[cmd->cmd_rpqidx].rpq_ncmds);
8530 
8531                 /*
8532                  * Decrement per target ncmds, we know this is not an
8533                  * IOC cmd and it therefore has a target associated with it.
8534                  */
8535                 mutex_enter(&ptgt->m_t_mutex);
8536                 ASSERT(ptgt->m_t_ncmds != 0);
8537                 ptgt->m_t_ncmds--;
8538 
8539                 /*
8540                  * reset throttle if we just ran an untagged command
8541                  * to a tagged target
8542                  */
8543                 if ((ptgt->m_t_ncmds == 0) &&
8544                     ((cmd->cmd_pkt_flags & FLAG_TAGMASK) == 0)) {
8545                         mptsas_set_throttle(mpt, ptgt, MAX_THROTTLE);
8546                 }
8547 
8548                 /*
8549                  * Remove this command from the active queue.
8550                  */
8551                 if (cmd->cmd_active_expiration != 0) {
8552                         TAILQ_REMOVE(&ptgt->m_active_cmdq, cmd,
8553                             cmd_active_link);
8554                         cmd->cmd_active_expiration = 0;
8555                 }
8556                 mutex_exit(&ptgt->m_t_mutex);
8557         }
8558 
8559         ASSERT(cmd != slots->m_slot[cmd->cmd_slot]);
8560 }
8561 
8562 void
8563 mptsas_remove_cmd(mptsas_t *mpt, mptsas_cmd_t *cmd)
8564 {
8565         int             slot;
8566         mptsas_slots_t  *slots = mpt->m_active;
8567         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
8568 
8569         ASSERT(cmd != NULL);
8570         ASSERT(cmd->cmd_queued == FALSE);
8571 
8572         /*
8573          * Task Management cmds are removed in their own routines.  Also,
8574          * we don't want to modify timeout based on TM cmds.
8575          */
8576         if (cmd->cmd_flags & CFLAG_TM_CMD) {
8577                 return;
8578         }
8579 
8580         slot = cmd->cmd_slot;
8581 
8582         /*
8583          * remove the cmd.
8584          */
8585         if (cmd == slots->m_slot[slot]) {
8586                 NDBG31(("mptsas_remove_cmd: removing cmd=0x%p, flags 0x%x",
8587                     (void *)cmd, cmd->cmd_flags));
8588                 slots->m_slot[slot] = NULL;
8589                 ASSERT(mpt->m_ncmds != 0);
8590                 atomic_dec_32(&mpt->m_ncmds);
8591                 ASSERT(mpt->m_rep_post_queues[cmd->cmd_rpqidx].rpq_ncmds != 0);
8592                 atomic_dec_32(
8593                     &mpt->m_rep_post_queues[cmd->cmd_rpqidx].rpq_ncmds);
8594 
8595                 /*
8596                  * only decrement per target ncmds if command
8597                  * has a target associated with it.
8598                  */
8599                 if ((cmd->cmd_flags & CFLAG_CMDIOC) == 0) {
8600                         mutex_enter(&ptgt->m_t_mutex);
8601                         ASSERT(ptgt->m_t_ncmds != 0);
8602                         ptgt->m_t_ncmds--;
8603 
8604                         /*
8605                          * reset throttle if we just ran an untagged command
8606                          * to a tagged target
8607                          */
8608                         if ((ptgt->m_t_ncmds == 0) &&
8609                             ((cmd->cmd_pkt_flags & FLAG_TAGMASK) == 0)) {
8610                                 mptsas_set_throttle(mpt, ptgt, MAX_THROTTLE);
8611                         }
8612 
8613                         /*
8614                          * Remove this command from the active queue.
8615                          */
8616                         if (cmd->cmd_active_expiration != 0) {
8617                                 TAILQ_REMOVE(&ptgt->m_active_cmdq, cmd,
8618                                     cmd_active_link);
8619                                 cmd->cmd_active_expiration = 0;
8620                         }
8621                         mutex_exit(&ptgt->m_t_mutex);
8622                 }
8623 
8624         }
8625 
8626         /*
8627          * This is all we need to do for ioc commands.
8628          */
8629         if (cmd->cmd_flags & CFLAG_CMDIOC) {
8630                 mptsas_return_to_pool(mpt, cmd);
8631                 return;
8632         }
8633 
8634         ASSERT(cmd != slots->m_slot[cmd->cmd_slot]);
8635 }
8636 
8637 /*
8638  * accept all cmds on the tx_waitq if any and then
8639  * start a fresh request from the top of the device queue.
8640  *
8641  * since there are always cmds queued on the tx_waitq, and rare cmds on
8642  * the instance waitq, so this function should not be invoked in the ISR,
8643  * the mptsas_restart_waitq() is invoked in the ISR instead. otherwise, the
8644  * burden belongs to the IO dispatch CPUs is moved the interrupt CPU.
8645  */
8646 static void
8647 mptsas_restart_hba(mptsas_t *mpt)
8648 {
8649         ASSERT(mutex_owned(&mpt->m_mutex));
8650 
8651         mptsas_accept_tx_waitqs(mpt);
8652         mptsas_restart_waitq(mpt);
8653 }
8654 
8655 /*
8656  * start a fresh request from the top of the device queue
8657  */
8658 static void
8659 mptsas_restart_waitq(mptsas_t *mpt)
8660 {
8661         mptsas_cmd_t    *cmd, *next_cmd;
8662         mptsas_target_t *ptgt = NULL;
8663 
8664         NDBG1(("mptsas_restart_waitq: mpt=0x%p", (void *)mpt));
8665 
8666         ASSERT(mutex_owned(&mpt->m_mutex));
8667 
8668         /*
8669          * If there is a reset delay, don't start any cmds.  Otherwise, start
8670          * as many cmds as possible.
8671          * Since SMID 0 is reserved and the TM slot is reserved, the actual max
8672          * commands is m_max_requests - 2.
8673          */
8674         cmd = mpt->m_waitq;
8675 
8676         while (cmd != NULL) {
8677                 next_cmd = cmd->cmd_linkp;
8678                 if (cmd->cmd_flags & CFLAG_PASSTHRU) {
8679                         if (mptsas_save_cmd(mpt, cmd) == TRUE) {
8680                                 /*
8681                                  * passthru command get slot need
8682                                  * set CFLAG_PREPARED.
8683                                  */
8684                                 cmd->cmd_flags |= CFLAG_PREPARED;
8685                                 mptsas_waitq_delete(mpt, cmd);
8686                                 mptsas_start_passthru(mpt, cmd);
8687                         }
8688                         cmd = next_cmd;
8689                         continue;
8690                 }
8691                 if (cmd->cmd_flags & CFLAG_CONFIG) {
8692                         if (mptsas_save_cmd(mpt, cmd) == TRUE) {
8693                                 /*
8694                                  * Send the config page request and delete it
8695                                  * from the waitq.
8696                                  */
8697                                 cmd->cmd_flags |= CFLAG_PREPARED;
8698                                 mptsas_waitq_delete(mpt, cmd);
8699                                 mptsas_start_config_page_access(mpt, cmd);
8700                         }
8701                         cmd = next_cmd;
8702                         continue;
8703                 }
8704                 if (cmd->cmd_flags & CFLAG_FW_DIAG) {
8705                         if (mptsas_save_cmd(mpt, cmd) == TRUE) {
8706                                 /*
8707                                  * Send the FW Diag request and delete if from
8708                                  * the waitq.
8709                                  */
8710                                 cmd->cmd_flags |= CFLAG_PREPARED;
8711                                 mptsas_waitq_delete(mpt, cmd);
8712                                 mptsas_start_diag(mpt, cmd);
8713                         }
8714                         cmd = next_cmd;
8715                         continue;
8716                 }
8717 
8718                 ptgt = cmd->cmd_tgt_addr;
8719                 if (ptgt) {
8720                         mutex_enter(&ptgt->m_t_mutex);
8721                         if ((ptgt->m_t_throttle == DRAIN_THROTTLE) &&
8722                             (ptgt->m_t_ncmds == 0)) {
8723                                 mptsas_set_throttle(mpt, ptgt, MAX_THROTTLE);
8724                         }
8725                         if ((mpt->m_ncmds <= (mpt->m_max_requests - 2)) &&
8726                             (ptgt->m_reset_delay == 0) &&
8727                             (ptgt->m_t_ncmds < ptgt->m_t_throttle)) {
8728                                 mutex_exit(&ptgt->m_t_mutex);
8729 
8730                                 if (mptsas_save_cmd(mpt, cmd) == TRUE) {
8731                                         mptsas_waitq_delete(mpt, cmd);
8732                                         mutex_exit(&mpt->m_mutex);
8733                                         (void) mptsas_start_cmd(mpt, cmd);
8734                                         mutex_enter(&mpt->m_mutex);
8735                                         cmd = mpt->m_waitq;
8736                                         continue;
8737                                 }
8738                         } else {
8739                                 mutex_exit(&ptgt->m_t_mutex);
8740                         }
8741                 }
8742                 cmd = next_cmd;
8743         }
8744 }
8745 
8746 /*
8747  * Cmds are queued if scsi_start() doesn't get the m_mutex lock(no wait)
8748  * or if the decision has been made to always do that. Setting
8749  * mptsas_allow_txq_jumping to zero will allow higher performance on
8750  * a heavily loaded system as there is less disruption to the flow here.
8751  * There are 2 threads that handle one queue each. The idea is that
8752  * they take it in turn to grab the m_mutex to run the mptsas_accept_pkt()
8753  * function and then drop it while the cmd is started in mptsas_start_cmd().
8754  */
8755 static void
8756 mptsas_tx_waitq_thread(mptsas_thread_arg_t *arg)
8757 {
8758         mptsas_t *mpt = arg->mpt;
8759         mptsas_tx_waitqueue_t *txwq = &mpt->m_tx_waitq[arg->t];
8760 
8761         mutex_enter(&txwq->txwq_mutex);
8762         while (txwq->txwq_active) {
8763                 mptsas_drain_tx_waitq(mpt, txwq);
8764                 if (txwq->txwq_wdrain) {
8765                         cv_signal(&txwq->txwq_drain_cv);
8766                 }
8767                 cv_wait(&txwq->txwq_cv, &txwq->txwq_mutex);
8768         }
8769         mutex_exit(&txwq->txwq_mutex);
8770         mutex_enter(&mpt->m_qthread_mutex);
8771         mpt->m_txwq_thread_n--;
8772         cv_broadcast(&mpt->m_qthread_cv);
8773         mutex_exit(&mpt->m_qthread_mutex);
8774 }
8775 
8776 /*
8777  * Set the draining flag, disconnect the list and process one at a time
8778  * so that the cmds are sent in order.
8779  */
8780 static void
8781 mptsas_drain_tx_waitq(mptsas_t *mpt, mptsas_tx_waitqueue_t *txwq)
8782 {
8783         mptsas_cmd_t    *cmd, *ncmd;
8784         int             rval, start;
8785 #ifdef MPTSAS_DEBUG
8786         uint32_t        qlen;
8787 #endif
8788 
8789         txwq->txwq_draining = TRUE;
8790 #ifndef __lock_lint
8791         _NOTE(CONSTCOND)
8792 #endif
8793         while (TRUE) {
8794 
8795                 /*
8796                  * A Bus Reset could occur at any time but it will have to
8797                  * wait for the main mutex before flushing the tx_waitq.
8798                  * Pull all commands at once, then follow the list in order to
8799                  * reduce txwq_mutex hold time. If there is a Bus Reset at
8800                  * some point the commands will get to the waitq and then be
8801                  * flushed.
8802                  */
8803                 cmd = txwq->txwq_cmdq;
8804 
8805                 if (cmd == NULL) {
8806                         txwq->txwq_draining = FALSE;
8807                         return;
8808                 }
8809                 txwq->txwq_cmdq = NULL;
8810                 txwq->txwq_qtail = &txwq->txwq_cmdq;
8811 #ifdef MPTSAS_DEBUG
8812                 qlen = txwq->txwq_len;
8813 #endif
8814                 txwq->txwq_len = 0;
8815                 mutex_exit(&txwq->txwq_mutex);
8816 
8817                 while (cmd) {
8818                         ncmd = cmd->cmd_linkp;
8819                         cmd->cmd_linkp = NULL;
8820                         mutex_enter(&mpt->m_mutex);
8821                         start = mptsas_accept_pkt(mpt, cmd, &rval);
8822                         mutex_exit(&mpt->m_mutex);
8823                         if (start) {
8824                                 (void) mptsas_start_cmd(mpt, cmd);
8825                         }
8826                         if (rval != TRAN_ACCEPT)
8827                                 cmn_err(CE_WARN,
8828                                     "mpt: mptsas_drain_tx_waitq: failed "
8829                                     "(rval=0x%x) to accept cmd 0x%p on queue\n",
8830                                     rval, (void *)cmd);
8831                         cmd = ncmd;
8832 #ifdef MPTSAS_DEBUG
8833                         qlen--;
8834 #endif
8835                 }
8836                 ASSERT(qlen == 0);
8837                 mutex_enter(&txwq->txwq_mutex);
8838         }
8839 }
8840 
8841 /*
8842  * Stop the drain threads from picking up a new list.
8843  * Optionally wait for the current list being processed to drain through.
8844  * Add to and processing the tx waitq is now on hold until unblock is called.
8845  */
8846 static void
8847 mptsas_block_tx_waitqs(mptsas_t *mpt, int wait)
8848 {
8849         int             i;
8850         uint8_t         wdrain = 0;
8851         mptsas_tx_waitqueue_t *txwq;
8852 
8853         ASSERT(mutex_owned(&mpt->m_mutex));
8854 
8855         if (mpt->m_txwq_thread_n == 0) {
8856                 return;
8857         }
8858 
8859         /*
8860          * Turn off the use of the tx wait queues by scsi_start().
8861          * This is just a dynamic flag no need for a mutex.
8862          */
8863         mpt->m_txwq_enabled = BLOCKED;
8864 
8865         for (i = 0; i < NUM_TX_WAITQ; i++) {
8866                 txwq = &mpt->m_tx_waitq[i];
8867                 mutex_enter(&txwq->txwq_mutex);
8868                 txwq->txwq_wdrain = TRUE;
8869                 if (txwq->txwq_draining && wait)
8870                         wdrain |= (1<<i);
8871                 mutex_exit(&txwq->txwq_mutex);
8872         }
8873 
8874         if (wdrain) {
8875                 /*
8876                  * Because the threads disconnect the entire queue each time
8877                  * round in order to drain to completely drain we have to
8878                  * drop the main mutex otherwise the drain threads get stuck.
8879                  */
8880                 mutex_exit(&mpt->m_mutex);
8881                 for (i = 0; i < NUM_TX_WAITQ; i++) {
8882                         if (wdrain & (1<<i)) {
8883                                 txwq = &mpt->m_tx_waitq[i];
8884                                 mutex_enter(&txwq->txwq_mutex);
8885                                 while (txwq->txwq_draining) {
8886                                         cv_wait(&txwq->txwq_drain_cv,
8887                                             &txwq->txwq_mutex);
8888                                 }
8889                                 mutex_exit(&txwq->txwq_mutex);
8890                         }
8891                 }
8892                 mutex_enter(&mpt->m_mutex);
8893         }
8894 }
8895 
8896 static void
8897 mptsas_unblock_tx_waitqs(mptsas_t *mpt)
8898 {
8899         int                     i;
8900         mptsas_tx_waitqueue_t   *txwq;
8901 
8902         if (mpt->m_txwq_thread_n == 0) {
8903                 return;
8904         }
8905 
8906         for (i = 0; i < NUM_TX_WAITQ; i++) {
8907                 txwq = &mpt->m_tx_waitq[i];
8908                 mutex_enter(&txwq->txwq_mutex);
8909                 txwq->txwq_wdrain = FALSE;
8910                 cv_signal(&txwq->txwq_cv);
8911                 mutex_exit(&txwq->txwq_mutex);
8912         }
8913 
8914         mpt->m_txwq_enabled = FALSE;
8915 }
8916 
8917 static void
8918 mptsas_accept_tx_waitqs(mptsas_t *mpt)
8919 {
8920         /*
8921          * Block with drain and unblock will leave us in a state where
8922          * we have the main mutex, there is nothing on the tx wait queues
8923          * and they are not in use until watch notices high activity again.
8924          */
8925         mptsas_block_tx_waitqs(mpt, 1);
8926         mptsas_unblock_tx_waitqs(mpt);
8927 }
8928 
8929 /*
8930  * mpt tag type lookup
8931  */
8932 static char mptsas_tag_lookup[] =
8933         {0, MSG_HEAD_QTAG, MSG_ORDERED_QTAG, 0, MSG_SIMPLE_QTAG};
8934 
8935 static int
8936 mptsas_start_cmd(mptsas_t *mpt, mptsas_cmd_t *cmd)
8937 {
8938         struct scsi_pkt         *pkt = CMD2PKT(cmd);
8939         uint32_t                control = 0;
8940         caddr_t                 mem, arsbuf;
8941         pMpi2SCSIIORequest_t    io_request;
8942         ddi_dma_handle_t        dma_hdl = mpt->m_dma_req_frame_hdl;
8943         ddi_acc_handle_t        acc_hdl = mpt->m_acc_req_frame_hdl;
8944         mptsas_target_t         *ptgt = cmd->cmd_tgt_addr;
8945         uint16_t                SMID, io_flags = 0, ars_size;
8946         uint8_t                 MSIidx;
8947         uint64_t                request_desc;
8948         uint32_t                ars_dmaaddrlow;
8949         mptsas_cmd_t            *c;
8950 
8951         NDBG1(("mptsas_start_cmd: cmd=0x%p, flags 0x%x", (void *)cmd,
8952             cmd->cmd_flags));
8953 
8954         /*
8955          * Set SMID and increment index.  Rollover to 1 instead of 0 if index
8956          * is at the max.  0 is an invalid SMID, so we call the first index 1.
8957          */
8958         SMID = cmd->cmd_slot;
8959         MSIidx = cmd->cmd_rpqidx;
8960 
8961         /*
8962          * It is possible for back to back device reset to
8963          * happen before the reset delay has expired.  That's
8964          * ok, just let the device reset go out on the bus.
8965          */
8966         if ((cmd->cmd_pkt_flags & FLAG_NOINTR) == 0) {
8967                 ASSERT(ptgt->m_reset_delay == 0);
8968         }
8969 
8970         /*
8971          * if a non-tagged cmd is submitted to an active tagged target
8972          * then drain before submitting this cmd; SCSI-2 allows RQSENSE
8973          * to be untagged
8974          */
8975         mutex_enter(&ptgt->m_t_mutex);
8976         if (((cmd->cmd_pkt_flags & FLAG_TAGMASK) == 0) &&
8977             (ptgt->m_t_ncmds > 1) &&
8978             ((cmd->cmd_flags & CFLAG_TM_CMD) == 0) &&
8979             (*(cmd->cmd_pkt->pkt_cdbp) != SCMD_REQUEST_SENSE)) {
8980                 if ((cmd->cmd_pkt_flags & FLAG_NOINTR) == 0) {
8981                         NDBG23(("target=%d, untagged cmd, start draining\n",
8982                             ptgt->m_devhdl));
8983 
8984                         if (ptgt->m_reset_delay == 0) {
8985                                 mptsas_set_throttle(mpt, ptgt, DRAIN_THROTTLE);
8986                         }
8987                         mutex_exit(&ptgt->m_t_mutex);
8988 
8989                         mutex_enter(&mpt->m_mutex);
8990                         mptsas_remove_cmd(mpt, cmd);
8991                         cmd->cmd_pkt_flags |= FLAG_HEAD;
8992                         mptsas_waitq_add(mpt, cmd);
8993                         mutex_exit(&mpt->m_mutex);
8994                 } else {
8995                         mutex_exit(&ptgt->m_t_mutex);
8996                 }
8997                 return (DDI_FAILURE);
8998         }
8999 
9000         /*
9001          * Set correct tag bits.
9002          */
9003         if (cmd->cmd_pkt_flags & FLAG_TAGMASK) {
9004                 switch (mptsas_tag_lookup[((cmd->cmd_pkt_flags &
9005                     FLAG_TAGMASK) >> 12)]) {
9006                 case MSG_SIMPLE_QTAG:
9007                         control |= MPI2_SCSIIO_CONTROL_SIMPLEQ;
9008                         break;
9009                 case MSG_HEAD_QTAG:
9010                         control |= MPI2_SCSIIO_CONTROL_HEADOFQ;
9011                         break;
9012                 case MSG_ORDERED_QTAG:
9013                         control |= MPI2_SCSIIO_CONTROL_ORDEREDQ;
9014                         break;
9015                 default:
9016                         mptsas_log(mpt, CE_WARN, "mpt: Invalid tag type\n");
9017                         break;
9018                 }
9019         } else {
9020                 if (*(cmd->cmd_pkt->pkt_cdbp) != SCMD_REQUEST_SENSE) {
9021                                 ptgt->m_t_throttle = 1;
9022                 }
9023                 control |= MPI2_SCSIIO_CONTROL_SIMPLEQ;
9024         }
9025 
9026         /*
9027          * Set timeout.
9028          */
9029         cmd->cmd_active_expiration =
9030             gethrtime() + (hrtime_t)pkt->pkt_time * NANOSEC;
9031 
9032         c = TAILQ_FIRST(&ptgt->m_active_cmdq);
9033         if (c == NULL ||
9034             c->cmd_active_expiration < cmd->cmd_active_expiration) {
9035                 /*
9036                  * Common case is that this is the last pending expiration
9037                  * (or queue is empty). Insert at head of the queue.
9038                  */
9039                 TAILQ_INSERT_HEAD(&ptgt->m_active_cmdq, cmd, cmd_active_link);
9040         } else {
9041                 /*
9042                  * Queue is not empty and first element expires later than
9043                  * this command. Search for element expiring sooner.
9044                  */
9045                 while ((c = TAILQ_NEXT(c, cmd_active_link)) != NULL) {
9046                         if (c->cmd_active_expiration <
9047                             cmd->cmd_active_expiration) {
9048                                 TAILQ_INSERT_BEFORE(c, cmd, cmd_active_link);
9049                                 break;
9050                         }
9051                 }
9052                 if (c == NULL) {
9053                         /*
9054                          * No element found expiring sooner, append to
9055                          * non-empty queue.
9056                          */
9057                         TAILQ_INSERT_TAIL(&ptgt->m_active_cmdq, cmd,
9058                             cmd_active_link);
9059                 }
9060         }
9061 
9062         mutex_exit(&ptgt->m_t_mutex);
9063 
9064         if (cmd->cmd_pkt_flags & FLAG_TLR) {
9065                 control |= MPI2_SCSIIO_CONTROL_TLR_ON;
9066         }
9067 
9068         mem = mpt->m_req_frame + (mpt->m_req_frame_size * SMID);
9069         io_request = (pMpi2SCSIIORequest_t)mem;
9070         if (cmd->cmd_extrqslen != 0) {
9071                 /*
9072                  * Mapping of the buffer was done in mptsas_pkt_alloc_extern().
9073                  * Calculate the DMA address with the same offset.
9074                  */
9075                 arsbuf = cmd->cmd_arq_buf;
9076                 ars_size = cmd->cmd_extrqslen;
9077                 ars_dmaaddrlow = (mpt->m_req_sense_dma_addr +
9078                     ((uintptr_t)arsbuf - (uintptr_t)mpt->m_req_sense)) &
9079                     0xffffffffull;
9080         } else {
9081                 arsbuf = mpt->m_req_sense + (mpt->m_req_sense_size * (SMID-1));
9082                 cmd->cmd_arq_buf = arsbuf;
9083                 ars_size = mpt->m_req_sense_size;
9084                 ars_dmaaddrlow = (mpt->m_req_sense_dma_addr +
9085                     (mpt->m_req_sense_size * (SMID-1))) &
9086                     0xffffffffull;
9087         }
9088         bzero(io_request, sizeof (Mpi2SCSIIORequest_t));
9089         bzero(arsbuf, ars_size);
9090 
9091         ddi_put8(acc_hdl, &io_request->SGLOffset0, offsetof
9092             (MPI2_SCSI_IO_REQUEST, SGL) / 4);
9093         mptsas_init_std_hdr(acc_hdl, io_request, ptgt->m_devhdl, Lun(cmd), 0,
9094             MPI2_FUNCTION_SCSI_IO_REQUEST);
9095 
9096         (void) ddi_rep_put8(acc_hdl, (uint8_t *)pkt->pkt_cdbp,
9097             io_request->CDB.CDB32, cmd->cmd_cdblen, DDI_DEV_AUTOINCR);
9098 
9099         io_flags = cmd->cmd_cdblen;
9100         if (mptsas3_use_fastpath &&
9101             ptgt->m_io_flags & MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) {
9102                 io_flags |= MPI25_SCSIIO_IOFLAGS_FAST_PATH;
9103                 request_desc = MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO;
9104         } else {
9105                 request_desc = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
9106         }
9107         ddi_put16(acc_hdl, &io_request->IoFlags, io_flags);
9108         /*
9109          * setup the Scatter/Gather DMA list for this request
9110          */
9111         if (cmd->cmd_cookiec > 0) {
9112                 mptsas_sge_setup(mpt, cmd, &control, io_request, acc_hdl);
9113         } else {
9114                 ddi_put32(acc_hdl, &io_request->SGL.MpiSimple.FlagsLength,
9115                     ((uint32_t)MPI2_SGE_FLAGS_LAST_ELEMENT |
9116                     MPI2_SGE_FLAGS_END_OF_BUFFER |
9117                     MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
9118                     MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
9119         }
9120 
9121         /*
9122          * save ARQ information
9123          */
9124         ddi_put8(acc_hdl, &io_request->SenseBufferLength, cmd->cmd_rqslen);
9125         ddi_put32(acc_hdl, &io_request->SenseBufferLowAddress, ars_dmaaddrlow);
9126 
9127         ddi_put32(acc_hdl, &io_request->Control, control);
9128 
9129         NDBG31(("starting message=%d(0x%p), with cmd=0x%p",
9130             SMID, (void *)io_request, (void *)cmd));
9131 
9132         (void) ddi_dma_sync(dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
9133 
9134         /*
9135          * Build request descriptor and write it to the request desc post reg.
9136          */
9137         request_desc |= (SMID << 16) + (MSIidx << 8);
9138         request_desc |= ((uint64_t)ptgt->m_devhdl << 48);
9139         MPTSAS_START_CMD(mpt, request_desc);
9140 
9141 #if 0
9142         /* Is this of any benefit here, what is it going to catch? */
9143         if ((mptsas_check_dma_handle(dma_hdl) != DDI_SUCCESS) ||
9144             (mptsas_check_acc_handle(acc_hdl) != DDI_SUCCESS)) {
9145                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
9146                 return (DDI_FAILURE);
9147         }
9148 #endif
9149         return (DDI_SUCCESS);
9150 }
9151 
9152 /*
9153  * Select a helper thread to handle given doneq.
9154  * Note that we don't require to have the main m_mutex here, but worst case
9155  * is that we wont follow the thread rotation to the letter.
9156  * However must ensure we have the mutex that covers the source dlist when
9157  * we actually hand off.
9158  */
9159 static void
9160 mptsas_deliver_doneq_thread(mptsas_t *mpt, mptsas_done_list_t *dlist)
9161 {
9162         uint32_t                        t, i, j = mpt->m_doneq_next_thread;
9163         uint32_t                        min = 0xffffffff;
9164         mptsas_doneq_thread_list_t      *item;
9165 
9166         /*
9167          * No need to take indivudual list mutex's during the loop.
9168          * We are only reading values and the worst that will happen is that
9169          * we pick the wrong thread.
9170          */
9171         for (i = 0; i < mpt->m_doneq_thread_n; i++) {
9172                 item = &mpt->m_doneq_thread_id[j];
9173 
9174                 /*
9175                  * If the completed command on help thread[i] less than
9176                  * doneq_thread_threshold, then pick the thread[j]. Otherwise
9177                  * pick a thread which has least completed command.
9178                  */
9179                 if (item->dlist.dl_len < mpt->m_doneq_thread_threshold) {
9180                         t = j;
9181                         break;
9182                 }
9183                 if (item->dlist.dl_len < min) {
9184                         min = item->dlist.dl_len;
9185                         t = j;
9186                 }
9187                 if (++j == mpt->m_doneq_thread_n) {
9188                         j = 0;
9189                 }
9190         }
9191         item = &mpt->m_doneq_thread_id[t];
9192         mutex_enter(&item->mutex);
9193         mptsas_doneq_mv(dlist, item);
9194         cv_signal(&item->cv);
9195         mutex_exit(&item->mutex);
9196 
9197         /*
9198          * Next time start at the next thread.
9199          * This will minimize the potential of grabing a lock
9200          * for a thread that is busy, either on a very busy systems
9201          * or on one that is configured to do all command completion
9202          * processing through threads.
9203          */
9204         if (++t == mpt->m_doneq_thread_n) {
9205                 t = 0;
9206         }
9207         mpt->m_doneq_next_thread = (uint16_t)t;
9208 }
9209 
9210 /*
9211  * move one doneq to another.
9212  */
9213 static void
9214 mptsas_doneq_mv(mptsas_done_list_t *from, mptsas_doneq_thread_list_t *item)
9215 {
9216         mptsas_done_list_t              *to = &item->dlist;
9217         mptsas_cmd_t                    *cmd;
9218 
9219         if ((cmd = from->dl_q) != NULL) {
9220                 *to->dl_tail = cmd;
9221                 to->dl_tail = from->dl_tail;
9222                 to->dl_len += from->dl_len;
9223                 from->dl_q = NULL;
9224                 from->dl_tail = &from->dl_q;
9225                 from->dl_len = 0;
9226         }
9227 }
9228 
9229 void
9230 mptsas_fma_check(mptsas_t *mpt, mptsas_cmd_t *cmd)
9231 {
9232         struct scsi_pkt *pkt = CMD2PKT(cmd);
9233 
9234         /* Check all acc and dma handles */
9235         if ((mptsas_check_acc_handle(mpt->m_datap) !=
9236             DDI_SUCCESS) ||
9237             (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl) !=
9238             DDI_SUCCESS) ||
9239             (mptsas_check_acc_handle(mpt->m_acc_req_sense_hdl) !=
9240             DDI_SUCCESS) ||
9241             (mptsas_check_acc_handle(mpt->m_acc_reply_frame_hdl) !=
9242             DDI_SUCCESS) ||
9243             (mptsas_check_acc_handle(mpt->m_acc_free_queue_hdl) !=
9244             DDI_SUCCESS) ||
9245             (mptsas_check_acc_handle(mpt->m_acc_post_queue_hdl) !=
9246             DDI_SUCCESS) ||
9247             (mptsas_check_acc_handle(mpt->m_hshk_acc_hdl) !=
9248             DDI_SUCCESS) ||
9249             (mptsas_check_acc_handle(mpt->m_config_handle) !=
9250             DDI_SUCCESS)) {
9251                 ddi_fm_service_impact(mpt->m_dip,
9252                     DDI_SERVICE_UNAFFECTED);
9253                 ddi_fm_acc_err_clear(mpt->m_config_handle,
9254                     DDI_FME_VER0);
9255                 pkt->pkt_reason = CMD_TRAN_ERR;
9256                 pkt->pkt_statistics = 0;
9257         }
9258         if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl) !=
9259             DDI_SUCCESS) ||
9260             (mptsas_check_dma_handle(mpt->m_dma_req_sense_hdl) !=
9261             DDI_SUCCESS) ||
9262             (mptsas_check_dma_handle(mpt->m_dma_reply_frame_hdl) !=
9263             DDI_SUCCESS) ||
9264             (mptsas_check_dma_handle(mpt->m_dma_free_queue_hdl) !=
9265             DDI_SUCCESS) ||
9266             (mptsas_check_dma_handle(mpt->m_dma_post_queue_hdl) !=
9267             DDI_SUCCESS) ||
9268             (mptsas_check_dma_handle(mpt->m_hshk_dma_hdl) !=
9269             DDI_SUCCESS)) {
9270                 ddi_fm_service_impact(mpt->m_dip,
9271                     DDI_SERVICE_UNAFFECTED);
9272                 pkt->pkt_reason = CMD_TRAN_ERR;
9273                 pkt->pkt_statistics = 0;
9274         }
9275         if (cmd->cmd_dmahandle &&
9276             (mptsas_check_dma_handle(cmd->cmd_dmahandle) != DDI_SUCCESS)) {
9277                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
9278                 pkt->pkt_reason = CMD_TRAN_ERR;
9279                 pkt->pkt_statistics = 0;
9280         }
9281         if ((cmd->cmd_extra_frames &&
9282             ((mptsas_check_dma_handle(cmd->cmd_extra_frames->m_dma_hdl) !=
9283             DDI_SUCCESS) ||
9284             (mptsas_check_acc_handle(cmd->cmd_extra_frames->m_acc_hdl) !=
9285             DDI_SUCCESS)))) {
9286                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
9287                 pkt->pkt_reason = CMD_TRAN_ERR;
9288                 pkt->pkt_statistics = 0;
9289         }
9290 }
9291 
9292 /*
9293  * These routines manipulate the queue of commands that
9294  * are waiting for their completion routines to be called.
9295  * The queue is usually in FIFO order but on an MP system
9296  * it's possible for the completion routines to get out
9297  * of order. If that's a problem you need to add a global
9298  * mutex around the code that calls the completion routine
9299  * in the interrupt handler.
9300  */
9301 static void
9302 mptsas_doneq_add(mptsas_t *mpt, mptsas_cmd_t *cmd)
9303 {
9304         struct scsi_pkt *pkt = CMD2PKT(cmd);
9305 
9306         NDBG31(("mptsas_doneq_add: cmd=0x%p", (void *)cmd));
9307 
9308         ASSERT((cmd->cmd_flags & CFLAG_COMPLETED) == 0);
9309         cmd->cmd_linkp = NULL;
9310         cmd->cmd_flags |= CFLAG_FINISHED;
9311         cmd->cmd_flags &= ~CFLAG_IN_TRANSPORT;
9312 
9313         mptsas_fma_check(mpt, cmd);
9314 
9315         /*
9316          * only add scsi pkts that have completion routines to
9317          * the doneq.  no intr cmds do not have callbacks.
9318          */
9319         if (pkt && (pkt->pkt_comp)) {
9320                 *mpt->m_dlist.dl_tail = cmd;
9321                 mpt->m_dlist.dl_tail = &cmd->cmd_linkp;
9322                 mpt->m_dlist.dl_len++;
9323         }
9324 }
9325 
9326 static void
9327 mptsas_rpdoneq_add(mptsas_t *mpt, mptsas_reply_pqueue_t *rpqp,
9328     mptsas_cmd_t *cmd)
9329 {
9330         struct scsi_pkt *pkt = CMD2PKT(cmd);
9331 
9332         NDBG31(("mptsas_rpdoneq_add: cmd=0x%p", (void *)cmd));
9333 
9334         ASSERT((cmd->cmd_flags & CFLAG_COMPLETED) == 0);
9335         cmd->cmd_linkp = NULL;
9336         cmd->cmd_flags |= CFLAG_FINISHED;
9337         cmd->cmd_flags &= ~CFLAG_IN_TRANSPORT;
9338 
9339         mptsas_fma_check(mpt, cmd);
9340 
9341         /*
9342          * only add scsi pkts that have completion routines to
9343          * the doneq.  no intr cmds do not have callbacks.
9344          */
9345         if (pkt && (pkt->pkt_comp)) {
9346                 *rpqp->rpq_dlist.dl_tail = cmd;
9347                 rpqp->rpq_dlist.dl_tail = &cmd->cmd_linkp;
9348                 rpqp->rpq_dlist.dl_len++;
9349         }
9350 }
9351 
9352 static mptsas_cmd_t *
9353 mptsas_doneq_thread_rm(mptsas_t *mpt, uint64_t t)
9354 {
9355         mptsas_cmd_t                    *cmd;
9356         mptsas_doneq_thread_list_t      *item = &mpt->m_doneq_thread_id[t];
9357 
9358         /* pop one off the done queue */
9359         if ((cmd = item->dlist.dl_q) != NULL) {
9360                 /* if the queue is now empty fix the tail pointer */
9361                 NDBG31(("mptsas_doneq_thread_rm: cmd=0x%p", (void *)cmd));
9362                 if ((item->dlist.dl_q = cmd->cmd_linkp) == NULL) {
9363                         item->dlist.dl_tail = &item->dlist.dl_q;
9364                 }
9365                 cmd->cmd_linkp = NULL;
9366                 item->dlist.dl_len--;
9367         }
9368         return (cmd);
9369 }
9370 
9371 static void
9372 mptsas_doneq_empty(mptsas_t *mpt)
9373 {
9374         if (mpt->m_dlist.dl_q) {
9375                 mptsas_cmd_t    *cmd, *next;
9376                 struct scsi_pkt *pkt;
9377 
9378                 cmd = mpt->m_dlist.dl_q;
9379                 mpt->m_dlist.dl_q = NULL;
9380                 mpt->m_dlist.dl_tail = &mpt->m_dlist.dl_q;
9381                 mpt->m_dlist.dl_len = 0;
9382 
9383                 mutex_exit(&mpt->m_mutex);
9384                 /*
9385                  * run the completion routines of all the
9386                  * completed commands
9387                  */
9388                 while (cmd != NULL) {
9389                         next = cmd->cmd_linkp;
9390                         cmd->cmd_linkp = NULL;
9391                         /* run this command's completion routine */
9392                         cmd->cmd_flags |= CFLAG_COMPLETED;
9393                         pkt = CMD2PKT(cmd);
9394                         mptsas_pkt_comp(pkt, cmd);
9395                         cmd = next;
9396                 }
9397                 mutex_enter(&mpt->m_mutex);
9398         }
9399 }
9400 
9401 static void
9402 mptsas_rpdoneq_empty(mptsas_reply_pqueue_t *rpqp)
9403 {
9404         if (rpqp->rpq_dlist.dl_q) {
9405                 mptsas_cmd_t    *cmd, *next;
9406                 struct scsi_pkt *pkt;
9407 
9408                 cmd = rpqp->rpq_dlist.dl_q;
9409                 rpqp->rpq_dlist.dl_q = NULL;
9410                 rpqp->rpq_dlist.dl_tail = &rpqp->rpq_dlist.dl_q;
9411                 rpqp->rpq_dlist.dl_len = 0;
9412 
9413                 mutex_exit(&rpqp->rpq_mutex);
9414                 /*
9415                  * run the completion routines of all the
9416                  * completed commands
9417                  */
9418                 while (cmd != NULL) {
9419                         next = cmd->cmd_linkp;
9420                         cmd->cmd_linkp = NULL;
9421                         /* run this command's completion routine */
9422                         cmd->cmd_flags |= CFLAG_COMPLETED;
9423                         pkt = CMD2PKT(cmd);
9424                         mptsas_pkt_comp(pkt, cmd);
9425                         cmd = next;
9426                 }
9427                 mutex_enter(&rpqp->rpq_mutex);
9428         }
9429 }
9430 
9431 /*
9432  * These routines manipulate the target's queue of pending requests
9433  */
9434 void
9435 mptsas_waitq_add(mptsas_t *mpt, mptsas_cmd_t *cmd)
9436 {
9437         NDBG7(("mptsas_waitq_add: cmd=0x%p", (void *)cmd));
9438         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
9439         cmd->cmd_queued = TRUE;
9440         if (ptgt)
9441                 ptgt->m_t_nwait++;
9442         if (cmd->cmd_pkt_flags & FLAG_HEAD) {
9443                 if ((cmd->cmd_linkp = mpt->m_waitq) == NULL) {
9444                         mpt->m_waitqtail = &cmd->cmd_linkp;
9445                 }
9446                 mpt->m_waitq = cmd;
9447         } else {
9448                 cmd->cmd_linkp = NULL;
9449                 *(mpt->m_waitqtail) = cmd;
9450                 mpt->m_waitqtail = &cmd->cmd_linkp;
9451         }
9452 }
9453 
9454 static mptsas_cmd_t *
9455 mptsas_waitq_rm(mptsas_t *mpt)
9456 {
9457         mptsas_cmd_t    *cmd;
9458         mptsas_target_t *ptgt;
9459         NDBG7(("mptsas_waitq_rm"));
9460 
9461         MPTSAS_WAITQ_RM(mpt, cmd);
9462 
9463         NDBG7(("mptsas_waitq_rm: cmd=0x%p", (void *)cmd));
9464         if (cmd) {
9465                 ptgt = cmd->cmd_tgt_addr;
9466                 if (ptgt) {
9467                         ptgt->m_t_nwait--;
9468                         ASSERT(ptgt->m_t_nwait >= 0);
9469                 }
9470         }
9471         return (cmd);
9472 }
9473 
9474 /*
9475  * remove specified cmd from the middle of the wait queue.
9476  */
9477 static void
9478 mptsas_waitq_delete(mptsas_t *mpt, mptsas_cmd_t *cmd)
9479 {
9480         mptsas_cmd_t    *prevp = mpt->m_waitq;
9481         mptsas_target_t *ptgt = cmd->cmd_tgt_addr;
9482 
9483         NDBG7(("mptsas_waitq_delete: mpt=0x%p cmd=0x%p",
9484             (void *)mpt, (void *)cmd));
9485         if (ptgt) {
9486                 ptgt->m_t_nwait--;
9487                 ASSERT(ptgt->m_t_nwait >= 0);
9488         }
9489 
9490         if (prevp == cmd) {
9491                 if ((mpt->m_waitq = cmd->cmd_linkp) == NULL)
9492                         mpt->m_waitqtail = &mpt->m_waitq;
9493 
9494                 cmd->cmd_linkp = NULL;
9495                 cmd->cmd_queued = FALSE;
9496                 NDBG7(("mptsas_waitq_delete: mpt=0x%p cmd=0x%p",
9497                     (void *)mpt, (void *)cmd));
9498                 return;
9499         }
9500 
9501         while (prevp != NULL) {
9502                 if (prevp->cmd_linkp == cmd) {
9503                         if ((prevp->cmd_linkp = cmd->cmd_linkp) == NULL)
9504                                 mpt->m_waitqtail = &prevp->cmd_linkp;
9505 
9506                         cmd->cmd_linkp = NULL;
9507                         cmd->cmd_queued = FALSE;
9508                         NDBG7(("mptsas_waitq_delete: mpt=0x%p cmd=0x%p",
9509                             (void *)mpt, (void *)cmd));
9510                         return;
9511                 }
9512                 prevp = prevp->cmd_linkp;
9513         }
9514         cmn_err(CE_PANIC, "mpt: mptsas_waitq_delete: queue botch");
9515 }
9516 
9517 /*
9518  * device and bus reset handling
9519  *
9520  * Notes:
9521  *      - RESET_ALL:    reset the controller
9522  *      - RESET_TARGET: reset the target specified in scsi_address
9523  */
9524 static int
9525 mptsas_scsi_reset(struct scsi_address *ap, int level)
9526 {
9527         mptsas_t                *mpt = ADDR2MPT(ap);
9528         int                     rval;
9529         mptsas_tgt_private_t    *tgt_private;
9530         mptsas_target_t         *ptgt = NULL;
9531 
9532         tgt_private = (mptsas_tgt_private_t *)ap->a_hba_tran->tran_tgt_private;
9533         ptgt = tgt_private->t_private;
9534         if (ptgt == NULL) {
9535                 return (FALSE);
9536         }
9537         NDBG22(("mptsas_scsi_reset: target=%d level=%d", ptgt->m_devhdl,
9538             level));
9539 
9540         mutex_enter(&mpt->m_mutex);
9541         /*
9542          * if we are not in panic set up a reset delay for this target
9543          */
9544         if (!ddi_in_panic()) {
9545                 mptsas_setup_bus_reset_delay(mpt);
9546         } else {
9547                 drv_usecwait(mpt->m_scsi_reset_delay * 1000);
9548         }
9549         rval = mptsas_do_scsi_reset(mpt, ptgt->m_devhdl);
9550         mutex_exit(&mpt->m_mutex);
9551 
9552         /*
9553          * The transport layer expect to only see TRUE and
9554          * FALSE. Therefore, we will adjust the return value
9555          * if mptsas_do_scsi_reset returns FAILED.
9556          */
9557         if (rval == FAILED)
9558                 rval = FALSE;
9559         return (rval);
9560 }
9561 
9562 static int
9563 mptsas_do_scsi_reset(mptsas_t *mpt, uint16_t devhdl)
9564 {
9565         int             rval = FALSE;
9566         uint8_t         config, disk;
9567 
9568         ASSERT(mutex_owned(&mpt->m_mutex));
9569 
9570         if (mptsas_debug_resets) {
9571                 mptsas_log(mpt, CE_WARN, "mptsas_do_scsi_reset: target=%d",
9572                     devhdl);
9573         }
9574 
9575         /*
9576          * Issue a Target Reset message to the target specified but not to a
9577          * disk making up a raid volume.  Just look through the RAID config
9578          * Phys Disk list of DevHandles.  If the target's DevHandle is in this
9579          * list, then don't reset this target.
9580          */
9581         for (config = 0; config < mpt->m_num_raid_configs; config++) {
9582                 for (disk = 0; disk < MPTSAS_MAX_DISKS_IN_CONFIG; disk++) {
9583                         if (devhdl == mpt->m_raidconfig[config].
9584                             m_physdisk_devhdl[disk]) {
9585                                 return (TRUE);
9586                         }
9587                 }
9588         }
9589 
9590         rval = mptsas_ioc_task_management(mpt,
9591             MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET, devhdl, 0, NULL, 0, 0);
9592 
9593         mptsas_doneq_empty(mpt);
9594         return (rval);
9595 }
9596 
9597 static int
9598 mptsas_scsi_reset_notify(struct scsi_address *ap, int flag,
9599         void (*callback)(caddr_t), caddr_t arg)
9600 {
9601         mptsas_t        *mpt = ADDR2MPT(ap);
9602 
9603         NDBG22(("mptsas_scsi_reset_notify: tgt=%d", ap->a_target));
9604 
9605         return (scsi_hba_reset_notify_setup(ap, flag, callback, arg,
9606             &mpt->m_mutex, &mpt->m_reset_notify_listf));
9607 }
9608 
9609 static int
9610 mptsas_get_name(struct scsi_device *sd, char *name, int len)
9611 {
9612         dev_info_t      *lun_dip = NULL;
9613 
9614         ASSERT(sd != NULL);
9615         ASSERT(name != NULL);
9616         lun_dip = sd->sd_dev;
9617         ASSERT(lun_dip != NULL);
9618 
9619         if (mptsas_name_child(lun_dip, name, len) == DDI_SUCCESS) {
9620                 return (1);
9621         } else {
9622                 return (0);
9623         }
9624 }
9625 
9626 static int
9627 mptsas_get_bus_addr(struct scsi_device *sd, char *name, int len)
9628 {
9629         return (mptsas_get_name(sd, name, len));
9630 }
9631 
9632 static void
9633 mptsas_set_throttle(mptsas_t *mpt, mptsas_target_t *ptgt, int what)
9634 {
9635 
9636         NDBG25(("mptsas_set_throttle: throttle=%x", what));
9637 
9638         /*
9639          * if the bus is draining/quiesced, no changes to the throttles
9640          * are allowed. Not allowing change of throttles during draining
9641          * limits error recovery but will reduce draining time
9642          *
9643          * all throttles should have been set to HOLD_THROTTLE
9644          */
9645         if (mpt->m_softstate & (MPTSAS_SS_QUIESCED | MPTSAS_SS_DRAINING)) {
9646                 return;
9647         }
9648 
9649         if (what == HOLD_THROTTLE) {
9650                 ptgt->m_t_throttle = HOLD_THROTTLE;
9651         } else if (ptgt->m_reset_delay == 0) {
9652                 ptgt->m_t_throttle = what;
9653         }
9654 }
9655 
9656 static void
9657 mptsas_set_throttle_mtx(mptsas_t *mpt, mptsas_target_t *ptgt, int what)
9658 {
9659         if (mpt->m_softstate & (MPTSAS_SS_QUIESCED | MPTSAS_SS_DRAINING)) {
9660                 return;
9661         }
9662 
9663         mutex_enter(&ptgt->m_t_mutex);
9664         mptsas_set_throttle(mpt, ptgt, what);
9665         mutex_exit(&ptgt->m_t_mutex);
9666 }
9667 
9668 /*
9669  * Find all commands in the tx_waitq's for target and lun (if lun not -1),
9670  * remove them from the queues and return the linked list.
9671  */
9672 static mptsas_cmd_t *
9673 mptsas_strip_targetlun_from_txwqs(mptsas_t *mpt, ushort_t target, int lun)
9674 {
9675         mptsas_cmd_t            *cmd, *clist, **tailp, **prev_tailp;
9676         mptsas_tx_waitqueue_t   *txwq;
9677         int                     i;
9678 
9679         clist = NULL;
9680         tailp = &clist;
9681 
9682         for (i = 0; i < NUM_TX_WAITQ; i++) {
9683                 txwq = &mpt->m_tx_waitq[i];
9684                 mutex_enter(&txwq->txwq_mutex);
9685                 prev_tailp = &txwq->txwq_cmdq;
9686                 cmd = txwq->txwq_cmdq;
9687                 while (cmd != NULL) {
9688                         if (Tgt(cmd) == target &&
9689                             (lun == -1 || (Lun(cmd) == lun))) {
9690                                 *prev_tailp = cmd->cmd_linkp;
9691                                 *tailp = cmd;
9692                                 tailp = &cmd->cmd_linkp;
9693                                 cmd = cmd->cmd_linkp;
9694                                 *tailp = NULL;
9695                         } else {
9696                                 prev_tailp = &cmd->cmd_linkp;
9697                                 cmd = cmd->cmd_linkp;
9698                         }
9699                 }
9700                 txwq->txwq_qtail = prev_tailp;
9701                 mutex_exit(&txwq->txwq_mutex);
9702         }
9703         return (clist);
9704 }
9705 
9706 /*
9707  * Clean up from a device reset.
9708  * For the case of target reset, this function clears the waitq of all
9709  * commands for a particular target.   For the case of abort task set, this
9710  * function clears the waitq of all commonds for a particular target/lun.
9711  */
9712 static void
9713 mptsas_flush_target(mptsas_t *mpt, ushort_t target, int lun, uint8_t tasktype)
9714 {
9715         mptsas_slots_t  *slots = mpt->m_active;
9716         mptsas_cmd_t    *cmd, *next_cmd;
9717         int             slot;
9718         uchar_t         reason;
9719         uint_t          stat;
9720         hrtime_t        timestamp;
9721 
9722         NDBG25(("mptsas_flush_target: target=%d lun=%d", target, lun));
9723 
9724         timestamp = gethrtime();
9725 
9726         /*
9727          * Make sure the I/O Controller has flushed all cmds
9728          * that are associated with this target for a target reset
9729          * and target/lun for abort task set.
9730          * Account for TM requests, which use the last SMID.
9731          */
9732         for (slot = 0; slot <= mpt->m_active->m_n_normal; slot++) {
9733                 if ((cmd = slots->m_slot[slot]) == NULL)
9734                         continue;
9735                 reason = CMD_RESET;
9736                 stat = STAT_DEV_RESET;
9737                 switch (tasktype) {
9738                 case MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET:
9739                         if (Tgt(cmd) == target) {
9740                                 if (cmd->cmd_active_expiration <= timestamp) {
9741                                         /*
9742                                          * When timeout requested, propagate
9743                                          * proper reason and statistics to
9744                                          * target drivers.
9745                                          */
9746                                         reason = CMD_TIMEOUT;
9747                                         stat |= STAT_TIMEOUT;
9748                                 }
9749                                 NDBG25(("mptsas_flush_target discovered non-"
9750                                     "NULL cmd in slot %d, tasktype 0x%x", slot,
9751                                     tasktype));
9752                                 mptsas_dump_cmd(mpt, cmd);
9753                                 mptsas_remove_cmd(mpt, cmd);
9754                                 mptsas_set_pkt_reason(mpt, cmd, reason, stat);
9755                                 mptsas_doneq_add(mpt, cmd);
9756                         }
9757                         break;
9758                 case MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET:
9759                         reason = CMD_ABORTED;
9760                         stat = STAT_ABORTED;
9761                         /*FALLTHROUGH*/
9762                 case MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET:
9763                         if ((Tgt(cmd) == target) && (Lun(cmd) == lun)) {
9764                                 if (cmd->cmd_active_expiration <= timestamp) {
9765                                         stat |= STAT_TIMEOUT;
9766                                 }
9767 
9768                                 NDBG25(("mptsas_flush_target discovered non-"
9769                                     "NULL cmd in slot %d, tasktype 0x%x", slot,
9770                                     tasktype));
9771                                 mptsas_dump_cmd(mpt, cmd);
9772                                 mptsas_remove_cmd(mpt, cmd);
9773                                 mptsas_set_pkt_reason(mpt, cmd, reason, stat);
9774                                 mptsas_doneq_add(mpt, cmd);
9775                         }
9776                         break;
9777                 default:
9778                         break;
9779                 }
9780         }
9781 
9782         /*
9783          * Flush the waitq and tx_waitq of this target's cmds
9784          */
9785         cmd = mpt->m_waitq;
9786 
9787         reason = CMD_RESET;
9788         stat = STAT_DEV_RESET;
9789 
9790         switch (tasktype) {
9791         case MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET:
9792                 while (cmd != NULL) {
9793                         next_cmd = cmd->cmd_linkp;
9794                         if (Tgt(cmd) == target) {
9795                                 mptsas_waitq_delete(mpt, cmd);
9796                                 mptsas_set_pkt_reason(mpt, cmd,
9797                                     reason, stat);
9798                                 mptsas_doneq_add(mpt, cmd);
9799                         }
9800                         cmd = next_cmd;
9801                 }
9802                 cmd = mptsas_strip_targetlun_from_txwqs(mpt, target, -1);
9803                 while (cmd != NULL) {
9804                         next_cmd = cmd->cmd_linkp;
9805                         mptsas_set_pkt_reason(mpt, cmd, reason, stat);
9806                         mptsas_doneq_add(mpt, cmd);
9807                         cmd = next_cmd;
9808                 }
9809                 break;
9810         case MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET:
9811                 reason = CMD_ABORTED;
9812                 stat =  STAT_ABORTED;
9813                 /*FALLTHROUGH*/
9814         case MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET:
9815                 while (cmd != NULL) {
9816                         next_cmd = cmd->cmd_linkp;
9817                         if ((Tgt(cmd) == target) && (Lun(cmd) == lun)) {
9818                                 mptsas_waitq_delete(mpt, cmd);
9819                                 mptsas_set_pkt_reason(mpt, cmd,
9820                                     reason, stat);
9821                                 mptsas_doneq_add(mpt, cmd);
9822                         }
9823                         cmd = next_cmd;
9824                 }
9825                 cmd = mptsas_strip_targetlun_from_txwqs(mpt, target, lun);
9826                 while (cmd != NULL) {
9827                         next_cmd = cmd->cmd_linkp;
9828                         mptsas_set_pkt_reason(mpt, cmd, reason, stat);
9829                         mptsas_doneq_add(mpt, cmd);
9830                         cmd = next_cmd;
9831                 }
9832                 break;
9833         default:
9834                 mptsas_log(mpt, CE_WARN, "Unknown task management type %d.",
9835                     tasktype);
9836                 break;
9837         }
9838 }
9839 
9840 /*
9841  * Clean up hba state, abort all outstanding command and commands in waitq
9842  * reset timeout of all targets.
9843  */
9844 static void
9845 mptsas_flush_hba(mptsas_t *mpt)
9846 {
9847         mptsas_slots_t  *slots = mpt->m_active;
9848         mptsas_cmd_t    *cmd, *ncmd;
9849         int             slot, i;
9850 
9851         NDBG25(("mptsas_flush_hba"));
9852 
9853         /*
9854          * The I/O Controller should have already sent back
9855          * all commands via the scsi I/O reply frame.  Make
9856          * sure all commands have been flushed.
9857          * Account for TM request, which use the last SMID.
9858          */
9859         for (slot = 0; slot <= mpt->m_active->m_n_normal; slot++) {
9860                 if ((cmd = slots->m_slot[slot]) == NULL)
9861                         continue;
9862 
9863                 if (cmd->cmd_flags & CFLAG_CMDIOC) {
9864                         /*
9865                          * Need to make sure to tell everyone that might be
9866                          * waiting on this command that it's going to fail.  If
9867                          * we get here, this command will never timeout because
9868                          * the active command table is going to be re-allocated,
9869                          * so there will be nothing to check against a time out.
9870                          * Instead, mark the command as failed due to reset.
9871                          */
9872                         mptsas_set_pkt_reason(mpt, cmd, CMD_RESET,
9873                             STAT_BUS_RESET);
9874                         if ((cmd->cmd_flags &
9875                             (CFLAG_PASSTHRU | CFLAG_CONFIG | CFLAG_FW_DIAG))) {
9876                                 cmd->cmd_flags |= CFLAG_FINISHED;
9877                                 cv_broadcast(&mpt->m_passthru_cv);
9878                                 cv_broadcast(&mpt->m_config_cv);
9879                                 cv_broadcast(&mpt->m_fw_diag_cv);
9880                         }
9881                         continue;
9882                 }
9883 
9884                 NDBG25(("mptsas_flush_hba discovered non-NULL cmd in slot %d",
9885                     slot));
9886                 mptsas_dump_cmd(mpt, cmd);
9887 
9888                 mptsas_remove_cmd(mpt, cmd);
9889                 mptsas_set_pkt_reason(mpt, cmd, CMD_RESET, STAT_BUS_RESET);
9890                 mptsas_doneq_add(mpt, cmd);
9891         }
9892 
9893         /*
9894          * Flush the waitq.
9895          */
9896         while ((cmd = mptsas_waitq_rm(mpt)) != NULL) {
9897                 mptsas_set_pkt_reason(mpt, cmd, CMD_RESET, STAT_BUS_RESET);
9898                 if ((cmd->cmd_flags & CFLAG_PASSTHRU) ||
9899                     (cmd->cmd_flags & CFLAG_CONFIG) ||
9900                     (cmd->cmd_flags & CFLAG_FW_DIAG)) {
9901                         cmd->cmd_flags |= CFLAG_FINISHED;
9902                         cv_broadcast(&mpt->m_passthru_cv);
9903                         cv_broadcast(&mpt->m_config_cv);
9904                         cv_broadcast(&mpt->m_fw_diag_cv);
9905                 } else {
9906                         mptsas_doneq_add(mpt, cmd);
9907                 }
9908         }
9909 
9910         /*
9911          * Flush the tx_waitqs
9912          */
9913         for (i = 0; i < NUM_TX_WAITQ; i++) {
9914                 mutex_enter(&mpt->m_tx_waitq[i].txwq_mutex);
9915                 cmd = mpt->m_tx_waitq[i].txwq_cmdq;
9916                 mpt->m_tx_waitq[i].txwq_cmdq = NULL;
9917                 mpt->m_tx_waitq[i].txwq_qtail = &mpt->m_tx_waitq[i].txwq_cmdq;
9918                 mutex_exit(&mpt->m_tx_waitq[i].txwq_mutex);
9919                 while (cmd != NULL) {
9920                         ncmd = cmd->cmd_linkp;
9921                         mptsas_set_pkt_reason(mpt, cmd, CMD_RESET,
9922                             STAT_BUS_RESET);
9923                         mptsas_doneq_add(mpt, cmd);
9924                         cmd = ncmd;
9925                 }
9926         }
9927 
9928         /*
9929          * Drain the taskqs prior to reallocating resources.
9930          */
9931         mutex_exit(&mpt->m_mutex);
9932         ddi_taskq_wait(mpt->m_event_taskq);
9933         ddi_taskq_wait(mpt->m_dr_taskq);
9934         mutex_enter(&mpt->m_mutex);
9935 }
9936 
9937 /*
9938  * set pkt_reason and OR in pkt_statistics flag
9939  */
9940 static void
9941 mptsas_set_pkt_reason(mptsas_t *mpt, mptsas_cmd_t *cmd, uchar_t reason,
9942     uint_t stat)
9943 {
9944 #ifndef __lock_lint
9945         _NOTE(ARGUNUSED(mpt))
9946 #endif
9947 
9948         NDBG25(("mptsas_set_pkt_reason: cmd=0x%p reason=%x stat=%x",
9949             (void *)cmd, reason, stat));
9950 
9951         if (cmd) {
9952                 if (cmd->cmd_pkt->pkt_reason == CMD_CMPLT) {
9953                         cmd->cmd_pkt->pkt_reason = reason;
9954                 }
9955                 cmd->cmd_pkt->pkt_statistics |= stat;
9956         }
9957 }
9958 
9959 static void
9960 mptsas_start_watch_reset_delay()
9961 {
9962         NDBG22(("mptsas_start_watch_reset_delay"));
9963 
9964         mutex_enter(&mptsas_global_mutex);
9965         if (mptsas_reset_watch == NULL && mptsas_timeouts_enabled) {
9966                 mptsas_reset_watch = timeout(mptsas_watch_reset_delay, NULL,
9967                     drv_usectohz((clock_t)
9968                     MPTSAS_WATCH_RESET_DELAY_TICK * 1000));
9969                 ASSERT(mptsas_reset_watch != NULL);
9970         }
9971         mutex_exit(&mptsas_global_mutex);
9972 }
9973 
9974 static void
9975 mptsas_setup_bus_reset_delay(mptsas_t *mpt)
9976 {
9977         mptsas_target_t *ptgt = NULL;
9978 
9979         ASSERT(MUTEX_HELD(&mpt->m_mutex));
9980 
9981         NDBG22(("mptsas_setup_bus_reset_delay"));
9982         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
9983             ptgt = refhash_next(mpt->m_targets, ptgt)) {
9984                 mutex_enter(&ptgt->m_t_mutex);
9985                 mptsas_set_throttle(mpt, ptgt, HOLD_THROTTLE);
9986                 ptgt->m_reset_delay = mpt->m_scsi_reset_delay;
9987                 mutex_exit(&ptgt->m_t_mutex);
9988         }
9989 
9990         mptsas_start_watch_reset_delay();
9991 }
9992 
9993 /*
9994  * mptsas_watch_reset_delay(_subr) is invoked by timeout() and checks every
9995  * mpt instance for active reset delays
9996  */
9997 static void
9998 mptsas_watch_reset_delay(void *arg)
9999 {
10000 #ifndef __lock_lint
10001         _NOTE(ARGUNUSED(arg))
10002 #endif
10003 
10004         mptsas_t        *mpt;
10005         int             not_done = 0;
10006 
10007         NDBG22(("mptsas_watch_reset_delay"));
10008 
10009         mutex_enter(&mptsas_global_mutex);
10010         mptsas_reset_watch = 0;
10011         mutex_exit(&mptsas_global_mutex);
10012         rw_enter(&mptsas_global_rwlock, RW_READER);
10013         for (mpt = mptsas_head; mpt != NULL; mpt = mpt->m_next) {
10014                 if (mpt->m_tran == 0) {
10015                         continue;
10016                 }
10017                 mutex_enter(&mpt->m_mutex);
10018                 not_done += mptsas_watch_reset_delay_subr(mpt);
10019                 mutex_exit(&mpt->m_mutex);
10020         }
10021         rw_exit(&mptsas_global_rwlock);
10022 
10023         if (not_done) {
10024                 mptsas_start_watch_reset_delay();
10025         }
10026 }
10027 
10028 static int
10029 mptsas_watch_reset_delay_subr(mptsas_t *mpt)
10030 {
10031         int             done = 0;
10032         int             restart = 0;
10033         mptsas_target_t *ptgt = NULL;
10034 
10035         NDBG22(("mptsas_watch_reset_delay_subr: mpt=0x%p", (void *)mpt));
10036 
10037         ASSERT(mutex_owned(&mpt->m_mutex));
10038 
10039         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
10040             ptgt = refhash_next(mpt->m_targets, ptgt)) {
10041                 mutex_enter(&ptgt->m_t_mutex);
10042                 if (ptgt->m_reset_delay != 0) {
10043                         ptgt->m_reset_delay -=
10044                             MPTSAS_WATCH_RESET_DELAY_TICK;
10045                         if (ptgt->m_reset_delay <= 0) {
10046                                 ptgt->m_reset_delay = 0;
10047                                 mptsas_set_throttle(mpt, ptgt,
10048                                     MAX_THROTTLE);
10049                                 restart++;
10050                         } else {
10051                                 done = -1;
10052                         }
10053                 }
10054                 mutex_exit(&ptgt->m_t_mutex);
10055         }
10056 
10057         if (restart > 0) {
10058                 mptsas_restart_hba(mpt);
10059         }
10060         return (done);
10061 }
10062 
10063 #ifdef MPTSAS_TEST
10064 static void
10065 mptsas_test_reset(mptsas_t *mpt, int target)
10066 {
10067         mptsas_target_t    *ptgt = NULL;
10068 
10069         if (mptsas_rtest == target) {
10070                 if (mptsas_do_scsi_reset(mpt, target) == TRUE) {
10071                         mptsas_rtest = -1;
10072                 }
10073                 if (mptsas_rtest == -1) {
10074                         NDBG22(("mptsas_test_reset success"));
10075                 }
10076         }
10077 }
10078 #endif
10079 
10080 /*
10081  * abort handling:
10082  *
10083  * Notes:
10084  *      - if pkt is not NULL, abort just that command
10085  *      - if pkt is NULL, abort all outstanding commands for target
10086  */
10087 static int
10088 mptsas_scsi_abort(struct scsi_address *ap, struct scsi_pkt *pkt)
10089 {
10090         mptsas_t                *mpt = ADDR2MPT(ap);
10091         int                     rval;
10092         mptsas_tgt_private_t    *tgt_private;
10093         int                     target, lun;
10094 
10095         tgt_private = (mptsas_tgt_private_t *)ap->a_hba_tran->
10096             tran_tgt_private;
10097         ASSERT(tgt_private != NULL);
10098         target = tgt_private->t_private->m_devhdl;
10099         lun = tgt_private->t_lun;
10100 
10101         NDBG23(("mptsas_scsi_abort: target=%d.%d", target, lun));
10102 
10103         mutex_enter(&mpt->m_mutex);
10104         rval = mptsas_do_scsi_abort(mpt, target, lun, pkt);
10105         mutex_exit(&mpt->m_mutex);
10106         return (rval);
10107 }
10108 
10109 static int
10110 mptsas_do_scsi_abort(mptsas_t *mpt, int target, int lun, struct scsi_pkt *pkt)
10111 {
10112         mptsas_cmd_t    *sp = NULL;
10113         mptsas_slots_t  *slots = mpt->m_active;
10114         int             rval = FALSE;
10115 
10116         ASSERT(mutex_owned(&mpt->m_mutex));
10117 
10118         /*
10119          * Abort the command pkt on the target/lun in ap.  If pkt is
10120          * NULL, abort all outstanding commands on that target/lun.
10121          * If you can abort them, return 1, else return 0.
10122          * Each packet that's aborted should be sent back to the target
10123          * driver through the callback routine, with pkt_reason set to
10124          * CMD_ABORTED.
10125          *
10126          * abort cmd pkt on HBA hardware; clean out of outstanding
10127          * command lists, etc.
10128          */
10129         if (pkt != NULL) {
10130                 /* abort the specified packet */
10131                 sp = PKT2CMD(pkt);
10132 
10133                 if (sp->cmd_queued) {
10134                         NDBG23(("mptsas_do_scsi_abort: queued sp=0x%p aborted",
10135                             (void *)sp));
10136                         mptsas_waitq_delete(mpt, sp);
10137                         mptsas_set_pkt_reason(mpt, sp, CMD_ABORTED,
10138                             STAT_ABORTED);
10139                         mptsas_doneq_add(mpt, sp);
10140                         rval = TRUE;
10141                         goto done;
10142                 }
10143 
10144                 /*
10145                  * Have mpt firmware abort this command
10146                  */
10147 
10148                 if (slots->m_slot[sp->cmd_slot] != NULL) {
10149                         rval = mptsas_ioc_task_management(mpt,
10150                             MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK, target,
10151                             lun, NULL, 0, 0);
10152 
10153                         /*
10154                          * The transport layer expects only TRUE and FALSE.
10155                          * Therefore, if mptsas_ioc_task_management returns
10156                          * FAILED we will return FALSE.
10157                          */
10158                         if (rval == FAILED)
10159                                 rval = FALSE;
10160                         goto done;
10161                 }
10162         }
10163 
10164         /*
10165          * If pkt is NULL then abort task set
10166          */
10167         rval = mptsas_ioc_task_management(mpt,
10168             MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET, target, lun, NULL, 0, 0);
10169 
10170         /*
10171          * The transport layer expects only TRUE and FALSE.
10172          * Therefore, if mptsas_ioc_task_management returns
10173          * FAILED we will return FALSE.
10174          */
10175         if (rval == FAILED)
10176                 rval = FALSE;
10177 
10178 #ifdef MPTSAS_TEST
10179         if (rval && mptsas_test_stop) {
10180                 debug_enter("mptsas_do_scsi_abort");
10181         }
10182 #endif
10183 
10184 done:
10185         mptsas_doneq_empty(mpt);
10186         return (rval);
10187 }
10188 
10189 /*
10190  * capability handling:
10191  * (*tran_getcap).  Get the capability named, and return its value.
10192  */
10193 static int
10194 mptsas_scsi_getcap(struct scsi_address *ap, char *cap, int tgtonly)
10195 {
10196         mptsas_t        *mpt = ADDR2MPT(ap);
10197         int             ckey;
10198         int             rval = FALSE;
10199 
10200         NDBG24(("mptsas_scsi_getcap: target=%d, cap=%s tgtonly=%x",
10201             ap->a_target, cap, tgtonly));
10202 
10203         mutex_enter(&mpt->m_mutex);
10204 
10205         if ((mptsas_scsi_capchk(cap, tgtonly, &ckey)) != TRUE) {
10206                 mutex_exit(&mpt->m_mutex);
10207                 return (UNDEFINED);
10208         }
10209 
10210         switch (ckey) {
10211         case SCSI_CAP_DMA_MAX:
10212                 rval = (int)mpt->m_msg_dma_attr.dma_attr_maxxfer;
10213                 break;
10214         case SCSI_CAP_ARQ:
10215                 rval = TRUE;
10216                 break;
10217         case SCSI_CAP_MSG_OUT:
10218         case SCSI_CAP_PARITY:
10219         case SCSI_CAP_UNTAGGED_QING:
10220                 rval = TRUE;
10221                 break;
10222         case SCSI_CAP_TAGGED_QING:
10223                 rval = TRUE;
10224                 break;
10225         case SCSI_CAP_RESET_NOTIFICATION:
10226                 rval = TRUE;
10227                 break;
10228         case SCSI_CAP_LINKED_CMDS:
10229                 rval = FALSE;
10230                 break;
10231         case SCSI_CAP_QFULL_RETRIES:
10232                 rval = ((mptsas_tgt_private_t *)(ap->a_hba_tran->
10233                     tran_tgt_private))->t_private->m_qfull_retries;
10234                 break;
10235         case SCSI_CAP_QFULL_RETRY_INTERVAL:
10236                 rval = drv_hztousec(((mptsas_tgt_private_t *)
10237                     (ap->a_hba_tran->tran_tgt_private))->
10238                     t_private->m_qfull_retry_interval) / 1000;
10239                 break;
10240         case SCSI_CAP_CDB_LEN:
10241                 rval = CDB_GROUP4;
10242                 break;
10243         case SCSI_CAP_INTERCONNECT_TYPE:
10244                 rval = INTERCONNECT_SAS;
10245                 break;
10246         case SCSI_CAP_TRAN_LAYER_RETRIES:
10247                 if (mpt->m_ioc_capabilities &
10248                     MPI2_IOCFACTS_CAPABILITY_TLR)
10249                         rval = TRUE;
10250                 else
10251                         rval = FALSE;
10252                 break;
10253         default:
10254                 rval = UNDEFINED;
10255                 break;
10256         }
10257 
10258         NDBG24(("mptsas_scsi_getcap: %s, rval=%x", cap, rval));
10259 
10260         mutex_exit(&mpt->m_mutex);
10261         return (rval);
10262 }
10263 
10264 /*
10265  * (*tran_setcap).  Set the capability named to the value given.
10266  */
10267 static int
10268 mptsas_scsi_setcap(struct scsi_address *ap, char *cap, int value, int tgtonly)
10269 {
10270         mptsas_t        *mpt = ADDR2MPT(ap);
10271         mptsas_target_t *ptgt;
10272         int             ckey;
10273         int             rval = FALSE;
10274 
10275         NDBG24(("mptsas_scsi_setcap: target=%d, cap=%s value=%x tgtonly=%x",
10276             ap->a_target, cap, value, tgtonly));
10277 
10278         if (!tgtonly) {
10279                 return (rval);
10280         }
10281 
10282         mutex_enter(&mpt->m_mutex);
10283 
10284         if ((mptsas_scsi_capchk(cap, tgtonly, &ckey)) != TRUE) {
10285                 mutex_exit(&mpt->m_mutex);
10286                 return (UNDEFINED);
10287         }
10288 
10289         switch (ckey) {
10290         case SCSI_CAP_DMA_MAX:
10291         case SCSI_CAP_MSG_OUT:
10292         case SCSI_CAP_PARITY:
10293         case SCSI_CAP_INITIATOR_ID:
10294         case SCSI_CAP_LINKED_CMDS:
10295         case SCSI_CAP_UNTAGGED_QING:
10296         case SCSI_CAP_RESET_NOTIFICATION:
10297                 /*
10298                  * None of these are settable via
10299                  * the capability interface.
10300                  */
10301                 break;
10302         case SCSI_CAP_ARQ:
10303                 /*
10304                  * We cannot turn off arq so return false if asked to
10305                  */
10306                 if (value) {
10307                         rval = TRUE;
10308                 } else {
10309                         rval = FALSE;
10310                 }
10311                 break;
10312         case SCSI_CAP_TAGGED_QING:
10313                 ptgt = ((mptsas_tgt_private_t *)
10314                     (ap->a_hba_tran->tran_tgt_private))->t_private;
10315                 mptsas_set_throttle_mtx(mpt, ptgt, MAX_THROTTLE);
10316                 rval = TRUE;
10317                 break;
10318         case SCSI_CAP_QFULL_RETRIES:
10319                 ((mptsas_tgt_private_t *)(ap->a_hba_tran->tran_tgt_private))->
10320                     t_private->m_qfull_retries = (uchar_t)value;
10321                 rval = TRUE;
10322                 break;
10323         case SCSI_CAP_QFULL_RETRY_INTERVAL:
10324                 ((mptsas_tgt_private_t *)(ap->a_hba_tran->tran_tgt_private))->
10325                     t_private->m_qfull_retry_interval =
10326                     drv_usectohz(value * 1000);
10327                 rval = TRUE;
10328                 break;
10329         default:
10330                 rval = UNDEFINED;
10331                 break;
10332         }
10333         mutex_exit(&mpt->m_mutex);
10334         return (rval);
10335 }
10336 
10337 /*
10338  * Utility routine for mptsas_ifsetcap/ifgetcap
10339  */
10340 /*ARGSUSED*/
10341 static int
10342 mptsas_scsi_capchk(char *cap, int tgtonly, int *cidxp)
10343 {
10344         NDBG24(("mptsas_scsi_capchk: cap=%s", cap));
10345 
10346         if (!cap)
10347                 return (FALSE);
10348 
10349         *cidxp = scsi_hba_lookup_capstr(cap);
10350         return (TRUE);
10351 }
10352 
10353 static int
10354 mptsas_alloc_active_slots(mptsas_t *mpt, int flag)
10355 {
10356         mptsas_slots_t  *old_active = mpt->m_active;
10357         mptsas_slots_t  *new_active;
10358         size_t          size;
10359 
10360         /*
10361          * if there are active commands, then we cannot
10362          * change size of active slots array.
10363          */
10364         ASSERT(mpt->m_ncmds == 0);
10365 
10366         size = MPTSAS_SLOTS_SIZE(mpt);
10367         new_active = kmem_zalloc(size, flag);
10368         if (new_active == NULL) {
10369                 NDBG1(("new active alloc failed"));
10370                 return (-1);
10371         }
10372         /*
10373          * Since SMID 0 is reserved and the TM slot is reserved, the
10374          * number of slots that can be used at any one time is
10375          * m_max_requests - 2.
10376          */
10377         new_active->m_n_normal = (mpt->m_max_requests - 2);
10378         new_active->m_size = size;
10379         new_active->m_rotor = 1;
10380         if (old_active)
10381                 mptsas_free_active_slots(mpt);
10382         mpt->m_active = new_active;
10383 
10384         return (0);
10385 }
10386 
10387 static void
10388 mptsas_free_active_slots(mptsas_t *mpt)
10389 {
10390         mptsas_slots_t  *active = mpt->m_active;
10391         size_t          size;
10392 
10393         if (active == NULL)
10394                 return;
10395         size = active->m_size;
10396         kmem_free(active, size);
10397         mpt->m_active = NULL;
10398 }
10399 
10400 /*
10401  * Error logging, printing, and debug print routines.
10402  */
10403 static char *mptsas_label = "mpt_sas3";
10404 
10405 /*PRINTFLIKE3*/
10406 void
10407 mptsas_log(mptsas_t *mpt, int level, char *fmt, ...)
10408 {
10409         dev_info_t      *dev;
10410         va_list         ap;
10411 
10412         if (mpt) {
10413                 dev = mpt->m_dip;
10414         } else {
10415                 dev = 0;
10416         }
10417 
10418         mutex_enter(&mptsas_log_mutex);
10419 
10420         va_start(ap, fmt);
10421         (void) vsprintf(mptsas_log_buf, fmt, ap);
10422         va_end(ap);
10423 
10424         if (level == CE_CONT) {
10425                 scsi_log(dev, mptsas_label, level, "%s\n", mptsas_log_buf);
10426         } else {
10427                 scsi_log(dev, mptsas_label, level, "%s", mptsas_log_buf);
10428         }
10429 
10430         mutex_exit(&mptsas_log_mutex);
10431 }
10432 
10433 #ifdef MPTSAS_DEBUG
10434 /*
10435  * Use a circular buffer to log messages to private memory.
10436  * No mutexes, so there is the opportunity for this to miss lines.
10437  * But it's fast and does not hold up the proceedings too much.
10438  */
10439 static char mptsas_dbglog_bufs[32][256];
10440 static uint32_t mptsas_dbglog_idx = 1;
10441 
10442 /*PRINTFLIKE1*/
10443 void
10444 mptsas_debug_log(char *fmt, ...)
10445 {
10446         va_list         ap;
10447         uint32_t        idx;
10448 
10449         if (!mptsas_dbglog_idx) {
10450                 return;
10451         }
10452         idx = (mptsas_dbglog_idx++) & 0x1f;
10453 
10454         va_start(ap, fmt);
10455         (void) vsnprintf(mptsas_dbglog_bufs[idx],
10456             sizeof (mptsas_dbglog_bufs[0]), fmt, ap);
10457         va_end(ap);
10458 }
10459 
10460 /*PRINTFLIKE1*/
10461 void
10462 mptsas_printf(char *fmt, ...)
10463 {
10464         dev_info_t      *dev = 0;
10465         va_list         ap;
10466 
10467         mutex_enter(&mptsas_log_mutex);
10468 
10469         va_start(ap, fmt);
10470         (void) vsprintf(mptsas_log_buf, fmt, ap);
10471         va_end(ap);
10472 
10473 #ifdef PROM_PRINTF
10474         prom_printf("%s:\t%s\n", mptsas_label, mptsas_log_buf);
10475 #else
10476         scsi_log(dev, mptsas_label, CE_CONT, "!%s\n", mptsas_log_buf);
10477 #endif
10478         mutex_exit(&mptsas_log_mutex);
10479 }
10480 #endif
10481 
10482 /*
10483  * timeout handling
10484  */
10485 static void
10486 mptsas_watch(void *arg)
10487 {
10488 #ifndef __lock_lint
10489         _NOTE(ARGUNUSED(arg))
10490 #endif
10491 
10492         mptsas_t        *mpt;
10493         uint32_t        doorbell;
10494 
10495         NDBG30(("mptsas_watch"));
10496 
10497         rw_enter(&mptsas_global_rwlock, RW_READER);
10498         for (mpt = mptsas_head; mpt != (mptsas_t *)NULL; mpt = mpt->m_next) {
10499 
10500                 mutex_enter(&mpt->m_mutex);
10501 
10502                 /* Skip device if not powered on */
10503                 if (mpt->m_options & MPTSAS_OPT_PM) {
10504                         if (mpt->m_power_level == PM_LEVEL_D0) {
10505                                 (void) pm_busy_component(mpt->m_dip, 0);
10506                                 mpt->m_busy = 1;
10507                         } else {
10508                                 mutex_exit(&mpt->m_mutex);
10509                                 continue;
10510                         }
10511                 }
10512 
10513                 /*
10514                  * Check if controller is in a FAULT state. If so, reset it.
10515                  */
10516                 doorbell = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell);
10517                 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
10518                         doorbell &= MPI2_DOORBELL_DATA_MASK;
10519                         mptsas_log(mpt, CE_WARN, "MPT Firmware Fault, "
10520                             "code: %04x", doorbell);
10521                         mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
10522                         if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
10523                                 mptsas_log(mpt, CE_WARN, "Reset failed"
10524                                     "after fault was detected");
10525                         }
10526                 }
10527 
10528                 /*
10529                  * For now, always call mptsas_watchsubr.
10530                  */
10531                 mptsas_watchsubr(mpt);
10532 
10533                 if (mpt->m_options & MPTSAS_OPT_PM) {
10534                         mpt->m_busy = 0;
10535                         (void) pm_idle_component(mpt->m_dip, 0);
10536                 }
10537 
10538                 mutex_exit(&mpt->m_mutex);
10539         }
10540         rw_exit(&mptsas_global_rwlock);
10541 
10542         mutex_enter(&mptsas_global_mutex);
10543         if (mptsas_timeouts_enabled)
10544                 mptsas_timeout_id = timeout(mptsas_watch, NULL, mptsas_tick);
10545         mutex_exit(&mptsas_global_mutex);
10546 }
10547 
10548 int mptsas_monitor_for_txwqs = 1;
10549 static void
10550 mptsas_watchsubr(mptsas_t *mpt)
10551 {
10552         int             i;
10553         mptsas_cmd_t    *cmd;
10554         mptsas_target_t *ptgt = NULL;
10555         hrtime_t        timestamp = gethrtime();
10556         boolean_t       restart_hba = B_FALSE;
10557 
10558         ASSERT(MUTEX_HELD(&mpt->m_mutex));
10559 
10560         NDBG30(("mptsas_watchsubr: mpt=0x%p, ncmds %d, nstarted %d",
10561             (void *)mpt, mpt->m_ncmds, mpt->m_ncstarted));
10562 
10563         mpt->m_lncstarted = mpt->m_ncstarted;
10564         if (mpt->m_txwq_thread_n != 0 && mpt->m_txwq_enabled != BLOCKED &&
10565             mptsas_monitor_for_txwqs) {
10566                 i = mpt->m_ncstarted/mptsas_scsi_watchdog_tick;
10567                 if (i > mpt->m_txwq_thread_threshold) {
10568                         mpt->m_txwq_enabled = TRUE;
10569                 } else if (i < (mpt->m_txwq_thread_threshold>>1)) {
10570                         mpt->m_txwq_enabled = FALSE;
10571                 }
10572         }
10573         mpt->m_ncstarted = 0;
10574 
10575         /*
10576          * Check for commands stuck in active slot
10577          * Account for TM requests, which use the last SMID.
10578          */
10579         for (i = 0; i <= mpt->m_active->m_n_normal; i++) {
10580                 if ((cmd = mpt->m_active->m_slot[i]) != NULL) {
10581                         if (cmd->cmd_active_expiration <= timestamp) {
10582                                 if ((cmd->cmd_flags & CFLAG_CMDIOC) == 0) {
10583                                         /*
10584                                          * There seems to be a command stuck
10585                                          * in the active slot.  Drain throttle.
10586                                          */
10587                                         ptgt = cmd->cmd_tgt_addr;
10588                                         mptsas_set_throttle_mtx(mpt, ptgt,
10589                                             DRAIN_THROTTLE);
10590                                 } else if (cmd->cmd_flags &
10591                                     (CFLAG_PASSTHRU | CFLAG_CONFIG |
10592                                     CFLAG_FW_DIAG)) {
10593                                         /*
10594                                          * passthrough command timeout
10595                                          */
10596                                         cmd->cmd_flags |= (CFLAG_FINISHED |
10597                                             CFLAG_TIMEOUT);
10598                                         cv_broadcast(&mpt->m_passthru_cv);
10599                                         cv_broadcast(&mpt->m_config_cv);
10600                                         cv_broadcast(&mpt->m_fw_diag_cv);
10601                                 }
10602                         }
10603                 }
10604         }
10605 
10606         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
10607             ptgt = refhash_next(mpt->m_targets, ptgt)) {
10608                 mutex_enter(&ptgt->m_t_mutex);
10609                 /*
10610                  * If we were draining due to a qfull condition,
10611                  * go back to full throttle.
10612                  */
10613                 if ((ptgt->m_t_throttle < MAX_THROTTLE) &&
10614                     (ptgt->m_t_throttle > HOLD_THROTTLE) &&
10615                     (ptgt->m_t_ncmds < ptgt->m_t_throttle)) {
10616                         mptsas_set_throttle(mpt, ptgt, MAX_THROTTLE);
10617                         restart_hba = B_TRUE;
10618                 }
10619 
10620                 cmd = TAILQ_LAST(&ptgt->m_active_cmdq, mptsas_active_cmdq);
10621                 if (cmd != NULL) {
10622                         if (cmd->cmd_active_expiration <= timestamp) {
10623                                 /*
10624                                  * Earliest command timeout expired.
10625                                  * Drain throttle.
10626                                  */
10627                                 mptsas_set_throttle(mpt, ptgt, DRAIN_THROTTLE);
10628 
10629                                 /*
10630                                  * Check for remaining commands.
10631                                  */
10632                                 cmd = TAILQ_FIRST(&ptgt->m_active_cmdq);
10633                                 if (cmd->cmd_active_expiration > timestamp) {
10634                                         /*
10635                                          * Wait for remaining commands to
10636                                          * complete or time out.
10637                                          */
10638                                         NDBG23(("command timed out, "
10639                                             "pending drain"));
10640                                 } else {
10641                                         mutex_exit(&ptgt->m_t_mutex);
10642 
10643                                         /*
10644                                          * All command timeouts expired.
10645                                          */
10646                                         mptsas_log(mpt, CE_NOTE,
10647                                             "Timeout of %d seconds "
10648                                             "expired with %d commands on "
10649                                             "target %d lun %d.",
10650                                             cmd->cmd_pkt->pkt_time,
10651                                             ptgt->m_t_ncmds,
10652                                             ptgt->m_devhdl, Lun(cmd));
10653 
10654                                         mptsas_cmd_timeout(mpt, ptgt);
10655                                         continue;
10656                                 }
10657                         } else if (cmd->cmd_active_expiration <= timestamp +
10658                             (hrtime_t)mptsas_scsi_watchdog_tick * NANOSEC) {
10659                                 NDBG23(("pending timeout"));
10660                                 mptsas_set_throttle(mpt, ptgt, DRAIN_THROTTLE);
10661                         }
10662                 }
10663                 mutex_exit(&ptgt->m_t_mutex);
10664         }
10665         if (restart_hba == B_TRUE) {
10666                 mptsas_restart_hba(mpt);
10667         }
10668 }
10669 
10670 /*
10671  * timeout recovery
10672  */
10673 static void
10674 mptsas_cmd_timeout(mptsas_t *mpt, mptsas_target_t *ptgt)
10675 {
10676         uint16_t        devhdl;
10677         uint64_t        sas_wwn;
10678         uint8_t         phy;
10679         char            wwn_str[MPTSAS_WWN_STRLEN];
10680 
10681         devhdl = ptgt->m_devhdl;
10682         sas_wwn = ptgt->m_addr.mta_wwn;
10683         phy = ptgt->m_phynum;
10684         if (sas_wwn == 0) {
10685                 (void) sprintf(wwn_str, "p%x", phy);
10686         } else {
10687                 (void) sprintf(wwn_str, "w%016"PRIx64, sas_wwn);
10688         }
10689 
10690         NDBG29(("mptsas_cmd_timeout: target=%d", devhdl));
10691         mptsas_log(mpt, CE_WARN, "Disconnected command timeout for "
10692             "target %d %s,  enclosure %u .", devhdl, wwn_str,
10693             ptgt->m_enclosure);
10694 
10695         /*
10696          * Abort all outstanding commands on the device.
10697          */
10698         NDBG29(("mptsas_cmd_timeout: device reset"));
10699         if (mptsas_do_scsi_reset(mpt, devhdl) != TRUE) {
10700                 mptsas_log(mpt, CE_WARN, "Target %d reset for command timeout "
10701                     "recovery failed!", devhdl);
10702         }
10703 }
10704 
10705 /*
10706  * Device / Hotplug control
10707  */
10708 static int
10709 mptsas_scsi_quiesce(dev_info_t *dip)
10710 {
10711         mptsas_t        *mpt;
10712         scsi_hba_tran_t *tran;
10713 
10714         tran = ddi_get_driver_private(dip);
10715         if (tran == NULL || (mpt = TRAN2MPT(tran)) == NULL)
10716                 return (-1);
10717 
10718         return (mptsas_quiesce_bus(mpt));
10719 }
10720 
10721 static int
10722 mptsas_scsi_unquiesce(dev_info_t *dip)
10723 {
10724         mptsas_t                *mpt;
10725         scsi_hba_tran_t *tran;
10726 
10727         tran = ddi_get_driver_private(dip);
10728         if (tran == NULL || (mpt = TRAN2MPT(tran)) == NULL)
10729                 return (-1);
10730 
10731         return (mptsas_unquiesce_bus(mpt));
10732 }
10733 
10734 static int
10735 mptsas_quiesce_bus(mptsas_t *mpt)
10736 {
10737         mptsas_target_t *ptgt = NULL;
10738 
10739         NDBG28(("mptsas_quiesce_bus"));
10740         mutex_enter(&mpt->m_mutex);
10741 
10742         /* Set all the throttles to zero */
10743         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
10744             ptgt = refhash_next(mpt->m_targets, ptgt)) {
10745                 mptsas_set_throttle_mtx(mpt, ptgt, HOLD_THROTTLE);
10746         }
10747 
10748         /* If there are any outstanding commands in the queue */
10749         if (mpt->m_ncmds) {
10750                 mpt->m_softstate |= MPTSAS_SS_DRAINING;
10751                 mpt->m_quiesce_timeid = timeout(mptsas_ncmds_checkdrain,
10752                     mpt, (MPTSAS_QUIESCE_TIMEOUT * drv_usectohz(1000000)));
10753                 if (cv_wait_sig(&mpt->m_cv, &mpt->m_mutex) == 0) {
10754                         /*
10755                          * Quiesce has been interrupted
10756                          */
10757                         mpt->m_softstate &= ~MPTSAS_SS_DRAINING;
10758                         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
10759                             ptgt = refhash_next(mpt->m_targets, ptgt)) {
10760                                 mptsas_set_throttle_mtx(mpt, ptgt,
10761                                     MAX_THROTTLE);
10762                         }
10763                         mptsas_restart_hba(mpt);
10764                         if (mpt->m_quiesce_timeid != 0) {
10765                                 timeout_id_t tid = mpt->m_quiesce_timeid;
10766                                 mpt->m_quiesce_timeid = 0;
10767                                 mutex_exit(&mpt->m_mutex);
10768                                 (void) untimeout(tid);
10769                                 return (-1);
10770                         }
10771                         mutex_exit(&mpt->m_mutex);
10772                         return (-1);
10773                 } else {
10774                         /* Bus has been quiesced */
10775                         ASSERT(mpt->m_quiesce_timeid == 0);
10776                         mpt->m_softstate &= ~MPTSAS_SS_DRAINING;
10777                         mpt->m_softstate |= MPTSAS_SS_QUIESCED;
10778                         mutex_exit(&mpt->m_mutex);
10779                         return (0);
10780                 }
10781         }
10782         /* Bus was not busy - QUIESCED */
10783         mutex_exit(&mpt->m_mutex);
10784 
10785         return (0);
10786 }
10787 
10788 static int
10789 mptsas_unquiesce_bus(mptsas_t *mpt)
10790 {
10791         mptsas_target_t *ptgt = NULL;
10792 
10793         NDBG28(("mptsas_unquiesce_bus"));
10794         mutex_enter(&mpt->m_mutex);
10795         mpt->m_softstate &= ~MPTSAS_SS_QUIESCED;
10796         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
10797             ptgt = refhash_next(mpt->m_targets, ptgt)) {
10798                 mptsas_set_throttle_mtx(mpt, ptgt, MAX_THROTTLE);
10799         }
10800         mptsas_restart_hba(mpt);
10801         mutex_exit(&mpt->m_mutex);
10802         return (0);
10803 }
10804 
10805 static void
10806 mptsas_ncmds_checkdrain(void *arg)
10807 {
10808         mptsas_t        *mpt = arg;
10809         mptsas_target_t *ptgt = NULL;
10810 
10811         mutex_enter(&mpt->m_mutex);
10812         if (mpt->m_softstate & MPTSAS_SS_DRAINING) {
10813                 mpt->m_quiesce_timeid = 0;
10814                 if (mpt->m_ncmds == 0) {
10815                         /* Command queue has been drained */
10816                         cv_signal(&mpt->m_cv);
10817                 } else {
10818                         /*
10819                          * The throttle may have been reset because
10820                          * of a SCSI bus reset
10821                          */
10822                         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
10823                             ptgt = refhash_next(mpt->m_targets, ptgt)) {
10824                                 mptsas_set_throttle_mtx(mpt, ptgt,
10825                                     HOLD_THROTTLE);
10826                         }
10827 
10828                         mpt->m_quiesce_timeid = timeout(mptsas_ncmds_checkdrain,
10829                             mpt, (MPTSAS_QUIESCE_TIMEOUT *
10830                             drv_usectohz(1000000)));
10831                 }
10832         }
10833         mutex_exit(&mpt->m_mutex);
10834 }
10835 
10836 /*ARGSUSED*/
10837 static void
10838 mptsas_dump_cmd(mptsas_t *mpt, mptsas_cmd_t *cmd)
10839 {
10840         int     i;
10841         uint8_t *cp = (uchar_t *)cmd->cmd_pkt->pkt_cdbp;
10842         char    buf[128];
10843 
10844         buf[0] = '\0';
10845         NDBG25(("?Cmd (0x%p) dump for Target %d Lun %d:\n", (void *)cmd,
10846             Tgt(cmd), Lun(cmd)));
10847         (void) sprintf(&buf[0], "\tcdb=[");
10848         for (i = 0; i < (int)cmd->cmd_cdblen; i++) {
10849                 (void) sprintf(&buf[strlen(buf)], " 0x%x", *cp++);
10850         }
10851         (void) sprintf(&buf[strlen(buf)], " ]");
10852         NDBG25(("?%s\n", buf));
10853         NDBG25(("?pkt_flags=0x%x pkt_statistics=0x%x pkt_state=0x%x\n",
10854             cmd->cmd_pkt->pkt_flags, cmd->cmd_pkt->pkt_statistics,
10855             cmd->cmd_pkt->pkt_state));
10856         NDBG25(("?pkt_scbp=0x%x cmd_flags=0x%x\n", cmd->cmd_pkt->pkt_scbp ?
10857             *(cmd->cmd_pkt->pkt_scbp) : 0, cmd->cmd_flags));
10858 }
10859 
10860 static void
10861 mptsas_passthru_sge(ddi_acc_handle_t acc_hdl, mptsas_pt_request_t *pt,
10862     pMpi2SGESimple64_t sgep)
10863 {
10864         uint32_t                sge_flags;
10865         uint32_t                data_size, dataout_size;
10866         ddi_dma_cookie_t        data_cookie;
10867         ddi_dma_cookie_t        dataout_cookie;
10868 
10869         data_size = pt->data_size;
10870         dataout_size = pt->dataout_size;
10871         data_cookie = pt->data_cookie;
10872         dataout_cookie = pt->dataout_cookie;
10873 
10874         if (dataout_size) {
10875                 sge_flags = dataout_size |
10876                     ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
10877                     MPI2_SGE_FLAGS_END_OF_BUFFER |
10878                     MPI2_SGE_FLAGS_HOST_TO_IOC |
10879                     MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10880                     MPI2_SGE_FLAGS_SHIFT);
10881                 ddi_put32(acc_hdl, &sgep->FlagsLength, sge_flags);
10882                 ddi_put32(acc_hdl, &sgep->Address.Low,
10883                     (uint32_t)(dataout_cookie.dmac_laddress & 0xffffffffull));
10884                 ddi_put32(acc_hdl, &sgep->Address.High,
10885                     (uint32_t)(dataout_cookie.dmac_laddress >> 32));
10886                 sgep++;
10887         }
10888         sge_flags = data_size;
10889         sge_flags |= ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
10890             MPI2_SGE_FLAGS_LAST_ELEMENT |
10891             MPI2_SGE_FLAGS_END_OF_BUFFER |
10892             MPI2_SGE_FLAGS_END_OF_LIST |
10893             MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10894             MPI2_SGE_FLAGS_SHIFT);
10895         if (pt->direction == MPTSAS_PASS_THRU_DIRECTION_WRITE) {
10896                 sge_flags |= ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
10897                     MPI2_SGE_FLAGS_SHIFT);
10898         } else {
10899                 sge_flags |= ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
10900                     MPI2_SGE_FLAGS_SHIFT);
10901         }
10902         ddi_put32(acc_hdl, &sgep->FlagsLength, sge_flags);
10903         ddi_put32(acc_hdl, &sgep->Address.Low,
10904             (uint32_t)(data_cookie.dmac_laddress & 0xffffffffull));
10905         ddi_put32(acc_hdl, &sgep->Address.High,
10906             (uint32_t)(data_cookie.dmac_laddress >> 32));
10907 }
10908 
10909 static void
10910 mptsas_passthru_ieee_sge(ddi_acc_handle_t acc_hdl, mptsas_pt_request_t *pt,
10911     pMpi2IeeeSgeSimple64_t ieeesgep)
10912 {
10913         uint8_t                 sge_flags;
10914         uint32_t                data_size, dataout_size;
10915         ddi_dma_cookie_t        data_cookie;
10916         ddi_dma_cookie_t        dataout_cookie;
10917 
10918         data_size = pt->data_size;
10919         dataout_size = pt->dataout_size;
10920         data_cookie = pt->data_cookie;
10921         dataout_cookie = pt->dataout_cookie;
10922 
10923         sge_flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
10924             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
10925         if (dataout_size) {
10926                 ddi_put32(acc_hdl, &ieeesgep->Length, dataout_size);
10927                 ddi_put32(acc_hdl, &ieeesgep->Address.Low,
10928                     (uint32_t)(dataout_cookie.dmac_laddress &
10929                     0xffffffffull));
10930                 ddi_put32(acc_hdl, &ieeesgep->Address.High,
10931                     (uint32_t)(dataout_cookie.dmac_laddress >> 32));
10932                 ddi_put8(acc_hdl, &ieeesgep->Flags, sge_flags);
10933                 ieeesgep++;
10934         }
10935         sge_flags |= MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
10936         ddi_put32(acc_hdl, &ieeesgep->Length, data_size);
10937         ddi_put32(acc_hdl, &ieeesgep->Address.Low,
10938             (uint32_t)(data_cookie.dmac_laddress & 0xffffffffull));
10939         ddi_put32(acc_hdl, &ieeesgep->Address.High,
10940             (uint32_t)(data_cookie.dmac_laddress >> 32));
10941         ddi_put8(acc_hdl, &ieeesgep->Flags, sge_flags);
10942 }
10943 
10944 static void
10945 mptsas_start_passthru(mptsas_t *mpt, mptsas_cmd_t *cmd)
10946 {
10947         caddr_t                 memp;
10948         pMPI2RequestHeader_t    request_hdrp;
10949         struct scsi_pkt         *pkt = cmd->cmd_pkt;
10950         mptsas_pt_request_t     *pt = pkt->pkt_ha_private;
10951         uint32_t                request_size;
10952         uint64_t                request_desc = 0;
10953         uint64_t                sense_bufp;
10954         uint8_t                 desc_type;
10955         uint8_t                 *request, function;
10956         ddi_dma_handle_t        dma_hdl = mpt->m_dma_req_frame_hdl;
10957         ddi_acc_handle_t        acc_hdl = mpt->m_acc_req_frame_hdl;
10958 
10959         desc_type = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
10960 
10961         request = pt->request;
10962         request_size = pt->request_size;
10963 
10964         /*
10965          * Store the passthrough message in memory location
10966          * corresponding to our slot number
10967          */
10968         memp = mpt->m_req_frame + (mpt->m_req_frame_size * cmd->cmd_slot);
10969         request_hdrp = (pMPI2RequestHeader_t)memp;
10970         bzero(memp, mpt->m_req_frame_size);
10971 
10972         bcopy(request, memp, request_size);
10973 
10974         NDBG15(("mptsas_start_passthru: Func 0x%x, MsgFlags 0x%x, "
10975             "size=%d, in %d, out %d", request_hdrp->Function,
10976             request_hdrp->MsgFlags, request_size,
10977             pt->data_size, pt->dataout_size));
10978 
10979         /*
10980          * Add an SGE, even if the length is zero.
10981          */
10982         if (mpt->m_MPI25 && pt->simple == 0) {
10983                 mptsas_passthru_ieee_sge(acc_hdl, pt,
10984                     (pMpi2IeeeSgeSimple64_t)
10985                     ((uint8_t *)request_hdrp + pt->sgl_offset));
10986         } else {
10987                 mptsas_passthru_sge(acc_hdl, pt,
10988                     (pMpi2SGESimple64_t)
10989                     ((uint8_t *)request_hdrp + pt->sgl_offset));
10990         }
10991 
10992         function = request_hdrp->Function;
10993         if ((function == MPI2_FUNCTION_SCSI_IO_REQUEST) ||
10994             (function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) {
10995                 pMpi2SCSIIORequest_t    scsi_io_req;
10996 
10997                 NDBG15(("mptsas_start_passthru: Is SCSI IO Req"));
10998                 scsi_io_req = (pMpi2SCSIIORequest_t)request_hdrp;
10999                 /*
11000                  * Put SGE for data and data_out buffer at the end of
11001                  * scsi_io_request message header.(64 bytes in total)
11002                  * Following above SGEs, the residual space will be
11003                  * used by sense data.
11004                  */
11005                 ddi_put8(acc_hdl,
11006                     &scsi_io_req->SenseBufferLength,
11007                     (uint8_t)(request_size - 64));
11008 
11009                 sense_bufp = (uint32_t)(mpt->m_req_frame_dma_addr +
11010                     (mpt->m_req_frame_size * cmd->cmd_slot) & 0xffffffffull);
11011                 sense_bufp += 64;
11012                 ddi_put32(acc_hdl,
11013                     &scsi_io_req->SenseBufferLowAddress, sense_bufp);
11014 
11015                 /*
11016                  * Set SGLOffset0 value
11017                  */
11018                 ddi_put8(acc_hdl, &scsi_io_req->SGLOffset0,
11019                     offsetof(MPI2_SCSI_IO_REQUEST, SGL) / 4);
11020 
11021                 /*
11022                  * Setup descriptor info.  RAID passthrough must use the
11023                  * default request descriptor which is already set, so if this
11024                  * is a SCSI IO request, change the descriptor to SCSI IO.
11025                  */
11026                 if (function == MPI2_FUNCTION_SCSI_IO_REQUEST) {
11027                         desc_type = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
11028                         request_desc = (((uint64_t)ddi_get16(acc_hdl,
11029                             &scsi_io_req->DevHandle)) << 48);
11030                 }
11031         }
11032 
11033         /*
11034          * We must wait till the message has been completed before
11035          * beginning the next message so we wait for this one to
11036          * finish.
11037          */
11038         (void) ddi_dma_sync(dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
11039         request_desc |= ((cmd->cmd_slot << 16) | desc_type);
11040         cmd->cmd_rfm = NULL;
11041         MPTSAS_START_CMD(mpt, request_desc);
11042         if ((mptsas_check_dma_handle(dma_hdl) != DDI_SUCCESS) ||
11043             (mptsas_check_acc_handle(acc_hdl) != DDI_SUCCESS)) {
11044                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
11045         }
11046 }
11047 
11048 typedef void (mps_pre_f)(mptsas_t *, mptsas_pt_request_t *);
11049 static mps_pre_f        mpi_pre_ioc_facts;
11050 static mps_pre_f        mpi_pre_port_facts;
11051 static mps_pre_f        mpi_pre_fw_download;
11052 static mps_pre_f        mpi_pre_fw_25_download;
11053 static mps_pre_f        mpi_pre_fw_upload;
11054 static mps_pre_f        mpi_pre_fw_25_upload;
11055 static mps_pre_f        mpi_pre_sata_passthrough;
11056 static mps_pre_f        mpi_pre_smp_passthrough;
11057 static mps_pre_f        mpi_pre_config;
11058 static mps_pre_f        mpi_pre_sas_io_unit_control;
11059 static mps_pre_f        mpi_pre_scsi_io_req;
11060 
11061 /*
11062  * Prepare the pt for a SAS2 FW_DOWNLOAD request.
11063  */
11064 static void
11065 mpi_pre_fw_download(mptsas_t *mpt, mptsas_pt_request_t *pt)
11066 {
11067         pMpi2FWDownloadTCSGE_t tcsge;
11068         pMpi2FWDownloadRequest req;
11069 
11070         /*
11071          * If SAS3, call separate function.
11072          */
11073         if (mpt->m_MPI25) {
11074                 mpi_pre_fw_25_download(mpt, pt);
11075                 return;
11076         }
11077 
11078         /*
11079          * User requests should come in with the Transaction
11080          * context element where the SGL will go. Putting the
11081          * SGL after that seems to work, but don't really know
11082          * why. Other drivers tend to create an extra SGL and
11083          * refer to the TCE through that.
11084          */
11085         req = (pMpi2FWDownloadRequest)pt->request;
11086         tcsge = (pMpi2FWDownloadTCSGE_t)&req->SGL;
11087         if (tcsge->ContextSize != 0 || tcsge->DetailsLength != 12 ||
11088             tcsge->Flags != MPI2_SGE_FLAGS_TRANSACTION_ELEMENT) {
11089                 mptsas_log(mpt, CE_WARN, "FW Download tce invalid!");
11090         }
11091 
11092         pt->sgl_offset = offsetof(MPI2_FW_DOWNLOAD_REQUEST, SGL) +
11093             sizeof (*tcsge);
11094         if (pt->request_size != pt->sgl_offset)
11095                 NDBG15(("mpi_pre_fw_download(): Incorrect req size, "
11096                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11097                     (int)pt->request_size, (int)pt->sgl_offset,
11098                     (int)pt->dataout_size));
11099         if (pt->data_size < sizeof (MPI2_FW_DOWNLOAD_REPLY))
11100                 NDBG15(("mpi_pre_fw_download(): Incorrect rep size, "
11101                     "0x%x, should be 0x%x", pt->data_size,
11102                     (int)sizeof (MPI2_FW_DOWNLOAD_REPLY)));
11103 }
11104 
11105 /*
11106  * Prepare the pt for a SAS3 FW_DOWNLOAD request.
11107  */
11108 static void
11109 mpi_pre_fw_25_download(mptsas_t *mpt, mptsas_pt_request_t *pt)
11110 {
11111         pMpi2FWDownloadTCSGE_t tcsge;
11112         pMpi2FWDownloadRequest req2;
11113         pMpi25FWDownloadRequest req25;
11114 
11115         /*
11116          * User requests should come in with the Transaction
11117          * context element where the SGL will go. The new firmware
11118          * Doesn't use TCE and has space in the main request for
11119          * this information. So move to the right place.
11120          */
11121         req2 = (pMpi2FWDownloadRequest)pt->request;
11122         req25 = (pMpi25FWDownloadRequest)pt->request;
11123         tcsge = (pMpi2FWDownloadTCSGE_t)&req2->SGL;
11124         if (tcsge->ContextSize != 0 || tcsge->DetailsLength != 12 ||
11125             tcsge->Flags != MPI2_SGE_FLAGS_TRANSACTION_ELEMENT) {
11126                 mptsas_log(mpt, CE_WARN, "FW Download tce invalid!");
11127         }
11128         req25->ImageOffset = tcsge->ImageOffset;
11129         req25->ImageSize = tcsge->ImageSize;
11130 
11131         pt->sgl_offset = offsetof(MPI25_FW_DOWNLOAD_REQUEST, SGL);
11132         if (pt->request_size != pt->sgl_offset)
11133                 NDBG15(("mpi_pre_fw_25_download(): Incorrect req size, "
11134                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11135                     pt->request_size, pt->sgl_offset,
11136                     pt->dataout_size));
11137         if (pt->data_size < sizeof (MPI2_FW_DOWNLOAD_REPLY))
11138                 NDBG15(("mpi_pre_fw_25_download(): Incorrect rep size, "
11139                     "0x%x, should be 0x%x", pt->data_size,
11140                     (int)sizeof (MPI2_FW_UPLOAD_REPLY)));
11141 }
11142 
11143 /*
11144  * Prepare the pt for a SAS2 FW_UPLOAD request.
11145  */
11146 static void
11147 mpi_pre_fw_upload(mptsas_t *mpt, mptsas_pt_request_t *pt)
11148 {
11149         pMpi2FWUploadTCSGE_t tcsge;
11150         pMpi2FWUploadRequest_t req;
11151 
11152         /*
11153          * If SAS3, call separate function.
11154          */
11155         if (mpt->m_MPI25) {
11156                 mpi_pre_fw_25_upload(mpt, pt);
11157                 return;
11158         }
11159 
11160         /*
11161          * User requests should come in with the Transaction
11162          * context element where the SGL will go. Putting the
11163          * SGL after that seems to work, but don't really know
11164          * why. Other drivers tend to create an extra SGL and
11165          * refer to the TCE through that.
11166          */
11167         req = (pMpi2FWUploadRequest_t)pt->request;
11168         tcsge = (pMpi2FWUploadTCSGE_t)&req->SGL;
11169         if (tcsge->ContextSize != 0 || tcsge->DetailsLength != 12 ||
11170             tcsge->Flags != MPI2_SGE_FLAGS_TRANSACTION_ELEMENT) {
11171                 mptsas_log(mpt, CE_WARN, "FW Upload tce invalid!");
11172         }
11173 
11174         pt->sgl_offset = offsetof(MPI2_FW_UPLOAD_REQUEST, SGL) +
11175             sizeof (*tcsge);
11176         if (pt->request_size != pt->sgl_offset)
11177                 NDBG15(("mpi_pre_fw_upload(): Incorrect req size, "
11178                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11179                     pt->request_size, pt->sgl_offset,
11180                     pt->dataout_size));
11181         if (pt->data_size < sizeof (MPI2_FW_UPLOAD_REPLY))
11182                 NDBG15(("mpi_pre_fw_upload(): Incorrect rep size, "
11183                     "0x%x, should be 0x%x", pt->data_size,
11184                     (int)sizeof (MPI2_FW_UPLOAD_REPLY)));
11185 }
11186 
11187 /*
11188  * Prepare the pt a SAS3 FW_UPLOAD request.
11189  */
11190 static void
11191 mpi_pre_fw_25_upload(mptsas_t *mpt, mptsas_pt_request_t *pt)
11192 {
11193         pMpi2FWUploadTCSGE_t tcsge;
11194         pMpi2FWUploadRequest_t req2;
11195         pMpi25FWUploadRequest_t req25;
11196 
11197         /*
11198          * User requests should come in with the Transaction
11199          * context element where the SGL will go. The new firmware
11200          * Doesn't use TCE and has space in the main request for
11201          * this information. So move to the right place.
11202          */
11203         req2 = (pMpi2FWUploadRequest_t)pt->request;
11204         req25 = (pMpi25FWUploadRequest_t)pt->request;
11205         tcsge = (pMpi2FWUploadTCSGE_t)&req2->SGL;
11206         if (tcsge->ContextSize != 0 || tcsge->DetailsLength != 12 ||
11207             tcsge->Flags != MPI2_SGE_FLAGS_TRANSACTION_ELEMENT) {
11208                 mptsas_log(mpt, CE_WARN, "FW Upload tce invalid!");
11209         }
11210         req25->ImageOffset = tcsge->ImageOffset;
11211         req25->ImageSize = tcsge->ImageSize;
11212 
11213         pt->sgl_offset = offsetof(MPI25_FW_UPLOAD_REQUEST, SGL);
11214         if (pt->request_size != pt->sgl_offset)
11215                 NDBG15(("mpi_pre_fw_25_upload(): Incorrect req size, "
11216                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11217                     pt->request_size, pt->sgl_offset,
11218                     pt->dataout_size));
11219         if (pt->data_size < sizeof (MPI2_FW_UPLOAD_REPLY))
11220                 NDBG15(("mpi_pre_fw_25_upload(): Incorrect rep size, "
11221                     "0x%x, should be 0x%x", pt->data_size,
11222                     (int)sizeof (MPI2_FW_UPLOAD_REPLY)));
11223 }
11224 
11225 /*
11226  * Prepare the pt for an IOC_FACTS request.
11227  */
11228 static void
11229 mpi_pre_ioc_facts(mptsas_t *mpt, mptsas_pt_request_t *pt)
11230 {
11231 #ifndef __lock_lint
11232         _NOTE(ARGUNUSED(mpt))
11233 #endif
11234         if (pt->request_size != sizeof (MPI2_IOC_FACTS_REQUEST))
11235                 NDBG15(("mpi_pre_ioc_facts(): Incorrect req size, "
11236                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11237                     pt->request_size,
11238                     (int)sizeof (MPI2_IOC_FACTS_REQUEST),
11239                     pt->dataout_size));
11240         if (pt->data_size != sizeof (MPI2_IOC_FACTS_REPLY))
11241                 NDBG15(("mpi_pre_ioc_facts(): Incorrect rep size, "
11242                     "0x%x, should be 0x%x", pt->data_size,
11243                     (int)sizeof (MPI2_IOC_FACTS_REPLY)));
11244         pt->sgl_offset = (uint16_t)pt->request_size;
11245 }
11246 
11247 /*
11248  * Prepare the pt for a PORT_FACTS request.
11249  */
11250 static void
11251 mpi_pre_port_facts(mptsas_t *mpt, mptsas_pt_request_t *pt)
11252 {
11253 #ifndef __lock_lint
11254         _NOTE(ARGUNUSED(mpt))
11255 #endif
11256         if (pt->request_size != sizeof (MPI2_PORT_FACTS_REQUEST))
11257                 NDBG15(("mpi_pre_port_facts(): Incorrect req size, "
11258                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11259                     pt->request_size,
11260                     (int)sizeof (MPI2_PORT_FACTS_REQUEST),
11261                     pt->dataout_size));
11262         if (pt->data_size != sizeof (MPI2_PORT_FACTS_REPLY))
11263                 NDBG15(("mpi_pre_port_facts(): Incorrect rep size, "
11264                     "0x%x, should be 0x%x", pt->data_size,
11265                     (int)sizeof (MPI2_PORT_FACTS_REPLY)));
11266         pt->sgl_offset = (uint16_t)pt->request_size;
11267 }
11268 
11269 /*
11270  * Prepare pt for a SATA_PASSTHROUGH request.
11271  */
11272 static void
11273 mpi_pre_sata_passthrough(mptsas_t *mpt, mptsas_pt_request_t *pt)
11274 {
11275 #ifndef __lock_lint
11276         _NOTE(ARGUNUSED(mpt))
11277 #endif
11278         pt->sgl_offset = offsetof(MPI2_SATA_PASSTHROUGH_REQUEST, SGL);
11279         if (pt->request_size != pt->sgl_offset)
11280                 NDBG15(("mpi_pre_sata_passthrough(): Incorrect req size, "
11281                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11282                     pt->request_size, pt->sgl_offset,
11283                     pt->dataout_size));
11284         if (pt->data_size != sizeof (MPI2_SATA_PASSTHROUGH_REPLY))
11285                 NDBG15(("mpi_pre_sata_passthrough(): Incorrect rep size, "
11286                     "0x%x, should be 0x%x", pt->data_size,
11287                     (int)sizeof (MPI2_SATA_PASSTHROUGH_REPLY)));
11288 }
11289 
11290 static void
11291 mpi_pre_smp_passthrough(mptsas_t *mpt, mptsas_pt_request_t *pt)
11292 {
11293 #ifndef __lock_lint
11294         _NOTE(ARGUNUSED(mpt))
11295 #endif
11296         pt->sgl_offset = offsetof(MPI2_SMP_PASSTHROUGH_REQUEST, SGL);
11297         if (pt->request_size != pt->sgl_offset)
11298                 NDBG15(("mpi_pre_smp_passthrough(): Incorrect req size, "
11299                     "0x%x, should be 0x%x, dataoutsz 0x%x",
11300                     pt->request_size, pt->sgl_offset,
11301                     pt->dataout_size));
11302         if (pt->data_size != sizeof (MPI2_SMP_PASSTHROUGH_REPLY))
11303                 NDBG15(("mpi_pre_smp_passthrough(): Incorrect rep size, "
11304                     "0x%x, should be 0x%x", pt->data_size,
11305                     (int)sizeof (MPI2_SMP_PASSTHROUGH_REPLY)));
11306 }
11307 
11308 /*
11309  * Prepare pt for a CONFIG request.
11310  */
11311 static void
11312 mpi_pre_config(mptsas_t *mpt, mptsas_pt_request_t *pt)
11313 {
11314 #ifndef __lock_lint
11315         _NOTE(ARGUNUSED(mpt))
11316 #endif
11317         pt->sgl_offset = offsetof(MPI2_CONFIG_REQUEST, PageBufferSGE);
11318         if (pt->request_size != pt->sgl_offset)
11319                 NDBG15(("mpi_pre_config(): Incorrect req size, 0x%x, "
11320                     "should be 0x%x, dataoutsz 0x%x", pt->request_size,
11321                     pt->sgl_offset, pt->dataout_size));
11322         if (pt->data_size != sizeof (MPI2_CONFIG_REPLY))
11323                 NDBG15(("mpi_pre_config(): Incorrect rep size, 0x%x, "
11324                     "should be 0x%x", pt->data_size,
11325                     (int)sizeof (MPI2_CONFIG_REPLY)));
11326         pt->simple = 1;
11327 }
11328 
11329 /*
11330  * Prepare pt for a SCSI_IO_REQ request.
11331  */
11332 static void
11333 mpi_pre_scsi_io_req(mptsas_t *mpt, mptsas_pt_request_t *pt)
11334 {
11335 #ifndef __lock_lint
11336         _NOTE(ARGUNUSED(mpt))
11337 #endif
11338         pt->sgl_offset = offsetof(MPI2_SCSI_IO_REQUEST, SGL);
11339         if (pt->request_size != pt->sgl_offset)
11340                 NDBG15(("mpi_pre_config(): Incorrect req size, 0x%x, "
11341                     "should be 0x%x, dataoutsz 0x%x", pt->request_size,
11342                     pt->sgl_offset,
11343                     pt->dataout_size));
11344         if (pt->data_size != sizeof (MPI2_SCSI_IO_REPLY))
11345                 NDBG15(("mpi_pre_config(): Incorrect rep size, 0x%x, "
11346                     "should be 0x%x", pt->data_size,
11347                     (int)sizeof (MPI2_SCSI_IO_REPLY)));
11348 }
11349 
11350 /*
11351  * Prepare the mps_command for a SAS_IO_UNIT_CONTROL request.
11352  */
11353 static void
11354 mpi_pre_sas_io_unit_control(mptsas_t *mpt, mptsas_pt_request_t *pt)
11355 {
11356 #ifndef __lock_lint
11357         _NOTE(ARGUNUSED(mpt))
11358 #endif
11359         pt->sgl_offset = (uint16_t)pt->request_size;
11360 }
11361 
11362 /*
11363  * A set of functions to prepare an mps_command for the various
11364  * supported requests.
11365  */
11366 struct mps_func {
11367         U8              Function;
11368         char            *Name;
11369         mps_pre_f       *f_pre;
11370 } mps_func_list[] = {
11371         { MPI2_FUNCTION_IOC_FACTS, "IOC_FACTS",         mpi_pre_ioc_facts },
11372         { MPI2_FUNCTION_PORT_FACTS, "PORT_FACTS",       mpi_pre_port_facts },
11373         { MPI2_FUNCTION_FW_DOWNLOAD, "FW_DOWNLOAD",     mpi_pre_fw_download },
11374         { MPI2_FUNCTION_FW_UPLOAD, "FW_UPLOAD",         mpi_pre_fw_upload },
11375         { MPI2_FUNCTION_SATA_PASSTHROUGH, "SATA_PASSTHROUGH",
11376             mpi_pre_sata_passthrough },
11377         { MPI2_FUNCTION_SMP_PASSTHROUGH, "SMP_PASSTHROUGH",
11378             mpi_pre_smp_passthrough},
11379         { MPI2_FUNCTION_SCSI_IO_REQUEST, "SCSI_IO_REQUEST",
11380             mpi_pre_scsi_io_req},
11381         { MPI2_FUNCTION_CONFIG, "CONFIG",               mpi_pre_config},
11382         { MPI2_FUNCTION_SAS_IO_UNIT_CONTROL, "SAS_IO_UNIT_CONTROL",
11383             mpi_pre_sas_io_unit_control },
11384         { 0xFF, NULL,                           NULL } /* list end */
11385 };
11386 
11387 static void
11388 mptsas_prep_sgl_offset(mptsas_t *mpt, mptsas_pt_request_t *pt)
11389 {
11390         pMPI2RequestHeader_t    hdr;
11391         struct mps_func         *f;
11392 
11393         hdr = (pMPI2RequestHeader_t)pt->request;
11394 
11395         for (f = mps_func_list; f->f_pre != NULL; f++) {
11396                 if (hdr->Function == f->Function) {
11397                         f->f_pre(mpt, pt);
11398                         NDBG15(("mptsas_prep_sgl_offset: Function %s,"
11399                             " sgl_offset 0x%x", f->Name,
11400                             pt->sgl_offset));
11401                         return;
11402                 }
11403         }
11404         NDBG15(("mptsas_prep_sgl_offset: Unknown Function 0x%02x,"
11405             " returning req_size 0x%x for sgl_offset",
11406             hdr->Function, pt->request_size));
11407         pt->sgl_offset = (uint16_t)pt->request_size;
11408 }
11409 
11410 
11411 static int
11412 mptsas_do_passthru(mptsas_t *mpt, uint8_t *request, uint8_t *reply,
11413     uint8_t *data, uint32_t request_size, uint32_t reply_size,
11414     uint32_t data_size, uint8_t direction, uint8_t *dataout,
11415     uint32_t dataout_size, short timeout, int mode)
11416 {
11417         mptsas_pt_request_t             pt;
11418         mptsas_dma_alloc_state_t        data_dma_state;
11419         mptsas_dma_alloc_state_t        dataout_dma_state;
11420         caddr_t                         memp;
11421         mptsas_cmd_t                    *cmd = NULL;
11422         struct scsi_pkt                 *pkt;
11423         uint32_t                        reply_len = 0, sense_len = 0;
11424         pMPI2RequestHeader_t            request_hdrp;
11425         pMPI2RequestHeader_t            request_msg;
11426         pMPI2DefaultReply_t             reply_msg;
11427         Mpi2SCSIIOReply_t               rep_msg;
11428         int                             i, status = 0, pt_flags = 0, rv = 0;
11429         int                             rvalue;
11430         uint8_t                         function;
11431 
11432         ASSERT(mutex_owned(&mpt->m_mutex));
11433 
11434         reply_msg = (pMPI2DefaultReply_t)(&rep_msg);
11435         bzero(reply_msg, sizeof (MPI2_DEFAULT_REPLY));
11436         request_msg = kmem_zalloc(request_size, KM_SLEEP);
11437 
11438         mutex_exit(&mpt->m_mutex);
11439         /*
11440          * copy in the request buffer since it could be used by
11441          * another thread when the pt request into waitq
11442          */
11443         if (ddi_copyin(request, request_msg, request_size, mode)) {
11444                 mutex_enter(&mpt->m_mutex);
11445                 status = EFAULT;
11446                 mptsas_log(mpt, CE_WARN, "failed to copy request data");
11447                 goto out;
11448         }
11449         mutex_enter(&mpt->m_mutex);
11450 
11451         function = request_msg->Function;
11452         if (function == MPI2_FUNCTION_SCSI_TASK_MGMT) {
11453                 pMpi2SCSITaskManagementRequest_t        task;
11454                 task = (pMpi2SCSITaskManagementRequest_t)request_msg;
11455                 mptsas_setup_bus_reset_delay(mpt);
11456                 rv = mptsas_ioc_task_management(mpt, task->TaskType,
11457                     task->DevHandle, (int)task->LUN[1], reply, reply_size,
11458                     mode);
11459 
11460                 if (rv != TRUE) {
11461                         status = EIO;
11462                         mptsas_log(mpt, CE_WARN, "task management failed");
11463                 }
11464                 goto out;
11465         }
11466 
11467         if (data_size != 0) {
11468                 data_dma_state.size = data_size;
11469                 if (mptsas_dma_alloc(mpt, &data_dma_state) != DDI_SUCCESS) {
11470                         status = ENOMEM;
11471                         mptsas_log(mpt, CE_WARN, "failed to alloc DMA "
11472                             "resource");
11473                         goto out;
11474                 }
11475                 pt_flags |= MPTSAS_DATA_ALLOCATED;
11476                 if (direction == MPTSAS_PASS_THRU_DIRECTION_WRITE) {
11477                         mutex_exit(&mpt->m_mutex);
11478                         for (i = 0; i < data_size; i++) {
11479                                 if (ddi_copyin(data + i, (uint8_t *)
11480                                     data_dma_state.memp + i, 1, mode)) {
11481                                         mutex_enter(&mpt->m_mutex);
11482                                         status = EFAULT;
11483                                         mptsas_log(mpt, CE_WARN, "failed to "
11484                                             "copy read data");
11485                                         goto out;
11486                                 }
11487                         }
11488                         mutex_enter(&mpt->m_mutex);
11489                 }
11490         }
11491         else
11492                 bzero(&data_dma_state, sizeof (data_dma_state));
11493 
11494         if (dataout_size != 0) {
11495                 dataout_dma_state.size = dataout_size;
11496                 if (mptsas_dma_alloc(mpt, &dataout_dma_state) != DDI_SUCCESS) {
11497                         status = ENOMEM;
11498                         mptsas_log(mpt, CE_WARN, "failed to alloc DMA "
11499                             "resource");
11500                         goto out;
11501                 }
11502                 pt_flags |= MPTSAS_DATAOUT_ALLOCATED;
11503                 mutex_exit(&mpt->m_mutex);
11504                 for (i = 0; i < dataout_size; i++) {
11505                         if (ddi_copyin(dataout + i, (uint8_t *)
11506                             dataout_dma_state.memp + i, 1, mode)) {
11507                                 mutex_enter(&mpt->m_mutex);
11508                                 mptsas_log(mpt, CE_WARN, "failed to copy out"
11509                                     " data");
11510                                 status = EFAULT;
11511                                 goto out;
11512                         }
11513                 }
11514                 mutex_enter(&mpt->m_mutex);
11515         }
11516         else
11517                 bzero(&dataout_dma_state, sizeof (dataout_dma_state));
11518 
11519         if ((rvalue = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
11520                 status = EAGAIN;
11521                 mptsas_log(mpt, CE_NOTE, "event ack command pool is full");
11522                 goto out;
11523         }
11524         pt_flags |= MPTSAS_REQUEST_POOL_CMD;
11525 
11526         bzero((caddr_t)cmd, sizeof (*cmd));
11527         bzero((caddr_t)pkt, scsi_pkt_size());
11528         bzero((caddr_t)&pt, sizeof (pt));
11529 
11530         cmd->ioc_cmd_slot = (uint32_t)(rvalue);
11531 
11532         pt.request = (uint8_t *)request_msg;
11533         pt.direction = direction;
11534         pt.simple = 0;
11535         pt.request_size = request_size;
11536         pt.data_size = data_size;
11537         pt.dataout_size = dataout_size;
11538         pt.data_cookie = data_dma_state.cookie;
11539         pt.dataout_cookie = dataout_dma_state.cookie;
11540         mptsas_prep_sgl_offset(mpt, &pt);
11541 
11542         /*
11543          * Form a blank cmd/pkt to store the acknowledgement message
11544          */
11545         pkt->pkt_cdbp                = (opaque_t)&cmd->cmd_cdb[0];
11546         pkt->pkt_scbp                = (opaque_t)&cmd->cmd_scb;
11547         pkt->pkt_ha_private  = (opaque_t)&pt;
11548         pkt->pkt_flags               = FLAG_HEAD;
11549         pkt->pkt_time                = timeout;
11550         cmd->cmd_pkt         = pkt;
11551         cmd->cmd_flags               = CFLAG_CMDIOC | CFLAG_PASSTHRU;
11552 
11553         /*
11554          * Save the command in a slot
11555          */
11556         if (mptsas_save_cmd(mpt, cmd) == TRUE) {
11557                 /*
11558                  * Once passthru command get slot, set cmd_flags
11559                  * CFLAG_PREPARED.
11560                  */
11561                 cmd->cmd_flags |= CFLAG_PREPARED;
11562                 mptsas_start_passthru(mpt, cmd);
11563         } else {
11564                 mptsas_waitq_add(mpt, cmd);
11565         }
11566 
11567         while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
11568                 cv_wait(&mpt->m_passthru_cv, &mpt->m_mutex);
11569         }
11570 
11571         if (cmd->cmd_flags & CFLAG_PREPARED) {
11572                 memp = mpt->m_req_frame + (mpt->m_req_frame_size *
11573                     cmd->cmd_slot);
11574                 request_hdrp = (pMPI2RequestHeader_t)memp;
11575         }
11576 
11577         if (cmd->cmd_flags & CFLAG_TIMEOUT) {
11578                 status = ETIMEDOUT;
11579                 mptsas_log(mpt, CE_WARN, "passthrough command timeout");
11580                 pt_flags |= MPTSAS_CMD_TIMEOUT;
11581                 goto out;
11582         }
11583 
11584         if (cmd->cmd_rfm) {
11585                 /*
11586                  * cmd_rfm is zero means the command reply is a CONTEXT
11587                  * reply and no PCI Write to post the free reply SMFA
11588                  * because no reply message frame is used.
11589                  * cmd_rfm is non-zero means the reply is a ADDRESS
11590                  * reply and reply message frame is used.
11591                  */
11592                 pt_flags |= MPTSAS_ADDRESS_REPLY;
11593                 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
11594                     DDI_DMA_SYNC_FORCPU);
11595                 reply_msg = (pMPI2DefaultReply_t)
11596                     (mpt->m_reply_frame + (cmd->cmd_rfm -
11597                     (mpt->m_reply_frame_dma_addr&0xfffffffful)));
11598         }
11599 
11600         mptsas_fma_check(mpt, cmd);
11601         if (pkt->pkt_reason == CMD_TRAN_ERR) {
11602                 status = EAGAIN;
11603                 mptsas_log(mpt, CE_WARN, "passthru fma error");
11604                 goto out;
11605         }
11606         if (pkt->pkt_reason == CMD_RESET) {
11607                 status = EAGAIN;
11608                 mptsas_log(mpt, CE_WARN, "ioc reset abort passthru");
11609                 goto out;
11610         }
11611 
11612         if (pkt->pkt_reason == CMD_INCOMPLETE) {
11613                 status = EIO;
11614                 mptsas_log(mpt, CE_WARN, "passthrough command incomplete");
11615                 goto out;
11616         }
11617 
11618         mutex_exit(&mpt->m_mutex);
11619         if (cmd->cmd_flags & CFLAG_PREPARED) {
11620                 function = request_hdrp->Function;
11621                 if ((function == MPI2_FUNCTION_SCSI_IO_REQUEST) ||
11622                     (function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) {
11623                         reply_len = sizeof (MPI2_SCSI_IO_REPLY);
11624                         sense_len = reply_size - reply_len;
11625                 } else {
11626                         reply_len = reply_size;
11627                         sense_len = 0;
11628                 }
11629 
11630                 for (i = 0; i < reply_len; i++) {
11631                         if (ddi_copyout((uint8_t *)reply_msg + i, reply + i, 1,
11632                             mode)) {
11633                                 mutex_enter(&mpt->m_mutex);
11634                                 status = EFAULT;
11635                                 mptsas_log(mpt, CE_WARN, "failed to copy out "
11636                                     "reply data");
11637                                 goto out;
11638                         }
11639                 }
11640                 for (i = 0; i < sense_len; i++) {
11641                         if (ddi_copyout((uint8_t *)request_hdrp + 64 + i,
11642                             reply + reply_len + i, 1, mode)) {
11643                                 mutex_enter(&mpt->m_mutex);
11644                                 status = EFAULT;
11645                                 mptsas_log(mpt, CE_WARN, "failed to copy out "
11646                                     "sense data");
11647                                 goto out;
11648                         }
11649                 }
11650         }
11651 
11652         if (data_size) {
11653                 if (direction != MPTSAS_PASS_THRU_DIRECTION_WRITE) {
11654                         (void) ddi_dma_sync(data_dma_state.handle, 0, 0,
11655                             DDI_DMA_SYNC_FORCPU);
11656                         for (i = 0; i < data_size; i++) {
11657                                 if (ddi_copyout((uint8_t *)(
11658                                     data_dma_state.memp + i), data + i,  1,
11659                                     mode)) {
11660                                         mutex_enter(&mpt->m_mutex);
11661                                         status = EFAULT;
11662                                         mptsas_log(mpt, CE_WARN, "failed to "
11663                                             "copy out the reply data");
11664                                         goto out;
11665                                 }
11666                         }
11667                 }
11668         }
11669         mutex_enter(&mpt->m_mutex);
11670 out:
11671         /*
11672          * Put the reply frame back on the free queue, increment the free
11673          * index, and write the new index to the free index register.  But only
11674          * if this reply is an ADDRESS reply.
11675          */
11676         if (pt_flags & MPTSAS_ADDRESS_REPLY) {
11677                 ddi_put32(mpt->m_acc_free_queue_hdl,
11678                     &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
11679                     cmd->cmd_rfm);
11680                 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
11681                     DDI_DMA_SYNC_FORDEV);
11682                 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
11683                         mpt->m_free_index = 0;
11684                 }
11685                 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
11686                     mpt->m_free_index);
11687         }
11688         if (cmd && (cmd->cmd_flags & CFLAG_PREPARED)) {
11689                 mptsas_remove_cmd(mpt, cmd);
11690                 pt_flags &= (~MPTSAS_REQUEST_POOL_CMD);
11691         }
11692         if (pt_flags & MPTSAS_REQUEST_POOL_CMD)
11693                 mptsas_return_to_pool(mpt, cmd);
11694         if (pt_flags & MPTSAS_DATA_ALLOCATED) {
11695                 if (mptsas_check_dma_handle(data_dma_state.handle) !=
11696                     DDI_SUCCESS) {
11697                         ddi_fm_service_impact(mpt->m_dip,
11698                             DDI_SERVICE_UNAFFECTED);
11699                         status = EFAULT;
11700                 }
11701                 mptsas_dma_free(&data_dma_state);
11702         }
11703         if (pt_flags & MPTSAS_DATAOUT_ALLOCATED) {
11704                 if (mptsas_check_dma_handle(dataout_dma_state.handle) !=
11705                     DDI_SUCCESS) {
11706                         ddi_fm_service_impact(mpt->m_dip,
11707                             DDI_SERVICE_UNAFFECTED);
11708                         status = EFAULT;
11709                 }
11710                 mptsas_dma_free(&dataout_dma_state);
11711         }
11712         if (pt_flags & MPTSAS_CMD_TIMEOUT) {
11713                 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
11714                         mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
11715                 }
11716         }
11717         if (request_msg)
11718                 kmem_free(request_msg, request_size);
11719 
11720         return (status);
11721 }
11722 
11723 static int
11724 mptsas_pass_thru(mptsas_t *mpt, mptsas_pass_thru_t *data, int mode)
11725 {
11726         /*
11727          * If timeout is 0, set timeout to default of 60 seconds.
11728          */
11729         if (data->Timeout == 0) {
11730                 data->Timeout = MPTSAS_PASS_THRU_TIME_DEFAULT;
11731         }
11732 
11733         if (((data->DataSize == 0) &&
11734             (data->DataDirection == MPTSAS_PASS_THRU_DIRECTION_NONE)) ||
11735             ((data->DataSize != 0) &&
11736             ((data->DataDirection == MPTSAS_PASS_THRU_DIRECTION_READ) ||
11737             (data->DataDirection == MPTSAS_PASS_THRU_DIRECTION_WRITE) ||
11738             ((data->DataDirection == MPTSAS_PASS_THRU_DIRECTION_BOTH) &&
11739             (data->DataOutSize != 0))))) {
11740                 if (data->DataDirection == MPTSAS_PASS_THRU_DIRECTION_BOTH) {
11741                         data->DataDirection = MPTSAS_PASS_THRU_DIRECTION_READ;
11742                 } else {
11743                         data->DataOutSize = 0;
11744                 }
11745                 /*
11746                  * Send passthru request messages
11747                  */
11748                 return (mptsas_do_passthru(mpt,
11749                     (uint8_t *)((uintptr_t)data->PtrRequest),
11750                     (uint8_t *)((uintptr_t)data->PtrReply),
11751                     (uint8_t *)((uintptr_t)data->PtrData),
11752                     data->RequestSize, data->ReplySize,
11753                     data->DataSize, (uint8_t)data->DataDirection,
11754                     (uint8_t *)((uintptr_t)data->PtrDataOut),
11755                     data->DataOutSize, data->Timeout, mode));
11756         } else {
11757                 return (EINVAL);
11758         }
11759 }
11760 
11761 static uint8_t
11762 mptsas_get_fw_diag_buffer_number(mptsas_t *mpt, uint32_t unique_id)
11763 {
11764         uint8_t index;
11765 
11766         for (index = 0; index < MPI2_DIAG_BUF_TYPE_COUNT; index++) {
11767                 if (mpt->m_fw_diag_buffer_list[index].unique_id == unique_id) {
11768                         return (index);
11769                 }
11770         }
11771 
11772         return (MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND);
11773 }
11774 
11775 static void
11776 mptsas_start_diag(mptsas_t *mpt, mptsas_cmd_t *cmd)
11777 {
11778         pMpi2DiagBufferPostRequest_t    pDiag_post_msg;
11779         pMpi2DiagReleaseRequest_t       pDiag_release_msg;
11780         struct scsi_pkt                 *pkt = cmd->cmd_pkt;
11781         mptsas_diag_request_t           *diag = pkt->pkt_ha_private;
11782         uint32_t                        i;
11783         uint64_t                        request_desc;
11784 
11785         ASSERT(mutex_owned(&mpt->m_mutex));
11786 
11787         /*
11788          * Form the diag message depending on the post or release function.
11789          */
11790         if (diag->function == MPI2_FUNCTION_DIAG_BUFFER_POST) {
11791                 pDiag_post_msg = (pMpi2DiagBufferPostRequest_t)
11792                     (mpt->m_req_frame + (mpt->m_req_frame_size *
11793                     cmd->cmd_slot));
11794                 bzero(pDiag_post_msg, mpt->m_req_frame_size);
11795                 ddi_put8(mpt->m_acc_req_frame_hdl, &pDiag_post_msg->Function,
11796                     diag->function);
11797                 ddi_put8(mpt->m_acc_req_frame_hdl, &pDiag_post_msg->BufferType,
11798                     diag->pBuffer->buffer_type);
11799                 ddi_put8(mpt->m_acc_req_frame_hdl,
11800                     &pDiag_post_msg->ExtendedType,
11801                     diag->pBuffer->extended_type);
11802                 ddi_put32(mpt->m_acc_req_frame_hdl,
11803                     &pDiag_post_msg->BufferLength,
11804                     diag->pBuffer->buffer_data.size);
11805                 for (i = 0; i < (sizeof (pDiag_post_msg->ProductSpecific) / 4);
11806                     i++) {
11807                         ddi_put32(mpt->m_acc_req_frame_hdl,
11808                             &pDiag_post_msg->ProductSpecific[i],
11809                             diag->pBuffer->product_specific[i]);
11810                 }
11811                 ddi_put32(mpt->m_acc_req_frame_hdl,
11812                     &pDiag_post_msg->BufferAddress.Low,
11813                     (uint32_t)(diag->pBuffer->buffer_data.cookie.dmac_laddress
11814                     & 0xffffffffull));
11815                 ddi_put32(mpt->m_acc_req_frame_hdl,
11816                     &pDiag_post_msg->BufferAddress.High,
11817                     (uint32_t)(diag->pBuffer->buffer_data.cookie.dmac_laddress
11818                     >> 32));
11819         } else {
11820                 pDiag_release_msg = (pMpi2DiagReleaseRequest_t)
11821                     (mpt->m_req_frame + (mpt->m_req_frame_size *
11822                     cmd->cmd_slot));
11823                 bzero(pDiag_release_msg, mpt->m_req_frame_size);
11824                 ddi_put8(mpt->m_acc_req_frame_hdl,
11825                     &pDiag_release_msg->Function, diag->function);
11826                 ddi_put8(mpt->m_acc_req_frame_hdl,
11827                     &pDiag_release_msg->BufferType,
11828                     diag->pBuffer->buffer_type);
11829         }
11830 
11831         /*
11832          * Send the message
11833          */
11834         (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
11835             DDI_DMA_SYNC_FORDEV);
11836         request_desc = (cmd->cmd_slot << 16) |
11837             MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
11838         cmd->cmd_rfm = NULL;
11839         MPTSAS_START_CMD(mpt, request_desc);
11840         if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl) !=
11841             DDI_SUCCESS) ||
11842             (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl) !=
11843             DDI_SUCCESS)) {
11844                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
11845         }
11846 }
11847 
11848 static int
11849 mptsas_post_fw_diag_buffer(mptsas_t *mpt,
11850     mptsas_fw_diagnostic_buffer_t *pBuffer, uint32_t *return_code)
11851 {
11852         mptsas_diag_request_t           diag;
11853         int                             status, slot_num, post_flags = 0;
11854         mptsas_cmd_t                    *cmd = NULL;
11855         struct scsi_pkt                 *pkt;
11856         pMpi2DiagBufferPostReply_t      reply;
11857         uint16_t                        iocstatus;
11858         uint32_t                        iocloginfo, transfer_length;
11859 
11860         /*
11861          * If buffer is not enabled, just leave.
11862          */
11863         *return_code = MPTSAS_FW_DIAG_ERROR_POST_FAILED;
11864         if (!pBuffer->enabled) {
11865                 status = DDI_FAILURE;
11866                 goto out;
11867         }
11868 
11869         /*
11870          * Clear some flags initially.
11871          */
11872         pBuffer->force_release = FALSE;
11873         pBuffer->valid_data = FALSE;
11874         pBuffer->owned_by_firmware = FALSE;
11875 
11876         /*
11877          * Get a cmd buffer from the cmd buffer pool
11878          */
11879         if ((slot_num = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
11880                 status = DDI_FAILURE;
11881                 mptsas_log(mpt, CE_NOTE, "command pool is full: Post FW Diag");
11882                 goto out;
11883         }
11884         post_flags |= MPTSAS_REQUEST_POOL_CMD;
11885 
11886         bzero((caddr_t)cmd, sizeof (*cmd));
11887         bzero((caddr_t)pkt, scsi_pkt_size());
11888 
11889         cmd->ioc_cmd_slot = (uint32_t)(slot_num);
11890 
11891         diag.pBuffer = pBuffer;
11892         diag.function = MPI2_FUNCTION_DIAG_BUFFER_POST;
11893 
11894         /*
11895          * Form a blank cmd/pkt to store the acknowledgement message
11896          */
11897         pkt->pkt_ha_private  = (opaque_t)&diag;
11898         pkt->pkt_flags               = FLAG_HEAD;
11899         pkt->pkt_time                = 60;
11900         cmd->cmd_pkt         = pkt;
11901         cmd->cmd_flags               = CFLAG_CMDIOC | CFLAG_FW_DIAG;
11902 
11903         /*
11904          * Save the command in a slot
11905          */
11906         if (mptsas_save_cmd(mpt, cmd) == TRUE) {
11907                 /*
11908                  * Once passthru command get slot, set cmd_flags
11909                  * CFLAG_PREPARED.
11910                  */
11911                 cmd->cmd_flags |= CFLAG_PREPARED;
11912                 mptsas_start_diag(mpt, cmd);
11913         } else {
11914                 mptsas_waitq_add(mpt, cmd);
11915         }
11916 
11917         while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
11918                 cv_wait(&mpt->m_fw_diag_cv, &mpt->m_mutex);
11919         }
11920 
11921         if (cmd->cmd_flags & CFLAG_TIMEOUT) {
11922                 status = DDI_FAILURE;
11923                 mptsas_log(mpt, CE_WARN, "Post FW Diag command timeout");
11924                 goto out;
11925         }
11926 
11927         /*
11928          * cmd_rfm points to the reply message if a reply was given.  Check the
11929          * IOCStatus to make sure everything went OK with the FW diag request
11930          * and set buffer flags.
11931          */
11932         if (cmd->cmd_rfm) {
11933                 post_flags |= MPTSAS_ADDRESS_REPLY;
11934                 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
11935                     DDI_DMA_SYNC_FORCPU);
11936                 reply = (pMpi2DiagBufferPostReply_t)(mpt->m_reply_frame +
11937                     (cmd->cmd_rfm -
11938                     (mpt->m_reply_frame_dma_addr&0xfffffffful)));
11939 
11940                 /*
11941                  * Get the reply message data
11942                  */
11943                 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
11944                     &reply->IOCStatus);
11945                 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
11946                     &reply->IOCLogInfo);
11947                 transfer_length = ddi_get32(mpt->m_acc_reply_frame_hdl,
11948                     &reply->TransferLength);
11949 
11950                 /*
11951                  * If post failed quit.
11952                  */
11953                 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
11954                         status = DDI_FAILURE;
11955                         NDBG13(("post FW Diag Buffer failed: IOCStatus=0x%x, "
11956                             "IOCLogInfo=0x%x, TransferLength=0x%x", iocstatus,
11957                             iocloginfo, transfer_length));
11958                         goto out;
11959                 }
11960 
11961                 /*
11962                  * Post was successful.
11963                  */
11964                 pBuffer->valid_data = TRUE;
11965                 pBuffer->owned_by_firmware = TRUE;
11966                 *return_code = MPTSAS_FW_DIAG_ERROR_SUCCESS;
11967                 status = DDI_SUCCESS;
11968         }
11969 
11970 out:
11971         /*
11972          * Put the reply frame back on the free queue, increment the free
11973          * index, and write the new index to the free index register.  But only
11974          * if this reply is an ADDRESS reply.
11975          */
11976         if (post_flags & MPTSAS_ADDRESS_REPLY) {
11977                 ddi_put32(mpt->m_acc_free_queue_hdl,
11978                     &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
11979                     cmd->cmd_rfm);
11980                 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
11981                     DDI_DMA_SYNC_FORDEV);
11982                 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
11983                         mpt->m_free_index = 0;
11984                 }
11985                 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
11986                     mpt->m_free_index);
11987         }
11988         if (cmd && (cmd->cmd_flags & CFLAG_PREPARED)) {
11989                 mptsas_remove_cmd(mpt, cmd);
11990                 post_flags &= (~MPTSAS_REQUEST_POOL_CMD);
11991         }
11992         if (post_flags & MPTSAS_REQUEST_POOL_CMD) {
11993                 mptsas_return_to_pool(mpt, cmd);
11994         }
11995 
11996         return (status);
11997 }
11998 
11999 static int
12000 mptsas_release_fw_diag_buffer(mptsas_t *mpt,
12001     mptsas_fw_diagnostic_buffer_t *pBuffer, uint32_t *return_code,
12002     uint32_t diag_type)
12003 {
12004         mptsas_diag_request_t   diag;
12005         int                     status, slot_num, rel_flags = 0;
12006         mptsas_cmd_t            *cmd = NULL;
12007         struct scsi_pkt         *pkt;
12008         pMpi2DiagReleaseReply_t reply;
12009         uint16_t                iocstatus;
12010         uint32_t                iocloginfo;
12011 
12012         /*
12013          * If buffer is not enabled, just leave.
12014          */
12015         *return_code = MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED;
12016         if (!pBuffer->enabled) {
12017                 mptsas_log(mpt, CE_NOTE, "This buffer type is not supported "
12018                     "by the IOC");
12019                 status = DDI_FAILURE;
12020                 goto out;
12021         }
12022 
12023         /*
12024          * Clear some flags initially.
12025          */
12026         pBuffer->force_release = FALSE;
12027         pBuffer->valid_data = FALSE;
12028         pBuffer->owned_by_firmware = FALSE;
12029 
12030         /*
12031          * Get a cmd buffer from the cmd buffer pool
12032          */
12033         if ((slot_num = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
12034                 status = DDI_FAILURE;
12035                 mptsas_log(mpt, CE_NOTE, "command pool is full: Release FW "
12036                     "Diag");
12037                 goto out;
12038         }
12039         rel_flags |= MPTSAS_REQUEST_POOL_CMD;
12040 
12041         bzero((caddr_t)cmd, sizeof (*cmd));
12042         bzero((caddr_t)pkt, scsi_pkt_size());
12043 
12044         cmd->ioc_cmd_slot = (uint32_t)(slot_num);
12045 
12046         diag.pBuffer = pBuffer;
12047         diag.function = MPI2_FUNCTION_DIAG_RELEASE;
12048 
12049         /*
12050          * Form a blank cmd/pkt to store the acknowledgement message
12051          */
12052         pkt->pkt_ha_private  = (opaque_t)&diag;
12053         pkt->pkt_flags               = FLAG_HEAD;
12054         pkt->pkt_time                = 60;
12055         cmd->cmd_pkt         = pkt;
12056         cmd->cmd_flags               = CFLAG_CMDIOC | CFLAG_FW_DIAG;
12057 
12058         /*
12059          * Save the command in a slot
12060          */
12061         if (mptsas_save_cmd(mpt, cmd) == TRUE) {
12062                 /*
12063                  * Once passthru command get slot, set cmd_flags
12064                  * CFLAG_PREPARED.
12065                  */
12066                 cmd->cmd_flags |= CFLAG_PREPARED;
12067                 mptsas_start_diag(mpt, cmd);
12068         } else {
12069                 mptsas_waitq_add(mpt, cmd);
12070         }
12071 
12072         while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
12073                 cv_wait(&mpt->m_fw_diag_cv, &mpt->m_mutex);
12074         }
12075 
12076         if (cmd->cmd_flags & CFLAG_TIMEOUT) {
12077                 status = DDI_FAILURE;
12078                 mptsas_log(mpt, CE_WARN, "Release FW Diag command timeout");
12079                 goto out;
12080         }
12081 
12082         /*
12083          * cmd_rfm points to the reply message if a reply was given.  Check the
12084          * IOCStatus to make sure everything went OK with the FW diag request
12085          * and set buffer flags.
12086          */
12087         if (cmd->cmd_rfm) {
12088                 rel_flags |= MPTSAS_ADDRESS_REPLY;
12089                 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
12090                     DDI_DMA_SYNC_FORCPU);
12091                 reply = (pMpi2DiagReleaseReply_t)(mpt->m_reply_frame +
12092                     (cmd->cmd_rfm -
12093                     (mpt->m_reply_frame_dma_addr&0xfffffffful)));
12094 
12095                 /*
12096                  * Get the reply message data
12097                  */
12098                 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
12099                     &reply->IOCStatus);
12100                 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
12101                     &reply->IOCLogInfo);
12102 
12103                 /*
12104                  * If release failed quit.
12105                  */
12106                 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) ||
12107                     pBuffer->owned_by_firmware) {
12108                         status = DDI_FAILURE;
12109                         NDBG13(("release FW Diag Buffer failed: "
12110                             "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
12111                             iocloginfo));
12112                         goto out;
12113                 }
12114 
12115                 /*
12116                  * Release was successful.
12117                  */
12118                 *return_code = MPTSAS_FW_DIAG_ERROR_SUCCESS;
12119                 status = DDI_SUCCESS;
12120 
12121                 /*
12122                  * If this was for an UNREGISTER diag type command, clear the
12123                  * unique ID.
12124                  */
12125                 if (diag_type == MPTSAS_FW_DIAG_TYPE_UNREGISTER) {
12126                         pBuffer->unique_id = MPTSAS_FW_DIAG_INVALID_UID;
12127                 }
12128         }
12129 
12130 out:
12131         /*
12132          * Put the reply frame back on the free queue, increment the free
12133          * index, and write the new index to the free index register.  But only
12134          * if this reply is an ADDRESS reply.
12135          */
12136         if (rel_flags & MPTSAS_ADDRESS_REPLY) {
12137                 ddi_put32(mpt->m_acc_free_queue_hdl,
12138                     &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
12139                     cmd->cmd_rfm);
12140                 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
12141                     DDI_DMA_SYNC_FORDEV);
12142                 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
12143                         mpt->m_free_index = 0;
12144                 }
12145                 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
12146                     mpt->m_free_index);
12147         }
12148         if (cmd && (cmd->cmd_flags & CFLAG_PREPARED)) {
12149                 mptsas_remove_cmd(mpt, cmd);
12150                 rel_flags &= (~MPTSAS_REQUEST_POOL_CMD);
12151         }
12152         if (rel_flags & MPTSAS_REQUEST_POOL_CMD) {
12153                 mptsas_return_to_pool(mpt, cmd);
12154         }
12155 
12156         return (status);
12157 }
12158 
12159 static int
12160 mptsas_diag_register(mptsas_t *mpt, mptsas_fw_diag_register_t *diag_register,
12161     uint32_t *return_code)
12162 {
12163         mptsas_fw_diagnostic_buffer_t   *pBuffer;
12164         uint8_t                         extended_type, buffer_type, i;
12165         uint32_t                        buffer_size;
12166         uint32_t                        unique_id;
12167         int                             status;
12168 
12169         ASSERT(mutex_owned(&mpt->m_mutex));
12170 
12171         extended_type = diag_register->ExtendedType;
12172         buffer_type = diag_register->BufferType;
12173         buffer_size = diag_register->RequestedBufferSize;
12174         unique_id = diag_register->UniqueId;
12175 
12176         /*
12177          * Check for valid buffer type
12178          */
12179         if (buffer_type >= MPI2_DIAG_BUF_TYPE_COUNT) {
12180                 *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12181                 return (DDI_FAILURE);
12182         }
12183 
12184         /*
12185          * Get the current buffer and look up the unique ID.  The unique ID
12186          * should not be found.  If it is, the ID is already in use.
12187          */
12188         i = mptsas_get_fw_diag_buffer_number(mpt, unique_id);
12189         pBuffer = &mpt->m_fw_diag_buffer_list[buffer_type];
12190         if (i != MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND) {
12191                 *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_UID;
12192                 return (DDI_FAILURE);
12193         }
12194 
12195         /*
12196          * The buffer's unique ID should not be registered yet, and the given
12197          * unique ID cannot be 0.
12198          */
12199         if ((pBuffer->unique_id != MPTSAS_FW_DIAG_INVALID_UID) ||
12200             (unique_id == MPTSAS_FW_DIAG_INVALID_UID)) {
12201                 *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_UID;
12202                 return (DDI_FAILURE);
12203         }
12204 
12205         /*
12206          * If this buffer is already posted as immediate, just change owner.
12207          */
12208         if (pBuffer->immediate && pBuffer->owned_by_firmware &&
12209             (pBuffer->unique_id == MPTSAS_FW_DIAG_INVALID_UID)) {
12210                 pBuffer->immediate = FALSE;
12211                 pBuffer->unique_id = unique_id;
12212                 return (DDI_SUCCESS);
12213         }
12214 
12215         /*
12216          * Post a new buffer after checking if it's enabled.  The DMA buffer
12217          * that is allocated will be contiguous (sgl_len = 1).
12218          */
12219         if (!pBuffer->enabled) {
12220                 *return_code = MPTSAS_FW_DIAG_ERROR_NO_BUFFER;
12221                 return (DDI_FAILURE);
12222         }
12223         bzero(&pBuffer->buffer_data, sizeof (mptsas_dma_alloc_state_t));
12224         pBuffer->buffer_data.size = buffer_size;
12225         if (mptsas_dma_alloc(mpt, &pBuffer->buffer_data) != DDI_SUCCESS) {
12226                 mptsas_log(mpt, CE_WARN, "failed to alloc DMA resource for "
12227                     "diag buffer: size = %d bytes", buffer_size);
12228                 *return_code = MPTSAS_FW_DIAG_ERROR_NO_BUFFER;
12229                 return (DDI_FAILURE);
12230         }
12231 
12232         /*
12233          * Copy the given info to the diag buffer and post the buffer.
12234          */
12235         pBuffer->buffer_type = buffer_type;
12236         pBuffer->immediate = FALSE;
12237         if (buffer_type == MPI2_DIAG_BUF_TYPE_TRACE) {
12238                 for (i = 0; i < (sizeof (pBuffer->product_specific) / 4);
12239                     i++) {
12240                         pBuffer->product_specific[i] =
12241                             diag_register->ProductSpecific[i];
12242                 }
12243         }
12244         pBuffer->extended_type = extended_type;
12245         pBuffer->unique_id = unique_id;
12246         status = mptsas_post_fw_diag_buffer(mpt, pBuffer, return_code);
12247 
12248         if (mptsas_check_dma_handle(pBuffer->buffer_data.handle) !=
12249             DDI_SUCCESS) {
12250                 mptsas_log(mpt, CE_WARN, "Check of DMA handle failed in "
12251                     "mptsas_diag_register.");
12252                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
12253                         status = DDI_FAILURE;
12254         }
12255 
12256         /*
12257          * In case there was a failure, free the DMA buffer.
12258          */
12259         if (status == DDI_FAILURE) {
12260                 mptsas_dma_free(&pBuffer->buffer_data);
12261         }
12262 
12263         return (status);
12264 }
12265 
12266 static int
12267 mptsas_diag_unregister(mptsas_t *mpt,
12268     mptsas_fw_diag_unregister_t *diag_unregister, uint32_t *return_code)
12269 {
12270         mptsas_fw_diagnostic_buffer_t   *pBuffer;
12271         uint8_t                         i;
12272         uint32_t                        unique_id;
12273         int                             status;
12274 
12275         ASSERT(mutex_owned(&mpt->m_mutex));
12276 
12277         unique_id = diag_unregister->UniqueId;
12278 
12279         /*
12280          * Get the current buffer and look up the unique ID.  The unique ID
12281          * should be there.
12282          */
12283         i = mptsas_get_fw_diag_buffer_number(mpt, unique_id);
12284         if (i == MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND) {
12285                 *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_UID;
12286                 return (DDI_FAILURE);
12287         }
12288 
12289         pBuffer = &mpt->m_fw_diag_buffer_list[i];
12290 
12291         /*
12292          * Try to release the buffer from FW before freeing it.  If release
12293          * fails, don't free the DMA buffer in case FW tries to access it
12294          * later.  If buffer is not owned by firmware, can't release it.
12295          */
12296         if (!pBuffer->owned_by_firmware) {
12297                 status = DDI_SUCCESS;
12298         } else {
12299                 status = mptsas_release_fw_diag_buffer(mpt, pBuffer,
12300                     return_code, MPTSAS_FW_DIAG_TYPE_UNREGISTER);
12301         }
12302 
12303         /*
12304          * At this point, return the current status no matter what happens with
12305          * the DMA buffer.
12306          */
12307         pBuffer->unique_id = MPTSAS_FW_DIAG_INVALID_UID;
12308         if (status == DDI_SUCCESS) {
12309                 if (mptsas_check_dma_handle(pBuffer->buffer_data.handle) !=
12310                     DDI_SUCCESS) {
12311                         mptsas_log(mpt, CE_WARN, "Check of DMA handle failed "
12312                             "in mptsas_diag_unregister.");
12313                         ddi_fm_service_impact(mpt->m_dip,
12314                             DDI_SERVICE_UNAFFECTED);
12315                 }
12316                 mptsas_dma_free(&pBuffer->buffer_data);
12317         }
12318 
12319         return (status);
12320 }
12321 
12322 static int
12323 mptsas_diag_query(mptsas_t *mpt, mptsas_fw_diag_query_t *diag_query,
12324     uint32_t *return_code)
12325 {
12326         mptsas_fw_diagnostic_buffer_t   *pBuffer;
12327         uint8_t                         i;
12328         uint32_t                        unique_id;
12329 
12330         ASSERT(mutex_owned(&mpt->m_mutex));
12331 
12332         unique_id = diag_query->UniqueId;
12333 
12334         /*
12335          * If ID is valid, query on ID.
12336          * If ID is invalid, query on buffer type.
12337          */
12338         if (unique_id == MPTSAS_FW_DIAG_INVALID_UID) {
12339                 i = diag_query->BufferType;
12340                 if (i >= MPI2_DIAG_BUF_TYPE_COUNT) {
12341                         *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_UID;
12342                         return (DDI_FAILURE);
12343                 }
12344         } else {
12345                 i = mptsas_get_fw_diag_buffer_number(mpt, unique_id);
12346                 if (i == MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND) {
12347                         *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_UID;
12348                         return (DDI_FAILURE);
12349                 }
12350         }
12351 
12352         /*
12353          * Fill query structure with the diag buffer info.
12354          */
12355         pBuffer = &mpt->m_fw_diag_buffer_list[i];
12356         diag_query->BufferType = pBuffer->buffer_type;
12357         diag_query->ExtendedType = pBuffer->extended_type;
12358         if (diag_query->BufferType == MPI2_DIAG_BUF_TYPE_TRACE) {
12359                 for (i = 0; i < (sizeof (diag_query->ProductSpecific) / 4);
12360                     i++) {
12361                         diag_query->ProductSpecific[i] =
12362                             pBuffer->product_specific[i];
12363                 }
12364         }
12365         diag_query->TotalBufferSize = pBuffer->buffer_data.size;
12366         diag_query->DriverAddedBufferSize = 0;
12367         diag_query->UniqueId = pBuffer->unique_id;
12368         diag_query->ApplicationFlags = 0;
12369         diag_query->DiagnosticFlags = 0;
12370 
12371         /*
12372          * Set/Clear application flags
12373          */
12374         if (pBuffer->immediate) {
12375                 diag_query->ApplicationFlags &= ~MPTSAS_FW_DIAG_FLAG_APP_OWNED;
12376         } else {
12377                 diag_query->ApplicationFlags |= MPTSAS_FW_DIAG_FLAG_APP_OWNED;
12378         }
12379         if (pBuffer->valid_data || pBuffer->owned_by_firmware) {
12380                 diag_query->ApplicationFlags |=
12381                     MPTSAS_FW_DIAG_FLAG_BUFFER_VALID;
12382         } else {
12383                 diag_query->ApplicationFlags &=
12384                     ~MPTSAS_FW_DIAG_FLAG_BUFFER_VALID;
12385         }
12386         if (pBuffer->owned_by_firmware) {
12387                 diag_query->ApplicationFlags |=
12388                     MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS;
12389         } else {
12390                 diag_query->ApplicationFlags &=
12391                     ~MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS;
12392         }
12393 
12394         return (DDI_SUCCESS);
12395 }
12396 
12397 static int
12398 mptsas_diag_read_buffer(mptsas_t *mpt,
12399     mptsas_diag_read_buffer_t *diag_read_buffer, uint8_t *ioctl_buf,
12400     uint32_t *return_code, int ioctl_mode)
12401 {
12402         mptsas_fw_diagnostic_buffer_t   *pBuffer;
12403         uint8_t                         i, *pData;
12404         uint32_t                        unique_id, byte;
12405         int                             status;
12406 
12407         ASSERT(mutex_owned(&mpt->m_mutex));
12408 
12409         unique_id = diag_read_buffer->UniqueId;
12410 
12411         /*
12412          * Get the current buffer and look up the unique ID.  The unique ID
12413          * should be there.
12414          */
12415         i = mptsas_get_fw_diag_buffer_number(mpt, unique_id);
12416         if (i == MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND) {
12417                 *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_UID;
12418                 return (DDI_FAILURE);
12419         }
12420 
12421         pBuffer = &mpt->m_fw_diag_buffer_list[i];
12422 
12423         /*
12424          * Make sure requested read is within limits
12425          */
12426         if (diag_read_buffer->StartingOffset + diag_read_buffer->BytesToRead >
12427             pBuffer->buffer_data.size) {
12428                 *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12429                 return (DDI_FAILURE);
12430         }
12431 
12432         /*
12433          * Copy the requested data from DMA to the diag_read_buffer.  The DMA
12434          * buffer that was allocated is one contiguous buffer.
12435          */
12436         pData = (uint8_t *)(pBuffer->buffer_data.memp +
12437             diag_read_buffer->StartingOffset);
12438         (void) ddi_dma_sync(pBuffer->buffer_data.handle, 0, 0,
12439             DDI_DMA_SYNC_FORCPU);
12440         for (byte = 0; byte < diag_read_buffer->BytesToRead; byte++) {
12441                 if (ddi_copyout(pData + byte, ioctl_buf + byte, 1, ioctl_mode)
12442                     != 0) {
12443                         return (DDI_FAILURE);
12444                 }
12445         }
12446         diag_read_buffer->Status = 0;
12447 
12448         /*
12449          * Set or clear the Force Release flag.
12450          */
12451         if (pBuffer->force_release) {
12452                 diag_read_buffer->Flags |= MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE;
12453         } else {
12454                 diag_read_buffer->Flags &= ~MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE;
12455         }
12456 
12457         /*
12458          * If buffer is to be reregistered, make sure it's not already owned by
12459          * firmware first.
12460          */
12461         status = DDI_SUCCESS;
12462         if (!pBuffer->owned_by_firmware) {
12463                 if (diag_read_buffer->Flags & MPTSAS_FW_DIAG_FLAG_REREGISTER) {
12464                         status = mptsas_post_fw_diag_buffer(mpt, pBuffer,
12465                             return_code);
12466                 }
12467         }
12468 
12469         return (status);
12470 }
12471 
12472 static int
12473 mptsas_diag_release(mptsas_t *mpt, mptsas_fw_diag_release_t *diag_release,
12474     uint32_t *return_code)
12475 {
12476         mptsas_fw_diagnostic_buffer_t   *pBuffer;
12477         uint8_t                         i;
12478         uint32_t                        unique_id;
12479         int                             status;
12480 
12481         ASSERT(mutex_owned(&mpt->m_mutex));
12482 
12483         unique_id = diag_release->UniqueId;
12484 
12485         /*
12486          * Get the current buffer and look up the unique ID.  The unique ID
12487          * should be there.
12488          */
12489         i = mptsas_get_fw_diag_buffer_number(mpt, unique_id);
12490         if (i == MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND) {
12491                 *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_UID;
12492                 return (DDI_FAILURE);
12493         }
12494 
12495         pBuffer = &mpt->m_fw_diag_buffer_list[i];
12496 
12497         /*
12498          * If buffer is not owned by firmware, it's already been released.
12499          */
12500         if (!pBuffer->owned_by_firmware) {
12501                 *return_code = MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED;
12502                 return (DDI_FAILURE);
12503         }
12504 
12505         /*
12506          * Release the buffer.
12507          */
12508         status = mptsas_release_fw_diag_buffer(mpt, pBuffer, return_code,
12509             MPTSAS_FW_DIAG_TYPE_RELEASE);
12510         return (status);
12511 }
12512 
12513 static int
12514 mptsas_do_diag_action(mptsas_t *mpt, uint32_t action, uint8_t *diag_action,
12515     uint32_t length, uint32_t *return_code, int ioctl_mode)
12516 {
12517         mptsas_fw_diag_register_t       diag_register;
12518         mptsas_fw_diag_unregister_t     diag_unregister;
12519         mptsas_fw_diag_query_t          diag_query;
12520         mptsas_diag_read_buffer_t       diag_read_buffer;
12521         mptsas_fw_diag_release_t        diag_release;
12522         int                             status = DDI_SUCCESS;
12523         uint32_t                        original_return_code, read_buf_len;
12524 
12525         ASSERT(mutex_owned(&mpt->m_mutex));
12526 
12527         original_return_code = *return_code;
12528         *return_code = MPTSAS_FW_DIAG_ERROR_SUCCESS;
12529 
12530         switch (action) {
12531                 case MPTSAS_FW_DIAG_TYPE_REGISTER:
12532                         if (!length) {
12533                                 *return_code =
12534                                     MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12535                                 status = DDI_FAILURE;
12536                                 break;
12537                         }
12538                         if (ddi_copyin(diag_action, &diag_register,
12539                             sizeof (diag_register), ioctl_mode) != 0) {
12540                                 return (DDI_FAILURE);
12541                         }
12542                         status = mptsas_diag_register(mpt, &diag_register,
12543                             return_code);
12544                         break;
12545 
12546                 case MPTSAS_FW_DIAG_TYPE_UNREGISTER:
12547                         if (length < sizeof (diag_unregister)) {
12548                                 *return_code =
12549                                     MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12550                                 status = DDI_FAILURE;
12551                                 break;
12552                         }
12553                         if (ddi_copyin(diag_action, &diag_unregister,
12554                             sizeof (diag_unregister), ioctl_mode) != 0) {
12555                                 return (DDI_FAILURE);
12556                         }
12557                         status = mptsas_diag_unregister(mpt, &diag_unregister,
12558                             return_code);
12559                         break;
12560 
12561                 case MPTSAS_FW_DIAG_TYPE_QUERY:
12562                         if (length < sizeof (diag_query)) {
12563                                 *return_code =
12564                                     MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12565                                 status = DDI_FAILURE;
12566                                 break;
12567                         }
12568                         if (ddi_copyin(diag_action, &diag_query,
12569                             sizeof (diag_query), ioctl_mode) != 0) {
12570                                 return (DDI_FAILURE);
12571                         }
12572                         status = mptsas_diag_query(mpt, &diag_query,
12573                             return_code);
12574                         if (status == DDI_SUCCESS) {
12575                                 if (ddi_copyout(&diag_query, diag_action,
12576                                     sizeof (diag_query), ioctl_mode) != 0) {
12577                                         return (DDI_FAILURE);
12578                                 }
12579                         }
12580                         break;
12581 
12582                 case MPTSAS_FW_DIAG_TYPE_READ_BUFFER:
12583                         if (ddi_copyin(diag_action, &diag_read_buffer,
12584                             sizeof (diag_read_buffer) - 4, ioctl_mode) != 0) {
12585                                 return (DDI_FAILURE);
12586                         }
12587                         read_buf_len = sizeof (diag_read_buffer) -
12588                             sizeof (diag_read_buffer.DataBuffer) +
12589                             diag_read_buffer.BytesToRead;
12590                         if (length < read_buf_len) {
12591                                 *return_code =
12592                                     MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12593                                 status = DDI_FAILURE;
12594                                 break;
12595                         }
12596                         status = mptsas_diag_read_buffer(mpt,
12597                             &diag_read_buffer, diag_action +
12598                             sizeof (diag_read_buffer) - 4, return_code,
12599                             ioctl_mode);
12600                         if (status == DDI_SUCCESS) {
12601                                 if (ddi_copyout(&diag_read_buffer, diag_action,
12602                                     sizeof (diag_read_buffer) - 4, ioctl_mode)
12603                                     != 0) {
12604                                         return (DDI_FAILURE);
12605                                 }
12606                         }
12607                         break;
12608 
12609                 case MPTSAS_FW_DIAG_TYPE_RELEASE:
12610                         if (length < sizeof (diag_release)) {
12611                                 *return_code =
12612                                     MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12613                                 status = DDI_FAILURE;
12614                                 break;
12615                         }
12616                         if (ddi_copyin(diag_action, &diag_release,
12617                             sizeof (diag_release), ioctl_mode) != 0) {
12618                                 return (DDI_FAILURE);
12619                         }
12620                         status = mptsas_diag_release(mpt, &diag_release,
12621                             return_code);
12622                         break;
12623 
12624                 default:
12625                         *return_code = MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12626                         status = DDI_FAILURE;
12627                         break;
12628         }
12629 
12630         if ((status == DDI_FAILURE) &&
12631             (original_return_code == MPTSAS_FW_DIAG_NEW) &&
12632             (*return_code != MPTSAS_FW_DIAG_ERROR_SUCCESS)) {
12633                 status = DDI_SUCCESS;
12634         }
12635 
12636         return (status);
12637 }
12638 
12639 static int
12640 mptsas_diag_action(mptsas_t *mpt, mptsas_diag_action_t *user_data, int mode)
12641 {
12642         int                     status;
12643         mptsas_diag_action_t    driver_data;
12644 
12645         ASSERT(mutex_owned(&mpt->m_mutex));
12646 
12647         /*
12648          * Copy the user data to a driver data buffer.
12649          */
12650         if (ddi_copyin(user_data, &driver_data, sizeof (mptsas_diag_action_t),
12651             mode) == 0) {
12652                 /*
12653                  * Send diag action request if Action is valid
12654                  */
12655                 if (driver_data.Action == MPTSAS_FW_DIAG_TYPE_REGISTER ||
12656                     driver_data.Action == MPTSAS_FW_DIAG_TYPE_UNREGISTER ||
12657                     driver_data.Action == MPTSAS_FW_DIAG_TYPE_QUERY ||
12658                     driver_data.Action == MPTSAS_FW_DIAG_TYPE_READ_BUFFER ||
12659                     driver_data.Action == MPTSAS_FW_DIAG_TYPE_RELEASE) {
12660                         status = mptsas_do_diag_action(mpt, driver_data.Action,
12661                             (void *)(uintptr_t)driver_data.PtrDiagAction,
12662                             driver_data.Length, &driver_data.ReturnCode,
12663                             mode);
12664                         if (status == DDI_SUCCESS) {
12665                                 if (ddi_copyout(&driver_data.ReturnCode,
12666                                     &user_data->ReturnCode,
12667                                     sizeof (user_data->ReturnCode), mode)
12668                                     != 0) {
12669                                         status = EFAULT;
12670                                 } else {
12671                                         status = 0;
12672                                 }
12673                         } else {
12674                                 status = EIO;
12675                         }
12676                 } else {
12677                         status = EINVAL;
12678                 }
12679         } else {
12680                 status = EFAULT;
12681         }
12682 
12683         return (status);
12684 }
12685 
12686 /*
12687  * This routine handles the "event query" ioctl.
12688  */
12689 static int
12690 mptsas_event_query(mptsas_t *mpt, mptsas_event_query_t *data, int mode,
12691     int *rval)
12692 {
12693         int                     status;
12694         mptsas_event_query_t    driverdata;
12695         uint8_t                 i;
12696 
12697         driverdata.Entries = MPTSAS_EVENT_QUEUE_SIZE;
12698 
12699         mutex_enter(&mpt->m_mutex);
12700         for (i = 0; i < 4; i++) {
12701                 driverdata.Types[i] = mpt->m_event_mask[i];
12702         }
12703         mutex_exit(&mpt->m_mutex);
12704 
12705         if (ddi_copyout(&driverdata, data, sizeof (driverdata), mode) != 0) {
12706                 status = EFAULT;
12707         } else {
12708                 *rval = MPTIOCTL_STATUS_GOOD;
12709                 status = 0;
12710         }
12711 
12712         return (status);
12713 }
12714 
12715 /*
12716  * This routine handles the "event enable" ioctl.
12717  */
12718 static int
12719 mptsas_event_enable(mptsas_t *mpt, mptsas_event_enable_t *data, int mode,
12720     int *rval)
12721 {
12722         int                     status;
12723         mptsas_event_enable_t   driverdata;
12724         uint8_t                 i;
12725 
12726         if (ddi_copyin(data, &driverdata, sizeof (driverdata), mode) == 0) {
12727                 mutex_enter(&mpt->m_mutex);
12728                 for (i = 0; i < 4; i++) {
12729                         mpt->m_event_mask[i] = driverdata.Types[i];
12730                 }
12731                 mutex_exit(&mpt->m_mutex);
12732 
12733                 *rval = MPTIOCTL_STATUS_GOOD;
12734                 status = 0;
12735         } else {
12736                 status = EFAULT;
12737         }
12738         return (status);
12739 }
12740 
12741 /*
12742  * This routine handles the "event report" ioctl.
12743  */
12744 static int
12745 mptsas_event_report(mptsas_t *mpt, mptsas_event_report_t *data, int mode,
12746     int *rval)
12747 {
12748         int                     status;
12749         mptsas_event_report_t   driverdata;
12750 
12751         mutex_enter(&mpt->m_mutex);
12752 
12753         if (ddi_copyin(&data->Size, &driverdata.Size, sizeof (driverdata.Size),
12754             mode) == 0) {
12755                 if (driverdata.Size >= sizeof (mpt->m_events)) {
12756                         if (ddi_copyout(mpt->m_events, data->Events,
12757                             sizeof (mpt->m_events), mode) != 0) {
12758                                 status = EFAULT;
12759                         } else {
12760                                 if (driverdata.Size > sizeof (mpt->m_events)) {
12761                                         driverdata.Size =
12762                                             sizeof (mpt->m_events);
12763                                         if (ddi_copyout(&driverdata.Size,
12764                                             &data->Size,
12765                                             sizeof (driverdata.Size),
12766                                             mode) != 0) {
12767                                                 status = EFAULT;
12768                                         } else {
12769                                                 *rval = MPTIOCTL_STATUS_GOOD;
12770                                                 status = 0;
12771                                         }
12772                                 } else {
12773                                         *rval = MPTIOCTL_STATUS_GOOD;
12774                                         status = 0;
12775                                 }
12776                         }
12777                 } else {
12778                         *rval = MPTIOCTL_STATUS_LEN_TOO_SHORT;
12779                         status = 0;
12780                 }
12781         } else {
12782                 status = EFAULT;
12783         }
12784 
12785         mutex_exit(&mpt->m_mutex);
12786         return (status);
12787 }
12788 
12789 static void
12790 mptsas_lookup_pci_data(mptsas_t *mpt, mptsas_adapter_data_t *adapter_data)
12791 {
12792         int     *reg_data;
12793         uint_t  reglen;
12794 
12795         /*
12796          * Lookup the 'reg' property and extract the other data
12797          */
12798         if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, mpt->m_dip,
12799             DDI_PROP_DONTPASS, "reg", &reg_data, &reglen) ==
12800             DDI_PROP_SUCCESS) {
12801                 /*
12802                  * Extract the PCI data from the 'reg' property first DWORD.
12803                  * The entry looks like the following:
12804                  * First DWORD:
12805                  * Bits 0 - 7 8-bit Register number
12806                  * Bits 8 - 10 3-bit Function number
12807                  * Bits 11 - 15 5-bit Device number
12808                  * Bits 16 - 23 8-bit Bus number
12809                  * Bits 24 - 25 2-bit Address Space type identifier
12810                  *
12811                  */
12812                 adapter_data->PciInformation.u.bits.BusNumber =
12813                     (reg_data[0] & 0x00FF0000) >> 16;
12814                 adapter_data->PciInformation.u.bits.DeviceNumber =
12815                     (reg_data[0] & 0x0000F800) >> 11;
12816                 adapter_data->PciInformation.u.bits.FunctionNumber =
12817                     (reg_data[0] & 0x00000700) >> 8;
12818                 ddi_prop_free((void *)reg_data);
12819         } else {
12820                 /*
12821                  * If we can't determine the PCI data then we fill in FF's for
12822                  * the data to indicate this.
12823                  */
12824                 adapter_data->PCIDeviceHwId = 0xFFFFFFFF;
12825                 adapter_data->MpiPortNumber = 0xFFFFFFFF;
12826                 adapter_data->PciInformation.u.AsDWORD = 0xFFFFFFFF;
12827         }
12828 
12829         /*
12830          * Saved in the mpt->m_fwversion
12831          */
12832         adapter_data->MpiFirmwareVersion = mpt->m_fwversion;
12833 }
12834 
12835 static void
12836 mptsas_read_adapter_data(mptsas_t *mpt, mptsas_adapter_data_t *adapter_data)
12837 {
12838         char    *driver_verstr = MPTSAS_MOD_STRING;
12839 
12840         mptsas_lookup_pci_data(mpt, adapter_data);
12841         adapter_data->AdapterType = MPTIOCTL_ADAPTER_TYPE_SAS3;
12842         adapter_data->PCIDeviceHwId = (uint32_t)mpt->m_devid;
12843         adapter_data->PCIDeviceHwRev = (uint32_t)mpt->m_revid;
12844         adapter_data->SubSystemId = (uint32_t)mpt->m_ssid;
12845         adapter_data->SubsystemVendorId = (uint32_t)mpt->m_svid;
12846         (void) strcpy((char *)&adapter_data->DriverVersion[0], driver_verstr);
12847         adapter_data->BiosVersion = 0;
12848         (void) mptsas_get_bios_page3(mpt, &adapter_data->BiosVersion);
12849 }
12850 
12851 static void
12852 mptsas_read_pci_info(mptsas_t *mpt, mptsas_pci_info_t *pci_info)
12853 {
12854         int     *reg_data, i;
12855         uint_t  reglen;
12856 
12857         /*
12858          * Lookup the 'reg' property and extract the other data
12859          */
12860         if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, mpt->m_dip,
12861             DDI_PROP_DONTPASS, "reg", &reg_data, &reglen) ==
12862             DDI_PROP_SUCCESS) {
12863                 /*
12864                  * Extract the PCI data from the 'reg' property first DWORD.
12865                  * The entry looks like the following:
12866                  * First DWORD:
12867                  * Bits 8 - 10 3-bit Function number
12868                  * Bits 11 - 15 5-bit Device number
12869                  * Bits 16 - 23 8-bit Bus number
12870                  */
12871                 pci_info->BusNumber = (reg_data[0] & 0x00FF0000) >> 16;
12872                 pci_info->DeviceNumber = (reg_data[0] & 0x0000F800) >> 11;
12873                 pci_info->FunctionNumber = (reg_data[0] & 0x00000700) >> 8;
12874                 ddi_prop_free((void *)reg_data);
12875         } else {
12876                 /*
12877                  * If we can't determine the PCI info then we fill in FF's for
12878                  * the data to indicate this.
12879                  */
12880                 pci_info->BusNumber = 0xFFFFFFFF;
12881                 pci_info->DeviceNumber = 0xFF;
12882                 pci_info->FunctionNumber = 0xFF;
12883         }
12884 
12885         /*
12886          * Now get the interrupt vector and the pci header.  The vector can
12887          * only be 0 right now.  The header is the first 256 bytes of config
12888          * space.
12889          */
12890         pci_info->InterruptVector = 0;
12891         for (i = 0; i < sizeof (pci_info->PciHeader); i++) {
12892                 pci_info->PciHeader[i] = pci_config_get8(mpt->m_config_handle,
12893                     i);
12894         }
12895 }
12896 
12897 static int
12898 mptsas_reg_access(mptsas_t *mpt, mptsas_reg_access_t *data, int mode)
12899 {
12900         int                     status = 0;
12901         mptsas_reg_access_t     driverdata;
12902 
12903         mutex_enter(&mpt->m_mutex);
12904         if (ddi_copyin(data, &driverdata, sizeof (driverdata), mode) == 0) {
12905                 switch (driverdata.Command) {
12906                         /*
12907                          * IO access is not supported.
12908                          */
12909                         case REG_IO_READ:
12910                         case REG_IO_WRITE:
12911                                 mptsas_log(mpt, CE_WARN, "IO access is not "
12912                                     "supported.  Use memory access.");
12913                                 status = EINVAL;
12914                                 break;
12915 
12916                         case REG_MEM_READ:
12917                                 driverdata.RegData = ddi_get32(mpt->m_datap,
12918                                     (uint32_t *)(void *)mpt->m_reg +
12919                                     driverdata.RegOffset);
12920                                 if (ddi_copyout(&driverdata.RegData,
12921                                     &data->RegData,
12922                                     sizeof (driverdata.RegData), mode) != 0) {
12923                                         mptsas_log(mpt, CE_WARN, "Register "
12924                                             "Read Failed");
12925                                         status = EFAULT;
12926                                 }
12927                                 break;
12928 
12929                         case REG_MEM_WRITE:
12930                                 ddi_put32(mpt->m_datap,
12931                                     (uint32_t *)(void *)mpt->m_reg +
12932                                     driverdata.RegOffset,
12933                                     driverdata.RegData);
12934                                 break;
12935 
12936                         default:
12937                                 status = EINVAL;
12938                                 break;
12939                 }
12940         } else {
12941                 status = EFAULT;
12942         }
12943 
12944         mutex_exit(&mpt->m_mutex);
12945         return (status);
12946 }
12947 
12948 static int
12949 led_control(mptsas_t *mpt, intptr_t data, int mode)
12950 {
12951         int ret = 0;
12952         mptsas_led_control_t lc;
12953         mptsas_target_t *ptgt;
12954 
12955         if (ddi_copyin((void *)data, &lc, sizeof (lc), mode) != 0) {
12956                 return (EFAULT);
12957         }
12958 
12959         if ((lc.Command != MPTSAS_LEDCTL_FLAG_SET &&
12960             lc.Command != MPTSAS_LEDCTL_FLAG_GET) ||
12961             lc.Led < MPTSAS_LEDCTL_LED_MIN ||
12962             lc.Led > MPTSAS_LEDCTL_LED_MAX ||
12963             (lc.Command == MPTSAS_LEDCTL_FLAG_SET && lc.LedStatus != 0 &&
12964             lc.LedStatus != 1)) {
12965                 return (EINVAL);
12966         }
12967 
12968         if ((lc.Command == MPTSAS_LEDCTL_FLAG_SET && (mode & FWRITE) == 0) ||
12969             (lc.Command == MPTSAS_LEDCTL_FLAG_GET && (mode & FREAD) == 0))
12970                 return (EACCES);
12971 
12972         /* Locate the target we're interrogating... */
12973         mutex_enter(&mpt->m_mutex);
12974         ptgt = refhash_linear_search(mpt->m_targets,
12975             mptsas_target_eval_slot, &lc);
12976         if (ptgt == NULL) {
12977                 /* We could not find a target for that enclosure/slot. */
12978                 mutex_exit(&mpt->m_mutex);
12979                 return (ENOENT);
12980         }
12981 
12982         if (lc.Command == MPTSAS_LEDCTL_FLAG_SET) {
12983                 /* Update our internal LED state. */
12984                 ptgt->m_led_status &= ~(1 << (lc.Led - 1));
12985                 ptgt->m_led_status |= lc.LedStatus << (lc.Led - 1);
12986 
12987                 /* Flush it to the controller. */
12988                 ret = mptsas_flush_led_status(mpt, ptgt);
12989                 mutex_exit(&mpt->m_mutex);
12990                 return (ret);
12991         }
12992 
12993         /* Return our internal LED state. */
12994         lc.LedStatus = (ptgt->m_led_status >> (lc.Led - 1)) & 1;
12995         mutex_exit(&mpt->m_mutex);
12996 
12997         if (ddi_copyout(&lc, (void *)data, sizeof (lc), mode) != 0) {
12998                 return (EFAULT);
12999         }
13000 
13001         return (0);
13002 }
13003 
13004 static int
13005 get_disk_info(mptsas_t *mpt, intptr_t data, int mode)
13006 {
13007         uint16_t i = 0;
13008         uint16_t count = 0;
13009         int ret = 0;
13010         mptsas_target_t *ptgt;
13011         mptsas_disk_info_t *di;
13012         STRUCT_DECL(mptsas_get_disk_info, gdi);
13013 
13014         if ((mode & FREAD) == 0)
13015                 return (EACCES);
13016 
13017         STRUCT_INIT(gdi, get_udatamodel());
13018 
13019         if (ddi_copyin((void *)data, STRUCT_BUF(gdi), STRUCT_SIZE(gdi),
13020             mode) != 0) {
13021                 return (EFAULT);
13022         }
13023 
13024         /* Find out how many targets there are. */
13025         mutex_enter(&mpt->m_mutex);
13026         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
13027             ptgt = refhash_next(mpt->m_targets, ptgt)) {
13028                 count++;
13029         }
13030         mutex_exit(&mpt->m_mutex);
13031 
13032         /*
13033          * If we haven't been asked to copy out information on each target,
13034          * then just return the count.
13035          */
13036         STRUCT_FSET(gdi, DiskCount, count);
13037         if (STRUCT_FGETP(gdi, PtrDiskInfoArray) == NULL)
13038                 goto copy_out;
13039 
13040         /*
13041          * If we haven't been given a large enough buffer to copy out into,
13042          * let the caller know.
13043          */
13044         if (STRUCT_FGET(gdi, DiskInfoArraySize) <
13045             count * sizeof (mptsas_disk_info_t)) {
13046                 ret = ENOSPC;
13047                 goto copy_out;
13048         }
13049 
13050         di = kmem_zalloc(count * sizeof (mptsas_disk_info_t), KM_SLEEP);
13051 
13052         mutex_enter(&mpt->m_mutex);
13053         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
13054             ptgt = refhash_next(mpt->m_targets, ptgt)) {
13055                 if (i >= count) {
13056                         /*
13057                          * The number of targets changed while we weren't
13058                          * looking, so give up.
13059                          */
13060                         refhash_rele(mpt->m_targets, ptgt);
13061                         mutex_exit(&mpt->m_mutex);
13062                         kmem_free(di, count * sizeof (mptsas_disk_info_t));
13063                         return (EAGAIN);
13064                 }
13065                 di[i].Instance = mpt->m_instance;
13066                 di[i].Enclosure = ptgt->m_enclosure;
13067                 di[i].Slot = ptgt->m_slot_num;
13068                 di[i].SasAddress = ptgt->m_addr.mta_wwn;
13069                 i++;
13070         }
13071         mutex_exit(&mpt->m_mutex);
13072         STRUCT_FSET(gdi, DiskCount, i);
13073 
13074         /* Copy out the disk information to the caller. */
13075         if (ddi_copyout((void *)di, STRUCT_FGETP(gdi, PtrDiskInfoArray),
13076             i * sizeof (mptsas_disk_info_t), mode) != 0) {
13077                 ret = EFAULT;
13078         }
13079 
13080         kmem_free(di, count * sizeof (mptsas_disk_info_t));
13081 
13082 copy_out:
13083         if (ddi_copyout(STRUCT_BUF(gdi), (void *)data, STRUCT_SIZE(gdi),
13084             mode) != 0) {
13085                 ret = EFAULT;
13086         }
13087 
13088         return (ret);
13089 }
13090 
13091 static int
13092 mptsas_ioctl(dev_t dev, int cmd, intptr_t data, int mode, cred_t *credp,
13093     int *rval)
13094 {
13095         int                     status = 0;
13096         mptsas_t                *mpt;
13097         mptsas_update_flash_t   flashdata;
13098         mptsas_pass_thru_t      passthru_data;
13099         mptsas_adapter_data_t   adapter_data;
13100         mptsas_pci_info_t       pci_info;
13101         int                     copylen;
13102 
13103         int                     iport_flag = 0;
13104         dev_info_t              *dip = NULL;
13105         mptsas_phymask_t        phymask = 0;
13106         struct devctl_iocdata   *dcp = NULL;
13107         char                    *addr = NULL;
13108         mptsas_target_t         *ptgt = NULL;
13109 
13110         *rval = MPTIOCTL_STATUS_GOOD;
13111         if (secpolicy_sys_config(credp, B_FALSE) != 0) {
13112                 return (EPERM);
13113         }
13114 
13115         mpt = ddi_get_soft_state(mptsas3_state, MINOR2INST(getminor(dev)));
13116         if (mpt == NULL) {
13117                 /*
13118                  * Called from iport node, get the states
13119                  */
13120                 iport_flag = 1;
13121                 dip = mptsas_get_dip_from_dev(dev, &phymask);
13122                 if (dip == NULL) {
13123                         return (ENXIO);
13124                 }
13125                 mpt = DIP2MPT(dip);
13126         }
13127         /* Make sure power level is D0 before accessing registers */
13128         mutex_enter(&mpt->m_mutex);
13129         if (mpt->m_options & MPTSAS_OPT_PM) {
13130                 (void) pm_busy_component(mpt->m_dip, 0);
13131                 if (mpt->m_power_level != PM_LEVEL_D0) {
13132                         mutex_exit(&mpt->m_mutex);
13133                         if (pm_raise_power(mpt->m_dip, 0, PM_LEVEL_D0) !=
13134                             DDI_SUCCESS) {
13135                                 mptsas_log(mpt, CE_WARN,
13136                                     "mptsas3%d: mptsas_ioctl: Raise power "
13137                                     "request failed.", mpt->m_instance);
13138                                 (void) pm_idle_component(mpt->m_dip, 0);
13139                                 return (ENXIO);
13140                         }
13141                 } else {
13142                         mutex_exit(&mpt->m_mutex);
13143                 }
13144         } else {
13145                 mutex_exit(&mpt->m_mutex);
13146         }
13147 
13148         if (iport_flag) {
13149                 status = scsi_hba_ioctl(dev, cmd, data, mode, credp, rval);
13150                 if (status != 0) {
13151                         goto out;
13152                 }
13153                 /*
13154                  * The following code control the OK2RM LED, it doesn't affect
13155                  * the ioctl return status.
13156                  */
13157                 if ((cmd == DEVCTL_DEVICE_ONLINE) ||
13158                     (cmd == DEVCTL_DEVICE_OFFLINE)) {
13159                         if (ndi_dc_allochdl((void *)data, &dcp) !=
13160                             NDI_SUCCESS) {
13161                                 goto out;
13162                         }
13163                         addr = ndi_dc_getaddr(dcp);
13164                         ptgt = mptsas_addr_to_ptgt(mpt, addr, phymask);
13165                         if (ptgt == NULL) {
13166                                 NDBG14(("mptsas_ioctl led control: tgt %s not "
13167                                     "found", addr));
13168                                 ndi_dc_freehdl(dcp);
13169                                 goto out;
13170                         }
13171                         mutex_enter(&mpt->m_mutex);
13172                         if (cmd == DEVCTL_DEVICE_ONLINE) {
13173                                 ptgt->m_tgt_unconfigured = 0;
13174                         } else if (cmd == DEVCTL_DEVICE_OFFLINE) {
13175                                 ptgt->m_tgt_unconfigured = 1;
13176                         }
13177                         if (cmd == DEVCTL_DEVICE_OFFLINE) {
13178                                 ptgt->m_led_status |=
13179                                     (1 << (MPTSAS_LEDCTL_LED_OK2RM - 1));
13180                         } else {
13181                                 ptgt->m_led_status &=
13182                                     ~(1 << (MPTSAS_LEDCTL_LED_OK2RM - 1));
13183                         }
13184                         (void) mptsas_flush_led_status(mpt, ptgt);
13185                         mutex_exit(&mpt->m_mutex);
13186                         ndi_dc_freehdl(dcp);
13187                 }
13188                 goto out;
13189         }
13190         switch (cmd) {
13191                 case MPTIOCTL_GET_DISK_INFO:
13192                         status = get_disk_info(mpt, data, mode);
13193                         break;
13194                 case MPTIOCTL_LED_CONTROL:
13195                         status = led_control(mpt, data, mode);
13196                         break;
13197                 case MPTIOCTL_UPDATE_FLASH:
13198                         if (ddi_copyin((void *)data, &flashdata,
13199                                 sizeof (struct mptsas_update_flash), mode)) {
13200                                 status = EFAULT;
13201                                 break;
13202                         }
13203 
13204                         mutex_enter(&mpt->m_mutex);
13205                         if (mptsas_update_flash(mpt,
13206                             (caddr_t)(long)flashdata.PtrBuffer,
13207                             flashdata.ImageSize, flashdata.ImageType, mode)) {
13208                                 status = EFAULT;
13209                         }
13210 
13211                         /*
13212                          * Reset the chip to start using the new
13213                          * firmware.  Reset if failed also.
13214                          */
13215                         mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
13216                         if (mptsas_restart_ioc(mpt) == DDI_FAILURE) {
13217                                 status = EFAULT;
13218                         }
13219                         mutex_exit(&mpt->m_mutex);
13220                         break;
13221                 case MPTIOCTL_PASS_THRU:
13222                         /*
13223                          * The user has requested to pass through a command to
13224                          * be executed by the MPT firmware.  Call our routine
13225                          * which does this.  Only allow one passthru IOCTL at
13226                          * one time. Other threads will block on
13227                          * m_passthru_mutex, which is of adaptive variant.
13228                          */
13229                         if (ddi_copyin((void *)data, &passthru_data,
13230                             sizeof (mptsas_pass_thru_t), mode)) {
13231                                 status = EFAULT;
13232                                 break;
13233                         }
13234                         mutex_enter(&mpt->m_passthru_mutex);
13235                         mutex_enter(&mpt->m_mutex);
13236                         status = mptsas_pass_thru(mpt, &passthru_data, mode);
13237                         mutex_exit(&mpt->m_mutex);
13238                         mutex_exit(&mpt->m_passthru_mutex);
13239 
13240                         break;
13241                 case MPTIOCTL_GET_ADAPTER_DATA:
13242                         /*
13243                          * The user has requested to read adapter data.  Call
13244                          * our routine which does this.
13245                          */
13246                         bzero(&adapter_data, sizeof (mptsas_adapter_data_t));
13247                         if (ddi_copyin((void *)data, (void *)&adapter_data,
13248                             sizeof (mptsas_adapter_data_t), mode)) {
13249                                 status = EFAULT;
13250                                 break;
13251                         }
13252                         if (adapter_data.StructureLength >=
13253                             sizeof (mptsas_adapter_data_t)) {
13254                                 adapter_data.StructureLength = (uint32_t)
13255                                     sizeof (mptsas_adapter_data_t);
13256                                 copylen = sizeof (mptsas_adapter_data_t);
13257                                 mutex_enter(&mpt->m_mutex);
13258                                 mptsas_read_adapter_data(mpt, &adapter_data);
13259                                 mutex_exit(&mpt->m_mutex);
13260                         } else {
13261                                 adapter_data.StructureLength = (uint32_t)
13262                                     sizeof (mptsas_adapter_data_t);
13263                                 copylen = sizeof (adapter_data.StructureLength);
13264                                 *rval = MPTIOCTL_STATUS_LEN_TOO_SHORT;
13265                         }
13266                         if (ddi_copyout((void *)(&adapter_data), (void *)data,
13267                             copylen, mode) != 0) {
13268                                 status = EFAULT;
13269                         }
13270                         break;
13271                 case MPTIOCTL_GET_PCI_INFO:
13272                         /*
13273                          * The user has requested to read pci info.  Call
13274                          * our routine which does this.
13275                          */
13276                         bzero(&pci_info, sizeof (mptsas_pci_info_t));
13277                         mutex_enter(&mpt->m_mutex);
13278                         mptsas_read_pci_info(mpt, &pci_info);
13279                         mutex_exit(&mpt->m_mutex);
13280                         if (ddi_copyout((void *)(&pci_info), (void *)data,
13281                             sizeof (mptsas_pci_info_t), mode) != 0) {
13282                                 status = EFAULT;
13283                         }
13284                         break;
13285                 case MPTIOCTL_RESET_ADAPTER:
13286                         mutex_enter(&mpt->m_mutex);
13287                         mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
13288                         if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
13289                                 mptsas_log(mpt, CE_WARN, "reset adapter IOCTL "
13290                                     "failed");
13291                                 status = EFAULT;
13292                         }
13293                         mutex_exit(&mpt->m_mutex);
13294                         break;
13295                 case MPTIOCTL_DIAG_ACTION:
13296                         /*
13297                          * The user has done a diag buffer action.  Call our
13298                          * routine which does this.  Only allow one diag action
13299                          * at one time.
13300                          */
13301                         mutex_enter(&mpt->m_mutex);
13302                         if (mpt->m_diag_action_in_progress) {
13303                                 mutex_exit(&mpt->m_mutex);
13304                                 return (EBUSY);
13305                         }
13306                         mpt->m_diag_action_in_progress = 1;
13307                         status = mptsas_diag_action(mpt,
13308                             (mptsas_diag_action_t *)data, mode);
13309                         mpt->m_diag_action_in_progress = 0;
13310                         mutex_exit(&mpt->m_mutex);
13311                         break;
13312                 case MPTIOCTL_EVENT_QUERY:
13313                         /*
13314                          * The user has done an event query. Call our routine
13315                          * which does this.
13316                          */
13317                         status = mptsas_event_query(mpt,
13318                             (mptsas_event_query_t *)data, mode, rval);
13319                         break;
13320                 case MPTIOCTL_EVENT_ENABLE:
13321                         /*
13322                          * The user has done an event enable. Call our routine
13323                          * which does this.
13324                          */
13325                         status = mptsas_event_enable(mpt,
13326                             (mptsas_event_enable_t *)data, mode, rval);
13327                         break;
13328                 case MPTIOCTL_EVENT_REPORT:
13329                         /*
13330                          * The user has done an event report. Call our routine
13331                          * which does this.
13332                          */
13333                         status = mptsas_event_report(mpt,
13334                             (mptsas_event_report_t *)data, mode, rval);
13335                         break;
13336                 case MPTIOCTL_REG_ACCESS:
13337                         /*
13338                          * The user has requested register access.  Call our
13339                          * routine which does this.
13340                          */
13341                         status = mptsas_reg_access(mpt,
13342                             (mptsas_reg_access_t *)data, mode);
13343                         break;
13344                 default:
13345                         status = scsi_hba_ioctl(dev, cmd, data, mode, credp,
13346                             rval);
13347                         break;
13348         }
13349 
13350 out:
13351         return (status);
13352 }
13353 
13354 int
13355 mptsas_restart_ioc(mptsas_t *mpt)
13356 {
13357         int             rval = DDI_SUCCESS;
13358         mptsas_target_t *ptgt = NULL;
13359 
13360         ASSERT(mutex_owned(&mpt->m_mutex));
13361 
13362         /*
13363          * Set a flag telling I/O path that we're processing a reset.  This is
13364          * needed because after the reset is complete, the hash table still
13365          * needs to be rebuilt.  If I/Os are started before the hash table is
13366          * rebuilt, I/O errors will occur.  This flag allows I/Os to be marked
13367          * so that they can be retried.
13368          */
13369         mpt->m_in_reset = TRUE;
13370 
13371         /*
13372          * Set all throttles to HOLD
13373          */
13374         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
13375             ptgt = refhash_next(mpt->m_targets, ptgt)) {
13376                 mptsas_set_throttle_mtx(mpt, ptgt, HOLD_THROTTLE);
13377         }
13378 
13379         /*
13380          * Disable interrupts
13381          */
13382         MPTSAS_DISABLE_INTR(mpt);
13383 
13384         /*
13385          * Abort all commands: outstanding commands, commands in waitq and
13386          * tx_waitq.
13387          */
13388         mptsas_flush_hba(mpt);
13389 
13390         /*
13391          * Reinitialize the chip.
13392          */
13393         if (mptsas_init_chip(mpt, FALSE) == DDI_FAILURE) {
13394                 rval = DDI_FAILURE;
13395         }
13396 
13397         /*
13398          * Enable interrupts again
13399          */
13400         MPTSAS_ENABLE_INTR(mpt);
13401 
13402         /*
13403          * If mptsas_init_chip was successful, update the driver data.
13404          */
13405         if (rval == DDI_SUCCESS) {
13406                 mptsas_update_driver_data(mpt);
13407         }
13408 
13409         /*
13410          * Reset the throttles
13411          */
13412         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
13413             ptgt = refhash_next(mpt->m_targets, ptgt)) {
13414                 mptsas_set_throttle_mtx(mpt, ptgt, MAX_THROTTLE);
13415         }
13416 
13417         mptsas_doneq_empty(mpt);
13418         mptsas_restart_hba(mpt);
13419 
13420         if (rval != DDI_SUCCESS) {
13421                 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
13422                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
13423         }
13424 
13425         /*
13426          * Clear the reset flag so that I/Os can continue.
13427          */
13428         mpt->m_in_reset = FALSE;
13429 
13430         return (rval);
13431 }
13432 
13433 static int
13434 mptsas_init_chip(mptsas_t *mpt, int first_time)
13435 {
13436         ddi_dma_cookie_t        cookie;
13437         mptsas_reply_pqueue_t   *rpqp;
13438         uint32_t                i, j;
13439         int                     rval;
13440 
13441         /*
13442          * Check to see if the firmware image is valid
13443          */
13444         if (ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic) &
13445             MPI2_DIAG_FLASH_BAD_SIG) {
13446                 mptsas_log(mpt, CE_WARN, "mptsas bad flash signature!");
13447                 goto fail;
13448         }
13449 
13450         /*
13451          * Reset the chip
13452          */
13453         rval = mptsas_ioc_reset(mpt, first_time);
13454         if (rval == MPTSAS_RESET_FAIL) {
13455                 mptsas_log(mpt, CE_WARN, "hard reset failed!");
13456                 goto fail;
13457         }
13458 
13459         if ((rval == MPTSAS_SUCCESS_MUR) && (!first_time)) {
13460                 goto mur;
13461         }
13462         /*
13463          * Setup configuration space
13464          */
13465         if (mptsas_config_space_init(mpt) == FALSE) {
13466                 mptsas_log(mpt, CE_WARN, "mptsas_config_space_init "
13467                     "failed!");
13468                 goto fail;
13469         }
13470 
13471         /*
13472          * IOC facts can change after a diag reset so all buffers that are
13473          * based on these numbers must be de-allocated and re-allocated.  Get
13474          * new IOC facts each time chip is initialized.
13475          */
13476         if (mptsas_ioc_get_facts(mpt) == DDI_FAILURE) {
13477                 mptsas_log(mpt, CE_WARN, "mptsas_ioc_get_facts failed");
13478                 goto fail;
13479         }
13480 
13481         /*
13482          * Now we know chip MSIX capabilitites and it's not been done
13483          * previously register interrupts accordingly. Need to know this
13484          * information before allocating the reply frames below.
13485          */
13486         if (mpt->m_intr_cnt == 0) {
13487                 if (mptsas_register_intrs(mpt) == FALSE)
13488                         goto fail;
13489         }
13490 
13491         mpt->m_targets = refhash_create(MPTSAS_TARGET_BUCKET_COUNT,
13492             mptsas_target_addr_hash, mptsas_target_addr_cmp,
13493             mptsas_target_free, sizeof (mptsas_target_t),
13494             offsetof(mptsas_target_t, m_link),
13495             offsetof(mptsas_target_t, m_addr), KM_SLEEP);
13496 
13497         if (mptsas_alloc_active_slots(mpt, KM_SLEEP)) {
13498                 goto fail;
13499         }
13500         /*
13501          * Allocate request message frames, reply free queue, reply descriptor
13502          * post queue, and reply message frames using latest IOC facts.
13503          */
13504         if (mptsas_alloc_request_frames(mpt) == DDI_FAILURE) {
13505                 mptsas_log(mpt, CE_WARN, "mptsas_alloc_request_frames failed");
13506                 goto fail;
13507         }
13508         if (mptsas_alloc_sense_bufs(mpt) == DDI_FAILURE) {
13509                 mptsas_log(mpt, CE_WARN, "mptsas_alloc_sense_bufs failed");
13510                 goto fail;
13511         }
13512         if (mptsas_alloc_free_queue(mpt) == DDI_FAILURE) {
13513                 mptsas_log(mpt, CE_WARN, "mptsas_alloc_free_queue failed!");
13514                 goto fail;
13515         }
13516         if (mptsas_alloc_post_queue(mpt) == DDI_FAILURE) {
13517                 mptsas_log(mpt, CE_WARN, "mptsas_alloc_post_queue failed!");
13518                 goto fail;
13519         }
13520         if (mptsas_alloc_reply_frames(mpt) == DDI_FAILURE) {
13521                 mptsas_log(mpt, CE_WARN, "mptsas_alloc_reply_frames failed!");
13522                 goto fail;
13523         }
13524 
13525 mur:
13526         /*
13527          * Re-Initialize ioc to operational state
13528          */
13529         if (mptsas_ioc_init(mpt) == DDI_FAILURE) {
13530                 mptsas_log(mpt, CE_WARN, "mptsas_ioc_init failed");
13531                 goto fail;
13532         }
13533 
13534         mptsas_alloc_reply_args(mpt);
13535 
13536         /*
13537          * Initialize the Reply Free Queue with the physical addresses of our
13538          * reply frames.
13539          */
13540         cookie.dmac_address = mpt->m_reply_frame_dma_addr&0xfffffffful;
13541         for (i = 0; i < mpt->m_max_replies; i++) {
13542                 ddi_put32(mpt->m_acc_free_queue_hdl,
13543                     &((uint32_t *)(void *)mpt->m_free_queue)[i],
13544                     cookie.dmac_address);
13545                 cookie.dmac_address += mpt->m_reply_frame_size;
13546         }
13547         (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
13548             DDI_DMA_SYNC_FORDEV);
13549 
13550         /*
13551          * Initialize the reply free index to one past the last frame on the
13552          * queue.  This will signify that the queue is empty to start with.
13553          */
13554         mpt->m_free_index = i;
13555         ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex, i);
13556 
13557         /*
13558          * Initialize the reply post queue to 0xFFFFFFFF,0xFFFFFFFF's
13559          * and the indexes to 0.
13560          */
13561         rpqp = mpt->m_rep_post_queues;
13562         for (j = 0; j < mpt->m_post_reply_qcount; j++) {
13563                 for (i = 0; i < mpt->m_post_queue_depth; i++) {
13564                         ddi_put64(mpt->m_acc_post_queue_hdl,
13565                             &((uint64_t *)(void *)rpqp->rpq_queue)[i],
13566                             0xFFFFFFFFFFFFFFFF);
13567                 }
13568                 rpqp->rpq_index = 0;
13569                 rpqp++;
13570         }
13571         (void) ddi_dma_sync(mpt->m_dma_post_queue_hdl, 0, 0,
13572             DDI_DMA_SYNC_FORDEV);
13573 
13574         /*
13575          * Initialise all the reply post queue indexes.
13576          */
13577         for (j = 0; j < mpt->m_post_reply_qcount; j++) {
13578                 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyPostHostIndex,
13579                     j << MPI2_RPHI_MSIX_INDEX_SHIFT);
13580         }
13581 
13582         /*
13583          * Enable ports
13584          */
13585         if (mptsas_ioc_enable_port(mpt) == DDI_FAILURE) {
13586                 mptsas_log(mpt, CE_WARN, "mptsas_ioc_enable_port failed");
13587                 goto fail;
13588         }
13589 
13590         /*
13591          * enable events
13592          */
13593         if (mptsas_ioc_enable_event_notification(mpt)) {
13594                 mptsas_log(mpt, CE_WARN,
13595                     "mptsas_ioc_enable_event_notification failed");
13596                 goto fail;
13597         }
13598 
13599         /*
13600          * We need checks in attach and these.
13601          * chip_init is called in mult. places
13602          */
13603 
13604         if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl) !=
13605             DDI_SUCCESS) ||
13606             (mptsas_check_dma_handle(mpt->m_dma_req_sense_hdl) !=
13607             DDI_SUCCESS) ||
13608             (mptsas_check_dma_handle(mpt->m_dma_reply_frame_hdl) !=
13609             DDI_SUCCESS) ||
13610             (mptsas_check_dma_handle(mpt->m_dma_free_queue_hdl) !=
13611             DDI_SUCCESS) ||
13612             (mptsas_check_dma_handle(mpt->m_dma_post_queue_hdl) !=
13613             DDI_SUCCESS) ||
13614             (mptsas_check_dma_handle(mpt->m_hshk_dma_hdl) !=
13615             DDI_SUCCESS)) {
13616                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
13617                 goto fail;
13618         }
13619 
13620         /* Check all acc handles */
13621         if ((mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) ||
13622             (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl) !=
13623             DDI_SUCCESS) ||
13624             (mptsas_check_acc_handle(mpt->m_acc_req_sense_hdl) !=
13625             DDI_SUCCESS) ||
13626             (mptsas_check_acc_handle(mpt->m_acc_reply_frame_hdl) !=
13627             DDI_SUCCESS) ||
13628             (mptsas_check_acc_handle(mpt->m_acc_free_queue_hdl) !=
13629             DDI_SUCCESS) ||
13630             (mptsas_check_acc_handle(mpt->m_acc_post_queue_hdl) !=
13631             DDI_SUCCESS) ||
13632             (mptsas_check_acc_handle(mpt->m_hshk_acc_hdl) !=
13633             DDI_SUCCESS) ||
13634             (mptsas_check_acc_handle(mpt->m_config_handle) !=
13635             DDI_SUCCESS)) {
13636                 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
13637                 goto fail;
13638         }
13639 
13640         return (DDI_SUCCESS);
13641 
13642 fail:
13643         return (DDI_FAILURE);
13644 }
13645 
13646 static int
13647 mptsas_get_pci_cap(mptsas_t *mpt)
13648 {
13649         ushort_t caps_ptr, cap, cap_count;
13650 
13651         if (mpt->m_config_handle == NULL)
13652                 return (FALSE);
13653         /*
13654          * Check if capabilities list is supported and if so,
13655          * get initial capabilities pointer and clear bits 0,1.
13656          */
13657         if (pci_config_get16(mpt->m_config_handle, PCI_CONF_STAT)
13658             & PCI_STAT_CAP) {
13659                 caps_ptr = P2ALIGN(pci_config_get8(mpt->m_config_handle,
13660                     PCI_CONF_CAP_PTR), 4);
13661         } else {
13662                 caps_ptr = PCI_CAP_NEXT_PTR_NULL;
13663         }
13664 
13665         /*
13666          * Walk capabilities if supported.
13667          */
13668         for (cap_count = 0; caps_ptr != PCI_CAP_NEXT_PTR_NULL; ) {
13669 
13670                 /*
13671                  * Check that we haven't exceeded the maximum number of
13672                  * capabilities and that the pointer is in a valid range.
13673                  */
13674                 if (++cap_count > 48) {
13675                         mptsas_log(mpt, CE_WARN,
13676                             "too many device capabilities.\n");
13677                         break;
13678                 }
13679                 if (caps_ptr < 64) {
13680                         mptsas_log(mpt, CE_WARN,
13681                             "capabilities pointer 0x%x out of range.\n",
13682                             caps_ptr);
13683                         break;
13684                 }
13685 
13686                 /*
13687                  * Get next capability and check that it is valid.
13688                  * For now, we only support power management.
13689                  */
13690                 cap = pci_config_get8(mpt->m_config_handle, caps_ptr);
13691                 switch (cap) {
13692                         case PCI_CAP_ID_PM:
13693                                 mptsas_log(mpt, CE_NOTE,
13694                                     "?mptsas3%d supports power management.\n",
13695                                     mpt->m_instance);
13696                                 mpt->m_options |= MPTSAS_OPT_PM;
13697 
13698                                 /* Save PMCSR offset */
13699                                 mpt->m_pmcsr_offset = caps_ptr + PCI_PMCSR;
13700                                 break;
13701                         case PCI_CAP_ID_MSI:
13702                                 mptsas_log(mpt, CE_NOTE,
13703                                     "?mptsas3%d supports MSI.\n",
13704                                     mpt->m_instance);
13705                                 mpt->m_options |= MPTSAS_OPT_MSI;
13706                                 break;
13707                         case PCI_CAP_ID_MSI_X:
13708                                 mptsas_log(mpt, CE_NOTE,
13709                                     "?mptsas3%d supports MSI-X.\n",
13710                                     mpt->m_instance);
13711                                 mpt->m_options |= MPTSAS_OPT_MSI_X;
13712                                 break;
13713                         /*
13714                          * The following capabilities are valid.  Any others
13715                          * will cause a message to be logged.
13716                          */
13717                         case PCI_CAP_ID_VPD:
13718                         case PCI_CAP_ID_PCIX:
13719                         case PCI_CAP_ID_PCI_E:
13720                                 break;
13721                         default:
13722                                 mptsas_log(mpt, CE_NOTE,
13723                                     "?mptsas3%d unrecognized capability "
13724                                     "0x%x.\n", mpt->m_instance, cap);
13725                                 break;
13726                 }
13727 
13728                 /*
13729                  * Get next capabilities pointer and clear bits 0,1.
13730                  */
13731                 caps_ptr = P2ALIGN(pci_config_get8(mpt->m_config_handle,
13732                     (caps_ptr + PCI_CAP_NEXT_PTR)), 4);
13733         }
13734         return (TRUE);
13735 }
13736 
13737 static int
13738 mptsas_init_pm(mptsas_t *mpt)
13739 {
13740         char            pmc_name[16];
13741         char            *pmc[] = {
13742                                 NULL,
13743                                 "0=Off (PCI D3 State)",
13744                                 "3=On (PCI D0 State)",
13745                                 NULL
13746                         };
13747         uint16_t        pmcsr_stat;
13748 
13749         /*
13750          * If PCI's capability does not support PM, then don't need
13751          * to registe the pm-components
13752          */
13753         if (!(mpt->m_options & MPTSAS_OPT_PM))
13754                 return (DDI_SUCCESS);
13755         /*
13756          * If power management is supported by this chip, create
13757          * pm-components property for the power management framework
13758          */
13759         (void) sprintf(pmc_name, "NAME=mptsas3%d", mpt->m_instance);
13760         pmc[0] = pmc_name;
13761         if (ddi_prop_update_string_array(DDI_DEV_T_NONE, mpt->m_dip,
13762             "pm-components", pmc, 3) != DDI_PROP_SUCCESS) {
13763                 mpt->m_options &= ~MPTSAS_OPT_PM;
13764                 mptsas_log(mpt, CE_WARN,
13765                     "mptsas3%d: pm-component property creation failed.",
13766                     mpt->m_instance);
13767                 return (DDI_FAILURE);
13768         }
13769 
13770         /*
13771          * Power on device.
13772          */
13773         (void) pm_busy_component(mpt->m_dip, 0);
13774         pmcsr_stat = pci_config_get16(mpt->m_config_handle,
13775             mpt->m_pmcsr_offset);
13776         if ((pmcsr_stat & PCI_PMCSR_STATE_MASK) != PCI_PMCSR_D0) {
13777                 mptsas_log(mpt, CE_WARN, "mptsas3%d: Power up the device",
13778                     mpt->m_instance);
13779                 pci_config_put16(mpt->m_config_handle, mpt->m_pmcsr_offset,
13780                     PCI_PMCSR_D0);
13781         }
13782         if (pm_power_has_changed(mpt->m_dip, 0, PM_LEVEL_D0) != DDI_SUCCESS) {
13783                 mptsas_log(mpt, CE_WARN, "pm_power_has_changed failed");
13784                 return (DDI_FAILURE);
13785         }
13786         mpt->m_power_level = PM_LEVEL_D0;
13787         /*
13788          * Set pm idle delay.
13789          */
13790         mpt->m_pm_idle_delay = ddi_prop_get_int(DDI_DEV_T_ANY,
13791             mpt->m_dip, 0, "mptsas-pm-idle-delay", MPTSAS_PM_IDLE_TIMEOUT);
13792 
13793         return (DDI_SUCCESS);
13794 }
13795 
13796 static int
13797 mptsas_register_intrs(mptsas_t *mpt)
13798 {
13799         dev_info_t *dip;
13800         int intr_types;
13801 
13802         dip = mpt->m_dip;
13803 
13804         /* Get supported interrupt types */
13805         if (ddi_intr_get_supported_types(dip, &intr_types) != DDI_SUCCESS) {
13806                 mptsas_log(mpt, CE_WARN, "ddi_intr_get_supported_types "
13807                     "failed\n");
13808                 return (FALSE);
13809         }
13810 
13811         NDBG6(("ddi_intr_get_supported_types() returned: 0x%x", intr_types));
13812 
13813         /*
13814          * Try MSIX first.
13815          */
13816         if (mptsas_enable_msix && (intr_types & DDI_INTR_TYPE_MSIX)) {
13817                 if (mptsas_add_intrs(mpt, DDI_INTR_TYPE_MSIX) == DDI_SUCCESS) {
13818                         NDBG6(("Using MSI-X interrupt type"));
13819                         mpt->m_intr_type = DDI_INTR_TYPE_MSIX;
13820                         return (TRUE);
13821                 }
13822         }
13823 
13824         /*
13825          * Try MSI, but fall back to FIXED
13826          */
13827         if (mptsas_enable_msi && (intr_types & DDI_INTR_TYPE_MSI)) {
13828                 if (mptsas_add_intrs(mpt, DDI_INTR_TYPE_MSI) == DDI_SUCCESS) {
13829                         NDBG6(("Using MSI interrupt type"));
13830                         mpt->m_intr_type = DDI_INTR_TYPE_MSI;
13831                         return (TRUE);
13832                 }
13833         }
13834         if (intr_types & DDI_INTR_TYPE_FIXED) {
13835                 if (mptsas_add_intrs(mpt, DDI_INTR_TYPE_FIXED) == DDI_SUCCESS) {
13836                         NDBG6(("Using FIXED interrupt type"));
13837                         mpt->m_intr_type = DDI_INTR_TYPE_FIXED;
13838                         return (TRUE);
13839                 } else {
13840                         NDBG6(("FIXED interrupt registration failed"));
13841                         return (FALSE);
13842                 }
13843         }
13844 
13845         return (FALSE);
13846 }
13847 
13848 static void
13849 mptsas_unregister_intrs(mptsas_t *mpt)
13850 {
13851         mptsas_rem_intrs(mpt);
13852 }
13853 
13854 /*
13855  * mptsas_add_intrs:
13856  *
13857  * Register FIXED or MSI interrupts.
13858  */
13859 static int
13860 mptsas_add_intrs(mptsas_t *mpt, int intr_type)
13861 {
13862         dev_info_t      *dip = mpt->m_dip;
13863         int             avail, actual, count = 0;
13864         int             i, flag, ret;
13865 
13866         NDBG6(("mptsas_add_intrs:interrupt type 0x%x", intr_type));
13867 
13868         /* Get number of interrupts */
13869         ret = ddi_intr_get_nintrs(dip, intr_type, &count);
13870         if ((ret != DDI_SUCCESS) || (count <= 0)) {
13871                 mptsas_log(mpt, CE_WARN, "ddi_intr_get_nintrs() failed, "
13872                     "ret %d count %d\n", ret, count);
13873 
13874                 return (DDI_FAILURE);
13875         }
13876 
13877         /* Get number of interrupts available to this device */
13878         ret = ddi_intr_get_navail(dip, intr_type, &avail);
13879         if ((ret != DDI_SUCCESS) || (avail == 0)) {
13880                 mptsas_log(mpt, CE_WARN, "ddi_intr_get_navail() failed, "
13881                     "ret %d avail %d\n", ret, avail);
13882 
13883                 return (DDI_FAILURE);
13884         }
13885 
13886         if (count < avail) {
13887                 mptsas_log(mpt, CE_NOTE, "ddi_intr_get_nvail returned %d, "
13888                     "navail() returned %d", count, avail);
13889         }
13890 
13891         NDBG6(("mptsas_add_intrs:count %d, avail %d", count, avail));
13892 
13893         if (intr_type == DDI_INTR_TYPE_MSIX) {
13894                 if (!mptsas3_max_msix_intrs) {
13895                         return (DDI_FAILURE);
13896                 }
13897 
13898                 /*
13899                  * Restrict the number of interrupts, firstly by
13900                  * the number returned from the IOCInfo, then by
13901                  * overall restriction.
13902                  */
13903                 if (avail > mpt->m_max_msix_vectors) {
13904                         avail = mpt->m_max_msix_vectors?
13905                             mpt->m_max_msix_vectors:1;
13906                         NDBG6(("mptsas_add_intrs: mmmv avail %d", avail));
13907                 }
13908                 if (avail > mptsas3_max_msix_intrs) {
13909                         avail = mptsas3_max_msix_intrs;
13910                         NDBG6(("mptsas_add_intrs: m3mmi avail %d", avail));
13911                 }
13912         }
13913         if (intr_type == DDI_INTR_TYPE_MSI) {
13914                 NDBG6(("mptsas_add_intrs: MSI avail %d", avail));
13915                 avail = 1;
13916         }
13917 
13918         /* Allocate an array of interrupt handles */
13919         mpt->m_intr_size = avail * sizeof (ddi_intr_handle_t);
13920         mpt->m_htable = kmem_alloc(mpt->m_intr_size, KM_SLEEP);
13921 
13922         flag = DDI_INTR_ALLOC_NORMAL;
13923 
13924         /* call ddi_intr_alloc() */
13925         ret = ddi_intr_alloc(dip, mpt->m_htable, intr_type, 0,
13926             avail, &actual, flag);
13927 
13928         if ((ret != DDI_SUCCESS) || (actual == 0)) {
13929                 mptsas_log(mpt, CE_WARN, "ddi_intr_alloc() failed, ret %d\n",
13930                     ret);
13931                 kmem_free(mpt->m_htable, mpt->m_intr_size);
13932                 return (DDI_FAILURE);
13933         }
13934 
13935         NDBG6(("mptsas_add_intrs: actual %d, avail %d", actual, avail));
13936         /* use interrupt count returned or abort? */
13937         if (actual < avail) {
13938                 mptsas_log(mpt, CE_NOTE,
13939                     "Interrupts requested: %d, received: %d\n",
13940                     avail, actual);
13941         }
13942 
13943         /*
13944          * Get priority for first msi, assume remaining are all the same
13945          */
13946         if ((ret = ddi_intr_get_pri(mpt->m_htable[0],
13947             &mpt->m_intr_pri)) != DDI_SUCCESS) {
13948                 mptsas_log(mpt, CE_WARN, "ddi_intr_get_pri() failed %d\n", ret);
13949 
13950                 /* Free already allocated intr */
13951                 for (i = 0; i < actual; i++) {
13952                         (void) ddi_intr_free(mpt->m_htable[i]);
13953                 }
13954 
13955                 kmem_free(mpt->m_htable, mpt->m_intr_size);
13956                 return (DDI_FAILURE);
13957         }
13958 
13959         /* Test for high level mutex */
13960         if (mpt->m_intr_pri >= ddi_intr_get_hilevel_pri()) {
13961                 mptsas_log(mpt, CE_WARN, "mptsas_add_intrs: "
13962                     "Hi level interrupt not supported\n");
13963 
13964                 /* Free already allocated intr */
13965                 for (i = 0; i < actual; i++) {
13966                         (void) ddi_intr_free(mpt->m_htable[i]);
13967                 }
13968 
13969                 kmem_free(mpt->m_htable, mpt->m_intr_size);
13970                 return (DDI_FAILURE);
13971         }
13972 
13973         /* Call ddi_intr_add_handler() */
13974         for (i = 0; i < actual; i++) {
13975                 if ((ret = ddi_intr_add_handler(mpt->m_htable[i], mptsas_intr,
13976                     (caddr_t)mpt, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) {
13977                         mptsas_log(mpt, CE_WARN, "ddi_intr_add_handler() "
13978                             "failed %d\n", ret);
13979 
13980                         /* Free already allocated intr */
13981                         for (i = 0; i < actual; i++) {
13982                                 (void) ddi_intr_free(mpt->m_htable[i]);
13983                         }
13984 
13985                         kmem_free(mpt->m_htable, mpt->m_intr_size);
13986                         return (DDI_FAILURE);
13987                 }
13988         }
13989 
13990         if ((ret = ddi_intr_get_cap(mpt->m_htable[0], &mpt->m_intr_cap))
13991             != DDI_SUCCESS) {
13992                 mptsas_log(mpt, CE_WARN, "ddi_intr_get_cap() failed %d\n", ret);
13993 
13994                 /* Free already allocated intr */
13995                 for (i = 0; i < actual; i++) {
13996                         (void) ddi_intr_free(mpt->m_htable[i]);
13997                 }
13998 
13999                 kmem_free(mpt->m_htable, mpt->m_intr_size);
14000                 return (DDI_FAILURE);
14001         }
14002 
14003         mpt->m_intr_cnt = actual;
14004 
14005         /*
14006          * Enable interrupts
14007          */
14008         if (mpt->m_intr_cap & DDI_INTR_FLAG_BLOCK) {
14009                 /* Call ddi_intr_block_enable() for MSI interrupts */
14010                 (void) ddi_intr_block_enable(mpt->m_htable, mpt->m_intr_cnt);
14011         } else {
14012                 /* Call ddi_intr_enable for MSI or FIXED interrupts */
14013                 for (i = 0; i < mpt->m_intr_cnt; i++) {
14014                         (void) ddi_intr_enable(mpt->m_htable[i]);
14015                 }
14016         }
14017 
14018         switch (intr_type) {
14019         case DDI_INTR_TYPE_MSIX:
14020                 mptsas_log(mpt, CE_NOTE, "?Using %d MSI-X interrupt(s) "
14021                     "(Available sys %d, mpt %d, Requested %d)\n",
14022                     actual, count, mpt->m_max_msix_vectors, avail);
14023                 break;
14024         case DDI_INTR_TYPE_MSI:
14025                 mptsas_log(mpt, CE_NOTE, "Using single MSI interrupt\n");
14026                 break;
14027         case DDI_INTR_TYPE_FIXED:
14028         default:
14029                 mptsas_log(mpt, CE_NOTE, "Using single fixed interrupt\n");
14030                 break;
14031         }
14032 
14033         return (DDI_SUCCESS);
14034 }
14035 
14036 /*
14037  * mptsas_rem_intrs:
14038  *
14039  * Unregister FIXED or MSI interrupts
14040  */
14041 static void
14042 mptsas_rem_intrs(mptsas_t *mpt)
14043 {
14044         int     i;
14045 
14046         NDBG6(("mptsas_rem_intrs"));
14047 
14048         /* Disable all interrupts */
14049         if (mpt->m_intr_cap & DDI_INTR_FLAG_BLOCK) {
14050                 /* Call ddi_intr_block_disable() */
14051                 (void) ddi_intr_block_disable(mpt->m_htable, mpt->m_intr_cnt);
14052         } else {
14053                 for (i = 0; i < mpt->m_intr_cnt; i++) {
14054                         (void) ddi_intr_disable(mpt->m_htable[i]);
14055                 }
14056         }
14057 
14058         /* Call ddi_intr_remove_handler() */
14059         for (i = 0; i < mpt->m_intr_cnt; i++) {
14060                 (void) ddi_intr_remove_handler(mpt->m_htable[i]);
14061                 (void) ddi_intr_free(mpt->m_htable[i]);
14062         }
14063         kmem_free(mpt->m_htable, mpt->m_intr_size);
14064         mpt->m_intr_cnt = 0;
14065 }
14066 
14067 /*
14068  * The IO fault service error handling callback function
14069  */
14070 /*ARGSUSED*/
14071 static int
14072 mptsas_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
14073 {
14074         /*
14075          * as the driver can always deal with an error in any dma or
14076          * access handle, we can just return the fme_status value.
14077          */
14078         pci_ereport_post(dip, err, NULL);
14079         return (err->fme_status);
14080 }
14081 
14082 /*
14083  * mptsas_fm_init - initialize fma capabilities and register with IO
14084  *               fault services.
14085  */
14086 static void
14087 mptsas_fm_init(mptsas_t *mpt)
14088 {
14089         /*
14090          * Need to change iblock to priority for new MSI intr
14091          */
14092         ddi_iblock_cookie_t     fm_ibc;
14093 
14094         /* Only register with IO Fault Services if we have some capability */
14095         if (mpt->m_fm_capabilities) {
14096                 /* Adjust access and dma attributes for FMA */
14097                 mpt->m_reg_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC;
14098                 mpt->m_msg_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR;
14099                 mpt->m_io_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR;
14100 
14101                 /*
14102                  * Register capabilities with IO Fault Services.
14103                  * mpt->m_fm_capabilities will be updated to indicate
14104                  * capabilities actually supported (not requested.)
14105                  */
14106                 ddi_fm_init(mpt->m_dip, &mpt->m_fm_capabilities, &fm_ibc);
14107 
14108                 /*
14109                  * Initialize pci ereport capabilities if ereport
14110                  * capable (should always be.)
14111                  */
14112                 if (DDI_FM_EREPORT_CAP(mpt->m_fm_capabilities) ||
14113                     DDI_FM_ERRCB_CAP(mpt->m_fm_capabilities)) {
14114                         pci_ereport_setup(mpt->m_dip);
14115                 }
14116 
14117                 /*
14118                  * Register error callback if error callback capable.
14119                  */
14120                 if (DDI_FM_ERRCB_CAP(mpt->m_fm_capabilities)) {
14121                         ddi_fm_handler_register(mpt->m_dip,
14122                             mptsas_fm_error_cb, (void *) mpt);
14123                 }
14124         }
14125 }
14126 
14127 /*
14128  * mptsas_fm_fini - Releases fma capabilities and un-registers with IO
14129  *               fault services.
14130  *
14131  */
14132 static void
14133 mptsas_fm_fini(mptsas_t *mpt)
14134 {
14135         /* Only unregister FMA capabilities if registered */
14136         if (mpt->m_fm_capabilities) {
14137 
14138                 /*
14139                  * Un-register error callback if error callback capable.
14140                  */
14141 
14142                 if (DDI_FM_ERRCB_CAP(mpt->m_fm_capabilities)) {
14143                         ddi_fm_handler_unregister(mpt->m_dip);
14144                 }
14145 
14146                 /*
14147                  * Release any resources allocated by pci_ereport_setup()
14148                  */
14149 
14150                 if (DDI_FM_EREPORT_CAP(mpt->m_fm_capabilities) ||
14151                     DDI_FM_ERRCB_CAP(mpt->m_fm_capabilities)) {
14152                         pci_ereport_teardown(mpt->m_dip);
14153                 }
14154 
14155                 /* Unregister from IO Fault Services */
14156                 ddi_fm_fini(mpt->m_dip);
14157 
14158                 /* Adjust access and dma attributes for FMA */
14159                 mpt->m_reg_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC;
14160                 mpt->m_msg_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR;
14161                 mpt->m_io_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR;
14162 
14163         }
14164 }
14165 
14166 int
14167 mptsas_check_acc_handle(ddi_acc_handle_t handle)
14168 {
14169         ddi_fm_error_t  de;
14170 
14171         if (handle == NULL)
14172                 return (DDI_FAILURE);
14173         ddi_fm_acc_err_get(handle, &de, DDI_FME_VER0);
14174         return (de.fme_status);
14175 }
14176 
14177 int
14178 mptsas_check_dma_handle(ddi_dma_handle_t handle)
14179 {
14180         ddi_fm_error_t  de;
14181 
14182         if (handle == NULL)
14183                 return (DDI_FAILURE);
14184         ddi_fm_dma_err_get(handle, &de, DDI_FME_VER0);
14185         return (de.fme_status);
14186 }
14187 
14188 void
14189 mptsas_fm_ereport(mptsas_t *mpt, char *detail)
14190 {
14191         uint64_t        ena;
14192         char            buf[FM_MAX_CLASS];
14193 
14194         (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
14195         ena = fm_ena_generate(0, FM_ENA_FMT1);
14196         if (DDI_FM_EREPORT_CAP(mpt->m_fm_capabilities)) {
14197                 ddi_fm_ereport_post(mpt->m_dip, buf, ena, DDI_NOSLEEP,
14198                     FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERS0, NULL);
14199         }
14200 }
14201 
14202 static int
14203 mptsas_get_target_device_info(mptsas_t *mpt, uint32_t page_address,
14204     uint16_t *dev_handle, mptsas_target_t **pptgt)
14205 {
14206         int             rval;
14207         uint32_t        dev_info;
14208         uint64_t        sas_wwn;
14209         mptsas_phymask_t phymask;
14210         uint8_t         physport, phynum, config, disk;
14211         uint64_t        devicename;
14212         uint16_t        pdev_hdl;
14213         mptsas_target_t *tmp_tgt = NULL;
14214         uint16_t        bay_num, enclosure, io_flags;
14215 
14216         ASSERT(*pptgt == NULL);
14217 
14218         rval = mptsas_get_sas_device_page0(mpt, page_address, dev_handle,
14219             &sas_wwn, &dev_info, &physport, &phynum, &pdev_hdl,
14220             &bay_num, &enclosure, &io_flags);
14221         if (rval != DDI_SUCCESS) {
14222                 rval = DEV_INFO_FAIL_PAGE0;
14223                 return (rval);
14224         }
14225 
14226         if ((dev_info & (MPI2_SAS_DEVICE_INFO_SSP_TARGET |
14227             MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
14228             MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) == NULL) {
14229                 rval = DEV_INFO_WRONG_DEVICE_TYPE;
14230                 return (rval);
14231         }
14232 
14233         /*
14234          * Check if the dev handle is for a Phys Disk. If so, set return value
14235          * and exit.  Don't add Phys Disks to hash.
14236          */
14237         for (config = 0; config < mpt->m_num_raid_configs; config++) {
14238                 for (disk = 0; disk < MPTSAS_MAX_DISKS_IN_CONFIG; disk++) {
14239                         if (*dev_handle == mpt->m_raidconfig[config].
14240                             m_physdisk_devhdl[disk]) {
14241                                 rval = DEV_INFO_PHYS_DISK;
14242                                 return (rval);
14243                         }
14244                 }
14245         }
14246 
14247         /*
14248          * Get SATA Device Name from SAS device page0 for
14249          * sata device, if device name doesn't exist, set mta_wwn to
14250          * 0 for direct attached SATA. For the device behind the expander
14251          * we still can use STP address assigned by expander.
14252          */
14253         if (dev_info & (MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
14254             MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
14255                 mutex_exit(&mpt->m_mutex);
14256                 /* alloc a tmp_tgt to send the cmd */
14257                 tmp_tgt = kmem_zalloc(sizeof (struct mptsas_target),
14258                     KM_SLEEP);
14259                 tmp_tgt->m_devhdl = *dev_handle;
14260                 tmp_tgt->m_deviceinfo = dev_info;
14261                 tmp_tgt->m_qfull_retries = QFULL_RETRIES;
14262                 tmp_tgt->m_qfull_retry_interval =
14263                     drv_usectohz(QFULL_RETRY_INTERVAL * 1000);
14264                 tmp_tgt->m_t_throttle = MAX_THROTTLE;
14265                 mutex_init(&tmp_tgt->m_t_mutex, NULL, MUTEX_DRIVER, NULL);
14266                 devicename = mptsas_get_sata_guid(mpt, tmp_tgt, 0);
14267                 mutex_destroy(&tmp_tgt->m_t_mutex);
14268                 kmem_free(tmp_tgt, sizeof (struct mptsas_target));
14269                 mutex_enter(&mpt->m_mutex);
14270                 if (devicename != 0 && (((devicename >> 56) & 0xf0) == 0x50)) {
14271                         sas_wwn = devicename;
14272                 } else if (dev_info & MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH) {
14273                         sas_wwn = 0;
14274                 }
14275         }
14276 
14277         phymask = mptsas_physport_to_phymask(mpt, physport);
14278         *pptgt = mptsas_tgt_alloc(mpt, *dev_handle, sas_wwn,
14279             dev_info, phymask, phynum);
14280         if (*pptgt == NULL) {
14281                 mptsas_log(mpt, CE_WARN, "Failed to allocated target"
14282                     "structure!");
14283                 rval = DEV_INFO_FAIL_ALLOC;
14284                 return (rval);
14285         }
14286         (*pptgt)->m_io_flags = io_flags;
14287         (*pptgt)->m_enclosure = enclosure;
14288         (*pptgt)->m_slot_num = bay_num;
14289         return (DEV_INFO_SUCCESS);
14290 }
14291 
14292 uint64_t
14293 mptsas_get_sata_guid(mptsas_t *mpt, mptsas_target_t *ptgt, int lun)
14294 {
14295         uint64_t        sata_guid = 0, *pwwn = NULL;
14296         int             target = ptgt->m_devhdl;
14297         uchar_t         *inq83 = NULL;
14298         int             inq83_len = 0xFF;
14299         uchar_t         *dblk = NULL;
14300         int             inq83_retry = 3;
14301         int             rval = DDI_FAILURE;
14302 
14303         inq83   = kmem_zalloc(inq83_len, KM_SLEEP);
14304 
14305 inq83_retry:
14306         rval = mptsas_inquiry(mpt, ptgt, lun, 0x83, inq83,
14307             inq83_len, NULL, 1);
14308         if (rval != DDI_SUCCESS) {
14309                 mptsas_log(mpt, CE_WARN, "!mptsas request inquiry page "
14310                     "0x83 for target:%x, lun:%x failed!", target, lun);
14311                 goto out;
14312         }
14313         /* According to SAT2, the first descriptor is logic unit name */
14314         dblk = &inq83[4];
14315         if ((dblk[1] & 0x30) != 0) {
14316                 mptsas_log(mpt, CE_WARN, "!Descriptor is not lun associated.");
14317                 goto out;
14318         }
14319         pwwn = (uint64_t *)(void *)(&dblk[4]);
14320         if ((dblk[4] & 0xf0) == 0x50) {
14321                 sata_guid = BE_64(*pwwn);
14322                 goto out;
14323         } else if (dblk[4] == 'A') {
14324                 NDBG20(("SATA drive has no NAA format GUID."));
14325                 goto out;
14326         } else {
14327                 /* The data is not ready, wait and retry */
14328                 inq83_retry--;
14329                 if (inq83_retry <= 0) {
14330                         goto out;
14331                 }
14332                 NDBG20(("The GUID is not ready, retry..."));
14333                 delay(1 * drv_usectohz(1000000));
14334                 goto inq83_retry;
14335         }
14336 out:
14337         kmem_free(inq83, inq83_len);
14338         return (sata_guid);
14339 }
14340 
14341 static int
14342 mptsas_inquiry(mptsas_t *mpt, mptsas_target_t *ptgt, int lun, uchar_t page,
14343     unsigned char *buf, int len, int *reallen, uchar_t evpd)
14344 {
14345         uchar_t                 cdb[CDB_GROUP0];
14346         struct scsi_address     ap;
14347         struct buf              *data_bp = NULL;
14348         int                     resid = 0;
14349         int                     ret = DDI_FAILURE;
14350 
14351         ASSERT(len <= 0xffff);
14352 
14353         ap.a_target = MPTSAS_INVALID_DEVHDL;
14354         ap.a_lun = (uchar_t)(lun);
14355         ap.a_hba_tran = mpt->m_tran;
14356 
14357         data_bp = scsi_alloc_consistent_buf(&ap,
14358             (struct buf *)NULL, len, B_READ, NULL_FUNC, NULL);
14359         if (data_bp == NULL) {
14360                 return (ret);
14361         }
14362         bzero(cdb, CDB_GROUP0);
14363         cdb[0] = SCMD_INQUIRY;
14364         cdb[1] = evpd;
14365         cdb[2] = page;
14366         cdb[3] = (len & 0xff00) >> 8;
14367         cdb[4] = (len & 0x00ff);
14368         cdb[5] = 0;
14369 
14370         ret = mptsas_send_scsi_cmd(mpt, &ap, ptgt, &cdb[0], CDB_GROUP0, data_bp,
14371             &resid);
14372         if (ret == DDI_SUCCESS) {
14373                 if (reallen) {
14374                         *reallen = len - resid;
14375                 }
14376                 bcopy((caddr_t)data_bp->b_un.b_addr, buf, len);
14377         }
14378         if (data_bp) {
14379                 scsi_free_consistent_buf(data_bp);
14380         }
14381         return (ret);
14382 }
14383 
14384 static int
14385 mptsas_send_scsi_cmd(mptsas_t *mpt, struct scsi_address *ap,
14386     mptsas_target_t *ptgt, uchar_t *cdb, int cdblen, struct buf *data_bp,
14387     int *resid)
14388 {
14389         struct scsi_pkt         *pktp = NULL;
14390         scsi_hba_tran_t         *tran_clone = NULL;
14391         mptsas_tgt_private_t    *tgt_private = NULL;
14392         int                     ret = DDI_FAILURE;
14393 
14394         /*
14395          * scsi_hba_tran_t->tran_tgt_private is used to pass the address
14396          * information to scsi_init_pkt, allocate a scsi_hba_tran structure
14397          * to simulate the cmds from sd
14398          */
14399         tran_clone = kmem_alloc(
14400             sizeof (scsi_hba_tran_t), KM_SLEEP);
14401         if (tran_clone == NULL) {
14402                 goto out;
14403         }
14404         bcopy((caddr_t)mpt->m_tran,
14405             (caddr_t)tran_clone, sizeof (scsi_hba_tran_t));
14406         tgt_private = kmem_alloc(
14407             sizeof (mptsas_tgt_private_t), KM_SLEEP);
14408         if (tgt_private == NULL) {
14409                 goto out;
14410         }
14411         tgt_private->t_lun = ap->a_lun;
14412         tgt_private->t_private = ptgt;
14413         tran_clone->tran_tgt_private = tgt_private;
14414         ap->a_hba_tran = tran_clone;
14415 
14416         pktp = scsi_init_pkt(ap, (struct scsi_pkt *)NULL,
14417             data_bp, cdblen, sizeof (struct scsi_arq_status),
14418             0, PKT_CONSISTENT, NULL, NULL);
14419         if (pktp == NULL) {
14420                 goto out;
14421         }
14422         bcopy(cdb, pktp->pkt_cdbp, cdblen);
14423         pktp->pkt_flags = FLAG_NOPARITY;
14424         pktp->pkt_time = mptsas_scsi_pkt_time;
14425         if (scsi_poll(pktp) < 0) {
14426                 goto out;
14427         }
14428         if (((struct scsi_status *)pktp->pkt_scbp)->sts_chk) {
14429                 goto out;
14430         }
14431         if (resid != NULL) {
14432                 *resid = pktp->pkt_resid;
14433         }
14434 
14435         ret = DDI_SUCCESS;
14436 out:
14437         if (pktp) {
14438                 scsi_destroy_pkt(pktp);
14439         }
14440         if (tran_clone) {
14441                 kmem_free(tran_clone, sizeof (scsi_hba_tran_t));
14442         }
14443         if (tgt_private) {
14444                 kmem_free(tgt_private, sizeof (mptsas_tgt_private_t));
14445         }
14446         return (ret);
14447 }
14448 static int
14449 mptsas_parse_address(char *name, uint64_t *wwid, uint8_t *phy, int *lun)
14450 {
14451         char    *cp = NULL;
14452         char    *ptr = NULL;
14453         size_t  s = 0;
14454         char    *wwid_str = NULL;
14455         char    *lun_str = NULL;
14456         long    lunnum;
14457         long    phyid = -1;
14458         int     rc = DDI_FAILURE;
14459 
14460         ptr = name;
14461         ASSERT(ptr[0] == 'w' || ptr[0] == 'p');
14462         ptr++;
14463         if ((cp = strchr(ptr, ',')) == NULL) {
14464                 return (DDI_FAILURE);
14465         }
14466 
14467         wwid_str = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
14468         s = (uintptr_t)cp - (uintptr_t)ptr;
14469 
14470         bcopy(ptr, wwid_str, s);
14471         wwid_str[s] = '\0';
14472 
14473         ptr = ++cp;
14474 
14475         if ((cp = strchr(ptr, '\0')) == NULL) {
14476                 goto out;
14477         }
14478         lun_str =  kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
14479         s = (uintptr_t)cp - (uintptr_t)ptr;
14480 
14481         bcopy(ptr, lun_str, s);
14482         lun_str[s] = '\0';
14483 
14484         if (name[0] == 'p') {
14485                 rc = ddi_strtol(wwid_str, NULL, 0x10, &phyid);
14486         } else {
14487                 rc = scsi_wwnstr_to_wwn(wwid_str, wwid);
14488         }
14489         if (rc != DDI_SUCCESS)
14490                 goto out;
14491 
14492         if (phyid != -1) {
14493                 ASSERT(phyid < MPTSAS_MAX_PHYS);
14494                 *phy = (uint8_t)phyid;
14495         }
14496         rc = ddi_strtol(lun_str, NULL, 0x10, &lunnum);
14497         if (rc != 0)
14498                 goto out;
14499 
14500         *lun = (int)lunnum;
14501         rc = DDI_SUCCESS;
14502 out:
14503         if (wwid_str)
14504                 kmem_free(wwid_str, SCSI_MAXNAMELEN);
14505         if (lun_str)
14506                 kmem_free(lun_str, SCSI_MAXNAMELEN);
14507 
14508         return (rc);
14509 }
14510 
14511 /*
14512  * mptsas_parse_smp_name() is to parse sas wwn string
14513  * which format is "wWWN"
14514  */
14515 static int
14516 mptsas_parse_smp_name(char *name, uint64_t *wwn)
14517 {
14518         char    *ptr = name;
14519 
14520         if (*ptr != 'w') {
14521                 return (DDI_FAILURE);
14522         }
14523 
14524         ptr++;
14525         if (scsi_wwnstr_to_wwn(ptr, wwn)) {
14526                 return (DDI_FAILURE);
14527         }
14528         return (DDI_SUCCESS);
14529 }
14530 
14531 static int
14532 mptsas_bus_config(dev_info_t *pdip, uint_t flag,
14533     ddi_bus_config_op_t op, void *arg, dev_info_t **childp)
14534 {
14535         int             ret = NDI_FAILURE;
14536         int             circ = 0;
14537         int             circ1 = 0;
14538         mptsas_t        *mpt;
14539         char            *ptr = NULL;
14540         char            *devnm = NULL;
14541         uint64_t        wwid = 0;
14542         uint8_t         phy = 0xFF;
14543         int             lun = 0;
14544         uint_t          mflags = flag;
14545         int             bconfig = TRUE;
14546 
14547         if (scsi_hba_iport_unit_address(pdip) == 0) {
14548                 return (DDI_FAILURE);
14549         }
14550 
14551         mpt = DIP2MPT(pdip);
14552         if (!mpt) {
14553                 return (DDI_FAILURE);
14554         }
14555         /*
14556          * Hold the nexus across the bus_config
14557          */
14558         ndi_devi_enter(scsi_vhci_dip, &circ);
14559         ndi_devi_enter(pdip, &circ1);
14560         switch (op) {
14561         case BUS_CONFIG_ONE:
14562                 /* parse wwid/target name out of name given */
14563                 if ((ptr = strchr((char *)arg, '@')) == NULL) {
14564                         ret = NDI_FAILURE;
14565                         break;
14566                 }
14567                 ptr++;
14568                 if (strncmp((char *)arg, "smp", 3) == 0) {
14569                         /*
14570                          * This is a SMP target device
14571                          */
14572                         ret = mptsas_parse_smp_name(ptr, &wwid);
14573                         if (ret != DDI_SUCCESS) {
14574                                 ret = NDI_FAILURE;
14575                                 break;
14576                         }
14577                         ret = mptsas_config_smp(pdip, wwid, childp);
14578                 } else if ((ptr[0] == 'w') || (ptr[0] == 'p')) {
14579                         /*
14580                          * OBP could pass down a non-canonical form
14581                          * bootpath without LUN part when LUN is 0.
14582                          * So driver need adjust the string.
14583                          */
14584                         if (strchr(ptr, ',') == NULL) {
14585                                 devnm = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
14586                                 (void) sprintf(devnm, "%s,0", (char *)arg);
14587                                 ptr = strchr(devnm, '@');
14588                                 ptr++;
14589                         }
14590 
14591                         /*
14592                          * The device path is wWWID format and the device
14593                          * is not SMP target device.
14594                          */
14595                         ret = mptsas_parse_address(ptr, &wwid, &phy, &lun);
14596                         if (ret != DDI_SUCCESS) {
14597                                 ret = NDI_FAILURE;
14598                                 break;
14599                         }
14600                         *childp = NULL;
14601                         if (ptr[0] == 'w') {
14602                                 ret = mptsas_config_one_addr(pdip, wwid,
14603                                     lun, childp);
14604                         } else if (ptr[0] == 'p') {
14605                                 ret = mptsas_config_one_phy(pdip, phy, lun,
14606                                     childp);
14607                         }
14608 
14609                         /*
14610                          * If this is CD/DVD device in OBP path, the
14611                          * ndi_busop_bus_config can be skipped as config one
14612                          * operation is done above.
14613                          */
14614                         if ((ret == NDI_SUCCESS) && (*childp != NULL) &&
14615                             (strcmp(ddi_node_name(*childp), "cdrom") == 0) &&
14616                             (strncmp((char *)arg, "disk", 4) == 0)) {
14617                                 bconfig = FALSE;
14618                                 ndi_hold_devi(*childp);
14619                         }
14620                 } else {
14621                         ret = NDI_FAILURE;
14622                         break;
14623                 }
14624 
14625                 /*
14626                  * DDI group instructed us to use this flag.
14627                  */
14628                 mflags |= NDI_MDI_FALLBACK;
14629                 break;
14630         case BUS_CONFIG_DRIVER:
14631         case BUS_CONFIG_ALL:
14632                 mptsas_config_all(pdip);
14633                 ret = NDI_SUCCESS;
14634                 break;
14635         }
14636 
14637         if ((ret == NDI_SUCCESS) && bconfig) {
14638                 ret = ndi_busop_bus_config(pdip, mflags, op,
14639                     (devnm == NULL) ? arg : devnm, childp, 0);
14640         }
14641 
14642         ndi_devi_exit(pdip, circ1);
14643         ndi_devi_exit(scsi_vhci_dip, circ);
14644         if (devnm != NULL)
14645                 kmem_free(devnm, SCSI_MAXNAMELEN);
14646         return (ret);
14647 }
14648 
14649 static int
14650 mptsas_probe_lun(dev_info_t *pdip, int lun, dev_info_t **dip,
14651     mptsas_target_t *ptgt)
14652 {
14653         int                     rval = DDI_FAILURE;
14654         struct scsi_inquiry     *sd_inq = NULL;
14655         mptsas_t                *mpt = DIP2MPT(pdip);
14656 
14657         sd_inq = (struct scsi_inquiry *)kmem_alloc(SUN_INQSIZE, KM_SLEEP);
14658 
14659         rval = mptsas_inquiry(mpt, ptgt, lun, 0, (uchar_t *)sd_inq,
14660             SUN_INQSIZE, 0, (uchar_t)0);
14661 
14662         if ((rval == DDI_SUCCESS) && MPTSAS_VALID_LUN(sd_inq)) {
14663                 rval = mptsas_create_lun(pdip, sd_inq, dip, ptgt, lun);
14664         } else {
14665                 rval = DDI_FAILURE;
14666         }
14667 
14668         kmem_free(sd_inq, SUN_INQSIZE);
14669         return (rval);
14670 }
14671 
14672 static int
14673 mptsas_config_one_addr(dev_info_t *pdip, uint64_t sasaddr, int lun,
14674     dev_info_t **lundip)
14675 {
14676         int             rval;
14677         mptsas_t                *mpt = DIP2MPT(pdip);
14678         int             phymask;
14679         mptsas_target_t *ptgt = NULL;
14680 
14681         /*
14682          * Get the physical port associated to the iport
14683          */
14684         phymask = ddi_prop_get_int(DDI_DEV_T_ANY, pdip, 0,
14685             "phymask", 0);
14686 
14687         ptgt = mptsas_wwid_to_ptgt(mpt, phymask, sasaddr);
14688         if (ptgt == NULL) {
14689                 /*
14690                  * didn't match any device by searching
14691                  */
14692                 return (DDI_FAILURE);
14693         }
14694         /*
14695          * If the LUN already exists and the status is online,
14696          * we just return the pointer to dev_info_t directly.
14697          * For the mdi_pathinfo node, we'll handle it in
14698          * mptsas_create_virt_lun()
14699          * TODO should be also in mptsas_handle_dr
14700          */
14701 
14702         *lundip = mptsas_find_child_addr(pdip, sasaddr, lun);
14703         if (*lundip != NULL) {
14704                 /*
14705                  * TODO Another senario is, we hotplug the same disk
14706                  * on the same slot, the devhdl changed, is this
14707                  * possible?
14708                  * tgt_private->t_private != ptgt
14709                  */
14710                 if (sasaddr != ptgt->m_addr.mta_wwn) {
14711                         /*
14712                          * The device has changed although the devhdl is the
14713                          * same (Enclosure mapping mode, change drive on the
14714                          * same slot)
14715                          */
14716                         return (DDI_FAILURE);
14717                 }
14718                 return (DDI_SUCCESS);
14719         }
14720 
14721         if (phymask == 0) {
14722                 /*
14723                  * Configure IR volume
14724                  */
14725                 rval =  mptsas_config_raid(pdip, ptgt->m_devhdl, lundip);
14726                 return (rval);
14727         }
14728         rval = mptsas_probe_lun(pdip, lun, lundip, ptgt);
14729 
14730         return (rval);
14731 }
14732 
14733 static int
14734 mptsas_config_one_phy(dev_info_t *pdip, uint8_t phy, int lun,
14735     dev_info_t **lundip)
14736 {
14737         int             rval;
14738         mptsas_t        *mpt = DIP2MPT(pdip);
14739         mptsas_phymask_t phymask;
14740         mptsas_target_t *ptgt = NULL;
14741 
14742         /*
14743          * Get the physical port associated to the iport
14744          */
14745         phymask = (mptsas_phymask_t)ddi_prop_get_int(DDI_DEV_T_ANY, pdip, 0,
14746             "phymask", 0);
14747 
14748         ptgt = mptsas_phy_to_tgt(mpt, phymask, phy);
14749         if (ptgt == NULL) {
14750                 /*
14751                  * didn't match any device by searching
14752                  */
14753                 return (DDI_FAILURE);
14754         }
14755 
14756         /*
14757          * If the LUN already exists and the status is online,
14758          * we just return the pointer to dev_info_t directly.
14759          * For the mdi_pathinfo node, we'll handle it in
14760          * mptsas_create_virt_lun().
14761          */
14762 
14763         *lundip = mptsas_find_child_phy(pdip, phy);
14764         if (*lundip != NULL) {
14765                 return (DDI_SUCCESS);
14766         }
14767 
14768         rval = mptsas_probe_lun(pdip, lun, lundip, ptgt);
14769 
14770         return (rval);
14771 }
14772 
14773 static int
14774 mptsas_retrieve_lundata(int lun_cnt, uint8_t *buf, uint16_t *lun_num,
14775     uint8_t *lun_addr_type)
14776 {
14777         uint32_t        lun_idx = 0;
14778 
14779         ASSERT(lun_num != NULL);
14780         ASSERT(lun_addr_type != NULL);
14781 
14782         lun_idx = (lun_cnt + 1) * MPTSAS_SCSI_REPORTLUNS_ADDRESS_SIZE;
14783         /* determine report luns addressing type */
14784         switch (buf[lun_idx] & MPTSAS_SCSI_REPORTLUNS_ADDRESS_MASK) {
14785                 /*
14786                  * Vendors in the field have been found to be concatenating
14787                  * bus/target/lun to equal the complete lun value instead
14788                  * of switching to flat space addressing
14789                  */
14790                 /* 00b - peripheral device addressing method */
14791         case MPTSAS_SCSI_REPORTLUNS_ADDRESS_PERIPHERAL:
14792                 /* FALLTHRU */
14793                 /* 10b - logical unit addressing method */
14794         case MPTSAS_SCSI_REPORTLUNS_ADDRESS_LOGICAL_UNIT:
14795                 /* FALLTHRU */
14796                 /* 01b - flat space addressing method */
14797         case MPTSAS_SCSI_REPORTLUNS_ADDRESS_FLAT_SPACE:
14798                 /* byte0 bit0-5=msb lun byte1 bit0-7=lsb lun */
14799                 *lun_addr_type = (buf[lun_idx] &
14800                     MPTSAS_SCSI_REPORTLUNS_ADDRESS_MASK) >> 6;
14801                 *lun_num = (buf[lun_idx] & 0x3F) << 8;
14802                 *lun_num |= buf[lun_idx + 1];
14803                 return (DDI_SUCCESS);
14804         default:
14805                 return (DDI_FAILURE);
14806         }
14807 }
14808 
14809 static int
14810 mptsas_config_luns(dev_info_t *pdip, mptsas_target_t *ptgt)
14811 {
14812         struct buf              *repluns_bp = NULL;
14813         struct scsi_address     ap;
14814         uchar_t                 cdb[CDB_GROUP5];
14815         int                     ret = DDI_FAILURE;
14816         int                     retry = 0;
14817         int                     lun_list_len = 0;
14818         uint16_t                lun_num = 0;
14819         uint8_t                 lun_addr_type = 0;
14820         uint32_t                lun_cnt = 0;
14821         uint32_t                lun_total = 0;
14822         dev_info_t              *cdip = NULL;
14823         uint16_t                *saved_repluns = NULL;
14824         char                    *buffer = NULL;
14825         int                     buf_len = 128;
14826         mptsas_t                *mpt = DIP2MPT(pdip);
14827         uint64_t                sas_wwn = 0;
14828         uint8_t                 phy = 0xFF;
14829         uint32_t                dev_info = 0;
14830 
14831         mutex_enter(&mpt->m_mutex);
14832         sas_wwn = ptgt->m_addr.mta_wwn;
14833         phy = ptgt->m_phynum;
14834         dev_info = ptgt->m_deviceinfo;
14835         mutex_exit(&mpt->m_mutex);
14836 
14837         if (sas_wwn == 0) {
14838                 /*
14839                  * It's a SATA without Device Name
14840                  * So don't try multi-LUNs
14841                  */
14842                 if (mptsas_find_child_phy(pdip, phy)) {
14843                         return (DDI_SUCCESS);
14844                 } else {
14845                         /*
14846                          * need configure and create node
14847                          */
14848                         return (DDI_FAILURE);
14849                 }
14850         }
14851 
14852         /*
14853          * WWN (SAS address or Device Name exist)
14854          */
14855         if (dev_info & (MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
14856             MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
14857                 /*
14858                  * SATA device with Device Name
14859                  * So don't try multi-LUNs
14860                  */
14861                 if (mptsas_find_child_addr(pdip, sas_wwn, 0)) {
14862                         return (DDI_SUCCESS);
14863                 } else {
14864                         return (DDI_FAILURE);
14865                 }
14866         }
14867 
14868         do {
14869                 ap.a_target = MPTSAS_INVALID_DEVHDL;
14870                 ap.a_lun = 0;
14871                 ap.a_hba_tran = mpt->m_tran;
14872                 repluns_bp = scsi_alloc_consistent_buf(&ap,
14873                     (struct buf *)NULL, buf_len, B_READ, NULL_FUNC, NULL);
14874                 if (repluns_bp == NULL) {
14875                         retry++;
14876                         continue;
14877                 }
14878                 bzero(cdb, CDB_GROUP5);
14879                 cdb[0] = SCMD_REPORT_LUNS;
14880                 cdb[6] = (buf_len & 0xff000000) >> 24;
14881                 cdb[7] = (buf_len & 0x00ff0000) >> 16;
14882                 cdb[8] = (buf_len & 0x0000ff00) >> 8;
14883                 cdb[9] = (buf_len & 0x000000ff);
14884 
14885                 ret = mptsas_send_scsi_cmd(mpt, &ap, ptgt, &cdb[0], CDB_GROUP5,
14886                     repluns_bp, NULL);
14887                 if (ret != DDI_SUCCESS) {
14888                         scsi_free_consistent_buf(repluns_bp);
14889                         retry++;
14890                         continue;
14891                 }
14892                 lun_list_len = BE_32(*(int *)((void *)(
14893                     repluns_bp->b_un.b_addr)));
14894                 if (buf_len >= lun_list_len + 8) {
14895                         ret = DDI_SUCCESS;
14896                         break;
14897                 }
14898                 scsi_free_consistent_buf(repluns_bp);
14899                 buf_len = lun_list_len + 8;
14900 
14901         } while (retry < 3);
14902 
14903         if (ret != DDI_SUCCESS)
14904                 return (ret);
14905         buffer = (char *)repluns_bp->b_un.b_addr;
14906         /*
14907          * find out the number of luns returned by the SCSI ReportLun call
14908          * and allocate buffer space
14909          */
14910         lun_total = lun_list_len / MPTSAS_SCSI_REPORTLUNS_ADDRESS_SIZE;
14911         saved_repluns = kmem_zalloc(sizeof (uint16_t) * lun_total, KM_SLEEP);
14912         if (saved_repluns == NULL) {
14913                 scsi_free_consistent_buf(repluns_bp);
14914                 return (DDI_FAILURE);
14915         }
14916         for (lun_cnt = 0; lun_cnt < lun_total; lun_cnt++) {
14917                 if (mptsas_retrieve_lundata(lun_cnt, (uint8_t *)(buffer),
14918                     &lun_num, &lun_addr_type) != DDI_SUCCESS) {
14919                         continue;
14920                 }
14921                 saved_repluns[lun_cnt] = lun_num;
14922                 if (cdip = mptsas_find_child_addr(pdip, sas_wwn, lun_num))
14923                         ret = DDI_SUCCESS;
14924                 else
14925                         ret = mptsas_probe_lun(pdip, lun_num, &cdip,
14926                             ptgt);
14927                 if ((ret == DDI_SUCCESS) && (cdip != NULL)) {
14928                         (void) ndi_prop_remove(DDI_DEV_T_NONE, cdip,
14929                             MPTSAS_DEV_GONE);
14930                 }
14931         }
14932         mptsas_offline_missed_luns(pdip, saved_repluns, lun_total, ptgt);
14933         kmem_free(saved_repluns, sizeof (uint16_t) * lun_total);
14934         scsi_free_consistent_buf(repluns_bp);
14935         return (DDI_SUCCESS);
14936 }
14937 
14938 static int
14939 mptsas_config_raid(dev_info_t *pdip, uint16_t target, dev_info_t **dip)
14940 {
14941         int                     rval = DDI_FAILURE;
14942         struct scsi_inquiry     *sd_inq = NULL;
14943         mptsas_t                *mpt = DIP2MPT(pdip);
14944         mptsas_target_t         *ptgt = NULL;
14945 
14946         mutex_enter(&mpt->m_mutex);
14947         ptgt = refhash_linear_search(mpt->m_targets,
14948             mptsas_target_eval_devhdl, &target);
14949         mutex_exit(&mpt->m_mutex);
14950         if (ptgt == NULL) {
14951                 mptsas_log(mpt, CE_WARN, "Volume with VolDevHandle of 0x%x "
14952                     "not found.", target);
14953                 return (rval);
14954         }
14955 
14956         sd_inq = (struct scsi_inquiry *)kmem_alloc(SUN_INQSIZE, KM_SLEEP);
14957         rval = mptsas_inquiry(mpt, ptgt, 0, 0, (uchar_t *)sd_inq,
14958             SUN_INQSIZE, 0, (uchar_t)0);
14959 
14960         if ((rval == DDI_SUCCESS) && MPTSAS_VALID_LUN(sd_inq)) {
14961                 rval = mptsas_create_phys_lun(pdip, sd_inq, NULL, dip, ptgt,
14962                     0);
14963         } else {
14964                 rval = DDI_FAILURE;
14965         }
14966 
14967         kmem_free(sd_inq, SUN_INQSIZE);
14968         return (rval);
14969 }
14970 
14971 /*
14972  * configure all RAID volumes for virtual iport
14973  */
14974 static void
14975 mptsas_config_all_viport(dev_info_t *pdip)
14976 {
14977         mptsas_t        *mpt = DIP2MPT(pdip);
14978         int             config, vol;
14979         int             target;
14980         dev_info_t      *lundip = NULL;
14981 
14982         /*
14983          * Get latest RAID info and search for any Volume DevHandles.  If any
14984          * are found, configure the volume.
14985          */
14986         mutex_enter(&mpt->m_mutex);
14987         for (config = 0; config < mpt->m_num_raid_configs; config++) {
14988                 for (vol = 0; vol < MPTSAS_MAX_RAIDVOLS; vol++) {
14989                         if (mpt->m_raidconfig[config].m_raidvol[vol].m_israid
14990                             == 1) {
14991                                 target = mpt->m_raidconfig[config].
14992                                     m_raidvol[vol].m_raidhandle;
14993                                 mutex_exit(&mpt->m_mutex);
14994                                 (void) mptsas_config_raid(pdip, target,
14995                                     &lundip);
14996                                 mutex_enter(&mpt->m_mutex);
14997                         }
14998                 }
14999         }
15000         mutex_exit(&mpt->m_mutex);
15001 }
15002 
15003 static void
15004 mptsas_offline_missed_luns(dev_info_t *pdip, uint16_t *repluns,
15005     int lun_cnt, mptsas_target_t *ptgt)
15006 {
15007         dev_info_t      *child = NULL, *savechild = NULL;
15008         mdi_pathinfo_t  *pip = NULL, *savepip = NULL;
15009         uint64_t        sas_wwn, wwid;
15010         uint8_t         phy;
15011         int             lun;
15012         int             i;
15013         int             find;
15014         char            *addr;
15015         char            *nodename;
15016         mptsas_t        *mpt = DIP2MPT(pdip);
15017 
15018         mutex_enter(&mpt->m_mutex);
15019         wwid = ptgt->m_addr.mta_wwn;
15020         mutex_exit(&mpt->m_mutex);
15021 
15022         child = ddi_get_child(pdip);
15023         while (child) {
15024                 find = 0;
15025                 savechild = child;
15026                 child = ddi_get_next_sibling(child);
15027 
15028                 nodename = ddi_node_name(savechild);
15029                 if (strcmp(nodename, "smp") == 0) {
15030                         continue;
15031                 }
15032 
15033                 addr = ddi_get_name_addr(savechild);
15034                 if (addr == NULL) {
15035                         continue;
15036                 }
15037 
15038                 if (mptsas_parse_address(addr, &sas_wwn, &phy, &lun) !=
15039                     DDI_SUCCESS) {
15040                         continue;
15041                 }
15042 
15043                 if (wwid == sas_wwn) {
15044                         for (i = 0; i < lun_cnt; i++) {
15045                                 if (repluns[i] == lun) {
15046                                         find = 1;
15047                                         break;
15048                                 }
15049                         }
15050                 } else {
15051                         continue;
15052                 }
15053                 if (find == 0) {
15054                         /*
15055                          * The lun has not been there already
15056                          */
15057                         (void) mptsas_offline_lun(pdip, savechild, NULL,
15058                             NDI_DEVI_REMOVE);
15059                 }
15060         }
15061 
15062         pip = mdi_get_next_client_path(pdip, NULL);
15063         while (pip) {
15064                 find = 0;
15065                 savepip = pip;
15066                 addr = MDI_PI(pip)->pi_addr;
15067 
15068                 pip = mdi_get_next_client_path(pdip, pip);
15069 
15070                 if (addr == NULL) {
15071                         continue;
15072                 }
15073 
15074                 if (mptsas_parse_address(addr, &sas_wwn, &phy,
15075                     &lun) != DDI_SUCCESS) {
15076                         continue;
15077                 }
15078 
15079                 if (sas_wwn == wwid) {
15080                         for (i = 0; i < lun_cnt; i++) {
15081                                 if (repluns[i] == lun) {
15082                                         find = 1;
15083                                         break;
15084                                 }
15085                         }
15086                 } else {
15087                         continue;
15088                 }
15089 
15090                 if (find == 0) {
15091                         /*
15092                          * The lun has not been there already
15093                          */
15094                         (void) mptsas_offline_lun(pdip, NULL, savepip,
15095                             NDI_DEVI_REMOVE);
15096                 }
15097         }
15098 }
15099 
15100 void
15101 mptsas_update_hashtab(struct mptsas *mpt)
15102 {
15103         uint32_t        page_address;
15104         int             rval = 0;
15105         uint16_t        dev_handle;
15106         mptsas_target_t *ptgt = NULL;
15107         mptsas_smp_t    smp_node;
15108 
15109         /*
15110          * Get latest RAID info.
15111          */
15112         (void) mptsas_get_raid_info(mpt);
15113 
15114         dev_handle = mpt->m_smp_devhdl;
15115         for (; mpt->m_done_traverse_smp == 0; ) {
15116                 page_address = (MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL &
15117                     MPI2_SAS_EXPAND_PGAD_FORM_MASK) | (uint32_t)dev_handle;
15118                 if (mptsas_get_sas_expander_page0(mpt, page_address, &smp_node)
15119                     != DDI_SUCCESS) {
15120                         break;
15121                 }
15122                 mpt->m_smp_devhdl = dev_handle = smp_node.m_devhdl;
15123                 (void) mptsas_smp_alloc(mpt, &smp_node);
15124         }
15125 
15126         /*
15127          * Config target devices
15128          */
15129         dev_handle = mpt->m_dev_handle;
15130 
15131         /*
15132          * Do loop to get sas device page 0 by GetNextHandle till the
15133          * the last handle. If the sas device is a SATA/SSP target,
15134          * we try to config it.
15135          */
15136         for (; mpt->m_done_traverse_dev == 0; ) {
15137                 ptgt = NULL;
15138                 page_address =
15139                     (MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE &
15140                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15141                     (uint32_t)dev_handle;
15142                 rval = mptsas_get_target_device_info(mpt, page_address,
15143                     &dev_handle, &ptgt);
15144                 if ((rval == DEV_INFO_FAIL_PAGE0) ||
15145                     (rval == DEV_INFO_FAIL_ALLOC)) {
15146                         break;
15147                 }
15148 
15149                 mpt->m_dev_handle = dev_handle;
15150         }
15151 
15152 }
15153 
15154 void
15155 mptsas_update_driver_data(struct mptsas *mpt)
15156 {
15157         mptsas_target_t *tp;
15158         mptsas_smp_t *sp;
15159 
15160         ASSERT(MUTEX_HELD(&mpt->m_mutex));
15161 
15162         /*
15163          * TODO after hard reset, update the driver data structures
15164          * 1. update port/phymask mapping table mpt->m_phy_info
15165          * 2. invalid all the entries in hash table
15166          *    m_devhdl = 0xffff and m_deviceinfo = 0
15167          * 3. call sas_device_page/expander_page to update hash table
15168          */
15169         mptsas_update_phymask(mpt);
15170         /*
15171          * Invalid the existing entries
15172          *
15173          * XXX - It seems like we should just delete everything here.  We are
15174          * holding the lock and are about to refresh all the targets in both
15175          * hashes anyway.  Given the path we're in, what outstanding async
15176          * event could possibly be trying to reference one of these things
15177          * without taking the lock, and how would that be useful anyway?
15178          */
15179         for (tp = refhash_first(mpt->m_targets); tp != NULL;
15180             tp = refhash_next(mpt->m_targets, tp)) {
15181                 tp->m_devhdl = MPTSAS_INVALID_DEVHDL;
15182                 tp->m_deviceinfo = 0;
15183                 tp->m_dr_flag = MPTSAS_DR_INACTIVE;
15184         }
15185         for (sp = refhash_first(mpt->m_smp_targets); sp != NULL;
15186             sp = refhash_next(mpt->m_smp_targets, sp)) {
15187                 sp->m_devhdl = MPTSAS_INVALID_DEVHDL;
15188                 sp->m_deviceinfo = 0;
15189         }
15190         mpt->m_done_traverse_dev = 0;
15191         mpt->m_done_traverse_smp = 0;
15192         mpt->m_dev_handle = mpt->m_smp_devhdl = MPTSAS_INVALID_DEVHDL;
15193         mptsas_update_hashtab(mpt);
15194 }
15195 
15196 static void
15197 mptsas_config_all(dev_info_t *pdip)
15198 {
15199         dev_info_t      *smpdip = NULL;
15200         mptsas_t        *mpt = DIP2MPT(pdip);
15201         int             phymask = 0;
15202         mptsas_phymask_t phy_mask;
15203         mptsas_target_t *ptgt = NULL;
15204         mptsas_smp_t    *psmp;
15205 
15206         /*
15207          * Get the phymask associated to the iport
15208          */
15209         phymask = ddi_prop_get_int(DDI_DEV_T_ANY, pdip, 0,
15210             "phymask", 0);
15211 
15212         /*
15213          * Enumerate RAID volumes here (phymask == 0).
15214          */
15215         if (phymask == 0) {
15216                 mptsas_config_all_viport(pdip);
15217                 return;
15218         }
15219 
15220         mutex_enter(&mpt->m_mutex);
15221 
15222         if (!mpt->m_done_traverse_dev || !mpt->m_done_traverse_smp) {
15223                 mptsas_update_hashtab(mpt);
15224         }
15225 
15226         for (psmp = refhash_first(mpt->m_smp_targets); psmp != NULL;
15227             psmp = refhash_next(mpt->m_smp_targets, psmp)) {
15228                 phy_mask = psmp->m_addr.mta_phymask;
15229                 if (phy_mask == phymask) {
15230                         smpdip = NULL;
15231                         mutex_exit(&mpt->m_mutex);
15232                         (void) mptsas_online_smp(pdip, psmp, &smpdip);
15233                         mutex_enter(&mpt->m_mutex);
15234                 }
15235         }
15236 
15237         for (ptgt = refhash_first(mpt->m_targets); ptgt != NULL;
15238             ptgt = refhash_next(mpt->m_targets, ptgt)) {
15239                 phy_mask = ptgt->m_addr.mta_phymask;
15240                 if (phy_mask == phymask) {
15241                         mutex_exit(&mpt->m_mutex);
15242                         (void) mptsas_config_target(pdip, ptgt);
15243                         mutex_enter(&mpt->m_mutex);
15244                 }
15245         }
15246         mutex_exit(&mpt->m_mutex);
15247 }
15248 
15249 static int
15250 mptsas_config_target(dev_info_t *pdip, mptsas_target_t *ptgt)
15251 {
15252         int             rval = DDI_FAILURE;
15253         dev_info_t      *tdip;
15254 
15255         rval = mptsas_config_luns(pdip, ptgt);
15256         if (rval != DDI_SUCCESS) {
15257                 /*
15258                  * The return value means the SCMD_REPORT_LUNS
15259                  * did not execute successfully. The target maybe
15260                  * doesn't support such command.
15261                  */
15262                 rval = mptsas_probe_lun(pdip, 0, &tdip, ptgt);
15263         }
15264         return (rval);
15265 }
15266 
15267 /*
15268  * Return fail if not all the childs/paths are freed.
15269  * if there is any path under the HBA, the return value will be always fail
15270  * because we didn't call mdi_pi_free for path
15271  */
15272 static int
15273 mptsas_offline_targetdev(dev_info_t *pdip, char *name)
15274 {
15275         dev_info_t              *child = NULL, *prechild = NULL;
15276         mdi_pathinfo_t          *pip = NULL, *savepip = NULL;
15277         int                     tmp_rval, rval = DDI_SUCCESS;
15278         char                    *addr, *cp;
15279         size_t                  s;
15280         mptsas_t                *mpt = DIP2MPT(pdip);
15281 
15282         child = ddi_get_child(pdip);
15283         while (child) {
15284                 addr = ddi_get_name_addr(child);
15285                 prechild = child;
15286                 child = ddi_get_next_sibling(child);
15287 
15288                 if (addr == NULL) {
15289                         continue;
15290                 }
15291                 if ((cp = strchr(addr, ',')) == NULL) {
15292                         continue;
15293                 }
15294 
15295                 s = (uintptr_t)cp - (uintptr_t)addr;
15296 
15297                 if (strncmp(addr, name, s) != 0) {
15298                         continue;
15299                 }
15300 
15301                 tmp_rval = mptsas_offline_lun(pdip, prechild, NULL,
15302                     NDI_DEVI_REMOVE);
15303                 if (tmp_rval != DDI_SUCCESS) {
15304                         rval = DDI_FAILURE;
15305                         if (ndi_prop_create_boolean(DDI_DEV_T_NONE,
15306                             prechild, MPTSAS_DEV_GONE) !=
15307                             DDI_PROP_SUCCESS) {
15308                                 mptsas_log(mpt, CE_WARN,
15309                                     "unable to create property for "
15310                                     "SAS %s (MPTSAS_DEV_GONE)", addr);
15311                         }
15312                 }
15313         }
15314 
15315         pip = mdi_get_next_client_path(pdip, NULL);
15316         while (pip) {
15317                 addr = MDI_PI(pip)->pi_addr;
15318                 savepip = pip;
15319                 pip = mdi_get_next_client_path(pdip, pip);
15320                 if (addr == NULL) {
15321                         continue;
15322                 }
15323 
15324                 if ((cp = strchr(addr, ',')) == NULL) {
15325                         continue;
15326                 }
15327 
15328                 s = (uintptr_t)cp - (uintptr_t)addr;
15329 
15330                 if (strncmp(addr, name, s) != 0) {
15331                         continue;
15332                 }
15333 
15334                 (void) mptsas_offline_lun(pdip, NULL, savepip,
15335                     NDI_DEVI_REMOVE);
15336                 /*
15337                  * driver will not invoke mdi_pi_free, so path will not
15338                  * be freed forever, return DDI_FAILURE.
15339                  */
15340                 rval = DDI_FAILURE;
15341         }
15342         return (rval);
15343 }
15344 
15345 static int
15346 mptsas_offline_lun(dev_info_t *pdip, dev_info_t *rdip,
15347     mdi_pathinfo_t *rpip, uint_t flags)
15348 {
15349         int             rval = DDI_FAILURE;
15350         char            *devname;
15351         dev_info_t      *cdip, *parent;
15352 
15353         if (rpip != NULL) {
15354                 parent = scsi_vhci_dip;
15355                 cdip = mdi_pi_get_client(rpip);
15356         } else if (rdip != NULL) {
15357                 parent = pdip;
15358                 cdip = rdip;
15359         } else {
15360                 return (DDI_FAILURE);
15361         }
15362 
15363         /*
15364          * Make sure node is attached otherwise
15365          * it won't have related cache nodes to
15366          * clean up.  i_ddi_devi_attached is
15367          * similiar to i_ddi_node_state(cdip) >=
15368          * DS_ATTACHED.
15369          */
15370         if (i_ddi_devi_attached(cdip)) {
15371 
15372                 /* Get full devname */
15373                 devname = kmem_alloc(MAXNAMELEN + 1, KM_SLEEP);
15374                 (void) ddi_deviname(cdip, devname);
15375                 /* Clean cache */
15376                 (void) devfs_clean(parent, devname + 1,
15377                     DV_CLEAN_FORCE);
15378                 kmem_free(devname, MAXNAMELEN + 1);
15379         }
15380         if (rpip != NULL) {
15381                 if (MDI_PI_IS_OFFLINE(rpip)) {
15382                         rval = DDI_SUCCESS;
15383                 } else {
15384                         rval = mdi_pi_offline(rpip, 0);
15385                 }
15386         } else {
15387                 rval = ndi_devi_offline(cdip, flags);
15388         }
15389 
15390         return (rval);
15391 }
15392 
15393 static dev_info_t *
15394 mptsas_find_smp_child(dev_info_t *parent, char *str_wwn)
15395 {
15396         dev_info_t      *child = NULL;
15397         char            *smp_wwn = NULL;
15398 
15399         child = ddi_get_child(parent);
15400         while (child) {
15401                 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, child,
15402                     DDI_PROP_DONTPASS, SMP_WWN, &smp_wwn)
15403                     != DDI_SUCCESS) {
15404                         child = ddi_get_next_sibling(child);
15405                         continue;
15406                 }
15407 
15408                 if (strcmp(smp_wwn, str_wwn) == 0) {
15409                         ddi_prop_free(smp_wwn);
15410                         break;
15411                 }
15412                 child = ddi_get_next_sibling(child);
15413                 ddi_prop_free(smp_wwn);
15414         }
15415         return (child);
15416 }
15417 
15418 static int
15419 mptsas_offline_smp(dev_info_t *pdip, mptsas_smp_t *smp_node, uint_t flags)
15420 {
15421         int             rval = DDI_FAILURE;
15422         char            *devname;
15423         char            wwn_str[MPTSAS_WWN_STRLEN];
15424         dev_info_t      *cdip;
15425 
15426         (void) sprintf(wwn_str, "%"PRIx64, smp_node->m_addr.mta_wwn);
15427 
15428         cdip = mptsas_find_smp_child(pdip, wwn_str);
15429 
15430         if (cdip == NULL)
15431                 return (DDI_SUCCESS);
15432 
15433         /*
15434          * Make sure node is attached otherwise
15435          * it won't have related cache nodes to
15436          * clean up.  i_ddi_devi_attached is
15437          * similiar to i_ddi_node_state(cdip) >=
15438          * DS_ATTACHED.
15439          */
15440         if (i_ddi_devi_attached(cdip)) {
15441 
15442                 /* Get full devname */
15443                 devname = kmem_alloc(MAXNAMELEN + 1, KM_SLEEP);
15444                 (void) ddi_deviname(cdip, devname);
15445                 /* Clean cache */
15446                 (void) devfs_clean(pdip, devname + 1,
15447                     DV_CLEAN_FORCE);
15448                 kmem_free(devname, MAXNAMELEN + 1);
15449         }
15450 
15451         rval = ndi_devi_offline(cdip, flags);
15452 
15453         return (rval);
15454 }
15455 
15456 static dev_info_t *
15457 mptsas_find_child(dev_info_t *pdip, char *name)
15458 {
15459         dev_info_t      *child = NULL;
15460         char            *rname = NULL;
15461         int             rval = DDI_FAILURE;
15462 
15463         rname = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15464 
15465         child = ddi_get_child(pdip);
15466         while (child) {
15467                 rval = mptsas_name_child(child, rname, SCSI_MAXNAMELEN);
15468                 if (rval != DDI_SUCCESS) {
15469                         child = ddi_get_next_sibling(child);
15470                         bzero(rname, SCSI_MAXNAMELEN);
15471                         continue;
15472                 }
15473 
15474                 if (strcmp(rname, name) == 0) {
15475                         break;
15476                 }
15477                 child = ddi_get_next_sibling(child);
15478                 bzero(rname, SCSI_MAXNAMELEN);
15479         }
15480 
15481         kmem_free(rname, SCSI_MAXNAMELEN);
15482 
15483         return (child);
15484 }
15485 
15486 
15487 static dev_info_t *
15488 mptsas_find_child_addr(dev_info_t *pdip, uint64_t sasaddr, int lun)
15489 {
15490         dev_info_t      *child = NULL;
15491         char            *name = NULL;
15492         char            *addr = NULL;
15493 
15494         name = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15495         addr = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15496         (void) sprintf(name, "%016"PRIx64, sasaddr);
15497         (void) sprintf(addr, "w%s,%x", name, lun);
15498         child = mptsas_find_child(pdip, addr);
15499         kmem_free(name, SCSI_MAXNAMELEN);
15500         kmem_free(addr, SCSI_MAXNAMELEN);
15501         return (child);
15502 }
15503 
15504 static dev_info_t *
15505 mptsas_find_child_phy(dev_info_t *pdip, uint8_t phy)
15506 {
15507         dev_info_t      *child;
15508         char            *addr;
15509 
15510         addr = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15511         (void) sprintf(addr, "p%x,0", phy);
15512         child = mptsas_find_child(pdip, addr);
15513         kmem_free(addr, SCSI_MAXNAMELEN);
15514         return (child);
15515 }
15516 
15517 static mdi_pathinfo_t *
15518 mptsas_find_path_phy(dev_info_t *pdip, uint8_t phy)
15519 {
15520         mdi_pathinfo_t  *path;
15521         char            *addr = NULL;
15522 
15523         addr = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15524         (void) sprintf(addr, "p%x,0", phy);
15525         path = mdi_pi_find(pdip, NULL, addr);
15526         kmem_free(addr, SCSI_MAXNAMELEN);
15527         return (path);
15528 }
15529 
15530 static mdi_pathinfo_t *
15531 mptsas_find_path_addr(dev_info_t *parent, uint64_t sasaddr, int lun)
15532 {
15533         mdi_pathinfo_t  *path;
15534         char            *name = NULL;
15535         char            *addr = NULL;
15536 
15537         name = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15538         addr = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15539         (void) sprintf(name, "%016"PRIx64, sasaddr);
15540         (void) sprintf(addr, "w%s,%x", name, lun);
15541         path = mdi_pi_find(parent, NULL, addr);
15542         kmem_free(name, SCSI_MAXNAMELEN);
15543         kmem_free(addr, SCSI_MAXNAMELEN);
15544 
15545         return (path);
15546 }
15547 
15548 static int
15549 mptsas_create_lun(dev_info_t *pdip, struct scsi_inquiry *sd_inq,
15550     dev_info_t **lun_dip, mptsas_target_t *ptgt, int lun)
15551 {
15552         int                     i = 0;
15553         uchar_t                 *inq83 = NULL;
15554         int                     inq83_len1 = 0xFF;
15555         int                     inq83_len = 0;
15556         int                     rval = DDI_FAILURE;
15557         ddi_devid_t             devid;
15558         char                    *guid = NULL;
15559         int                     target = ptgt->m_devhdl;
15560         mdi_pathinfo_t          *pip = NULL;
15561         mptsas_t                *mpt = DIP2MPT(pdip);
15562 
15563         /*
15564          * For DVD/CD ROM and tape devices and optical
15565          * devices, we won't try to enumerate them under
15566          * scsi_vhci, so no need to try page83
15567          */
15568         if (sd_inq && (sd_inq->inq_dtype == DTYPE_RODIRECT ||
15569             sd_inq->inq_dtype == DTYPE_OPTICAL ||
15570             sd_inq->inq_dtype == DTYPE_ESI))
15571                 goto create_lun;
15572 
15573         /*
15574          * The LCA returns good SCSI status, but corrupt page 83 data the first
15575          * time it is queried. The solution is to keep trying to request page83
15576          * and verify the GUID is not (DDI_NOT_WELL_FORMED) in
15577          * mptsas_inq83_retry_timeout seconds. If the timeout expires, driver
15578          * give up to get VPD page at this stage and fail the enumeration.
15579          */
15580 
15581         inq83   = kmem_zalloc(inq83_len1, KM_SLEEP);
15582 
15583         for (i = 0; i < mptsas_inq83_retry_timeout; i++) {
15584                 rval = mptsas_inquiry(mpt, ptgt, lun, 0x83, inq83,
15585                     inq83_len1, &inq83_len, 1);
15586                 if (rval != 0) {
15587                         mptsas_log(mpt, CE_WARN, "!mptsas request inquiry page "
15588                             "0x83 for target:%x, lun:%x failed!", target, lun);
15589                         if (mptsas_physical_bind_failed_page_83 != B_FALSE)
15590                                 goto create_lun;
15591                         goto out;
15592                 }
15593                 /*
15594                  * create DEVID from inquiry data
15595                  */
15596                 if ((rval = ddi_devid_scsi_encode(
15597                     DEVID_SCSI_ENCODE_VERSION_LATEST, NULL, (uchar_t *)sd_inq,
15598                     sizeof (struct scsi_inquiry), NULL, 0, inq83,
15599                     (size_t)inq83_len, &devid)) == DDI_SUCCESS) {
15600                         /*
15601                          * extract GUID from DEVID
15602                          */
15603                         guid = ddi_devid_to_guid(devid);
15604 
15605                         /*
15606                          * Do not enable MPXIO if the strlen(guid) is greater
15607                          * than MPTSAS_MAX_GUID_LEN, this constrain would be
15608                          * handled by framework later.
15609                          */
15610                         if (guid && (strlen(guid) > MPTSAS_MAX_GUID_LEN)) {
15611                                 ddi_devid_free_guid(guid);
15612                                 guid = NULL;
15613                                 if (mpt->m_mpxio_enable == TRUE) {
15614                                         mptsas_log(mpt, CE_NOTE, "!Target:%x, "
15615                                             "lun:%x doesn't have a valid GUID, "
15616                                             "multipathing for this drive is "
15617                                             "not enabled", target, lun);
15618                                 }
15619                         }
15620 
15621                         /*
15622                          * devid no longer needed
15623                          */
15624                         ddi_devid_free(devid);
15625                         break;
15626                 } else if (rval == DDI_NOT_WELL_FORMED) {
15627                         /*
15628                          * return value of ddi_devid_scsi_encode equal to
15629                          * DDI_NOT_WELL_FORMED means DEVID_RETRY, it worth
15630                          * to retry inquiry page 0x83 and get GUID.
15631                          */
15632                         NDBG20(("Not well formed devid, retry..."));
15633                         delay(1 * drv_usectohz(1000000));
15634                         continue;
15635                 } else {
15636                         mptsas_log(mpt, CE_WARN, "!Encode devid failed for "
15637                             "path target:%x, lun:%x", target, lun);
15638                         rval = DDI_FAILURE;
15639                         goto create_lun;
15640                 }
15641         }
15642 
15643         if (i == mptsas_inq83_retry_timeout) {
15644                 mptsas_log(mpt, CE_WARN, "!Repeated page83 requests timeout "
15645                     "for path target:%x, lun:%x", target, lun);
15646         }
15647 
15648         rval = DDI_FAILURE;
15649 
15650 create_lun:
15651         if ((guid != NULL) && (mpt->m_mpxio_enable == TRUE)) {
15652                 rval = mptsas_create_virt_lun(pdip, sd_inq, guid, lun_dip, &pip,
15653                     ptgt, lun);
15654         }
15655         if (rval != DDI_SUCCESS) {
15656                 rval = mptsas_create_phys_lun(pdip, sd_inq, guid, lun_dip,
15657                     ptgt, lun);
15658 
15659         }
15660 out:
15661         if (guid != NULL) {
15662                 /*
15663                  * guid no longer needed
15664                  */
15665                 ddi_devid_free_guid(guid);
15666         }
15667         if (inq83 != NULL)
15668                 kmem_free(inq83, inq83_len1);
15669         return (rval);
15670 }
15671 
15672 static int
15673 mptsas_create_virt_lun(dev_info_t *pdip, struct scsi_inquiry *inq, char *guid,
15674     dev_info_t **lun_dip, mdi_pathinfo_t **pip, mptsas_target_t *ptgt, int lun)
15675 {
15676         int                     target;
15677         char                    *nodename = NULL;
15678         char                    **compatible = NULL;
15679         int                     ncompatible     = 0;
15680         int                     mdi_rtn = MDI_FAILURE;
15681         int                     rval = DDI_FAILURE;
15682         char                    *old_guid = NULL;
15683         mptsas_t                *mpt = DIP2MPT(pdip);
15684         char                    *lun_addr = NULL;
15685         char                    wwn_str[MPTSAS_WWN_STRLEN];
15686         char                    *component = NULL;
15687         uint8_t                 phy = 0xFF;
15688         uint64_t                sas_wwn;
15689         int64_t                 lun64 = 0;
15690         uint32_t                devinfo;
15691         uint16_t                dev_hdl;
15692         uint16_t                pdev_hdl;
15693         uint64_t                dev_sas_wwn;
15694         uint64_t                pdev_sas_wwn;
15695         uint32_t                pdev_info;
15696         uint8_t                 physport;
15697         uint8_t                 phy_id;
15698         uint32_t                page_address;
15699         uint16_t                bay_num, enclosure, io_flags;
15700         char                    pdev_wwn_str[MPTSAS_WWN_STRLEN];
15701         uint32_t                dev_info;
15702 
15703         mutex_enter(&mpt->m_mutex);
15704         target = ptgt->m_devhdl;
15705         sas_wwn = ptgt->m_addr.mta_wwn;
15706         devinfo = ptgt->m_deviceinfo;
15707         phy = ptgt->m_phynum;
15708         mutex_exit(&mpt->m_mutex);
15709 
15710         if (sas_wwn) {
15711                 *pip = mptsas_find_path_addr(pdip, sas_wwn, lun);
15712         } else {
15713                 *pip = mptsas_find_path_phy(pdip, phy);
15714         }
15715 
15716         if (*pip != NULL) {
15717                 *lun_dip = MDI_PI(*pip)->pi_client->ct_dip;
15718                 ASSERT(*lun_dip != NULL);
15719                 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, *lun_dip,
15720                     (DDI_PROP_DONTPASS | DDI_PROP_NOTPROM),
15721                     MDI_CLIENT_GUID_PROP, &old_guid) == DDI_SUCCESS) {
15722                         if (strncmp(guid, old_guid, strlen(guid)) == 0) {
15723                                 /*
15724                                  * Same path back online again.
15725                                  */
15726                                 (void) ddi_prop_free(old_guid);
15727                                 if ((!MDI_PI_IS_ONLINE(*pip)) &&
15728                                     (!MDI_PI_IS_STANDBY(*pip)) &&
15729                                     (ptgt->m_tgt_unconfigured == 0)) {
15730                                         rval = mdi_pi_online(*pip, 0);
15731                                         mutex_enter(&mpt->m_mutex);
15732                                         ptgt->m_led_status = 0;
15733                                         (void) mptsas_flush_led_status(mpt,
15734                                             ptgt);
15735                                         mutex_exit(&mpt->m_mutex);
15736                                 } else {
15737                                         rval = DDI_SUCCESS;
15738                                 }
15739                                 if (rval != DDI_SUCCESS) {
15740                                         mptsas_log(mpt, CE_WARN, "path:target: "
15741                                             "%x, lun:%x online failed!", target,
15742                                             lun);
15743                                         *pip = NULL;
15744                                         *lun_dip = NULL;
15745                                 }
15746                                 return (rval);
15747                         } else {
15748                                 /*
15749                                  * The GUID of the LUN has changed which maybe
15750                                  * because customer mapped another volume to the
15751                                  * same LUN.
15752                                  */
15753                                 mptsas_log(mpt, CE_WARN, "The GUID of the "
15754                                     "target:%x, lun:%x was changed, maybe "
15755                                     "because someone mapped another volume "
15756                                     "to the same LUN", target, lun);
15757                                 (void) ddi_prop_free(old_guid);
15758                                 if (!MDI_PI_IS_OFFLINE(*pip)) {
15759                                         rval = mdi_pi_offline(*pip, 0);
15760                                         if (rval != MDI_SUCCESS) {
15761                                                 mptsas_log(mpt, CE_WARN, "path:"
15762                                                     "target:%x, lun:%x offline "
15763                                                     "failed!", target, lun);
15764                                                 *pip = NULL;
15765                                                 *lun_dip = NULL;
15766                                                 return (DDI_FAILURE);
15767                                         }
15768                                 }
15769                                 if (mdi_pi_free(*pip, 0) != MDI_SUCCESS) {
15770                                         mptsas_log(mpt, CE_WARN, "path:target:"
15771                                             "%x, lun:%x free failed!", target,
15772                                             lun);
15773                                         *pip = NULL;
15774                                         *lun_dip = NULL;
15775                                         return (DDI_FAILURE);
15776                                 }
15777                         }
15778                 } else {
15779                         mptsas_log(mpt, CE_WARN, "Can't get client-guid "
15780                             "property for path:target:%x, lun:%x", target, lun);
15781                         *pip = NULL;
15782                         *lun_dip = NULL;
15783                         return (DDI_FAILURE);
15784                 }
15785         }
15786         scsi_hba_nodename_compatible_get(inq, NULL,
15787             inq->inq_dtype, NULL, &nodename, &compatible, &ncompatible);
15788 
15789         /*
15790          * if nodename can't be determined then print a message and skip it
15791          */
15792         if (nodename == NULL) {
15793                 mptsas_log(mpt, CE_WARN, "found no compatible "
15794                     "driver for target%d lun %d dtype:0x%02x", target, lun,
15795                     inq->inq_dtype);
15796                 return (DDI_FAILURE);
15797         }
15798 
15799         /* The property is needed by MPAPI */
15800         (void) sprintf(wwn_str, "%016"PRIx64, sas_wwn);
15801 
15802         lun_addr = kmem_zalloc(SCSI_MAXNAMELEN, KM_SLEEP);
15803         if (guid) {
15804                 (void) sprintf(lun_addr, "w%s,%x", wwn_str, lun);
15805                 (void) sprintf(wwn_str, "w%016"PRIx64, sas_wwn);
15806         } else {
15807                 (void) sprintf(lun_addr, "p%x,%x", phy, lun);
15808                 (void) sprintf(wwn_str, "p%x", phy);
15809         }
15810 
15811         mdi_rtn = mdi_pi_alloc_compatible(pdip, nodename,
15812             guid, lun_addr, compatible, ncompatible,
15813             0, pip);
15814         if (mdi_rtn == MDI_SUCCESS) {
15815 
15816                 if (mdi_prop_update_string(*pip, MDI_GUID,
15817                     guid) != DDI_SUCCESS) {
15818                         mptsas_log(mpt, CE_WARN, "unable to "
15819                             "create prop for target %d lun %d (MDI_GUID)",
15820                             target, lun);
15821                         mdi_rtn = MDI_FAILURE;
15822                         goto virt_create_done;
15823                 }
15824 
15825                 if (mdi_prop_update_int(*pip, LUN_PROP,
15826                     lun) != DDI_SUCCESS) {
15827                         mptsas_log(mpt, CE_WARN, "unable to "
15828                             "create prop for target %d lun %d (LUN_PROP)",
15829                             target, lun);
15830                         mdi_rtn = MDI_FAILURE;
15831                         goto virt_create_done;
15832                 }
15833                 lun64 = (int64_t)lun;
15834                 if (mdi_prop_update_int64(*pip, LUN64_PROP,
15835                     lun64) != DDI_SUCCESS) {
15836                         mptsas_log(mpt, CE_WARN, "unable to "
15837                             "create prop for target %d (LUN64_PROP)",
15838                             target);
15839                         mdi_rtn = MDI_FAILURE;
15840                         goto virt_create_done;
15841                 }
15842                 if (mdi_prop_update_string_array(*pip, "compatible",
15843                     compatible, ncompatible) !=
15844                     DDI_PROP_SUCCESS) {
15845                         mptsas_log(mpt, CE_WARN, "unable to "
15846                             "create prop for target %d lun %d (COMPATIBLE)",
15847                             target, lun);
15848                         mdi_rtn = MDI_FAILURE;
15849                         goto virt_create_done;
15850                 }
15851                 if (sas_wwn && (mdi_prop_update_string(*pip,
15852                     SCSI_ADDR_PROP_TARGET_PORT, wwn_str) != DDI_PROP_SUCCESS)) {
15853                         mptsas_log(mpt, CE_WARN, "unable to "
15854                             "create prop for target %d lun %d "
15855                             "(target-port)", target, lun);
15856                         mdi_rtn = MDI_FAILURE;
15857                         goto virt_create_done;
15858                 } else if ((sas_wwn == 0) && (mdi_prop_update_int(*pip,
15859                     "sata-phy", phy) != DDI_PROP_SUCCESS)) {
15860                         /*
15861                          * Direct attached SATA device without DeviceName
15862                          */
15863                         mptsas_log(mpt, CE_WARN, "unable to "
15864                             "create prop for SAS target %d lun %d "
15865                             "(sata-phy)", target, lun);
15866                         mdi_rtn = MDI_FAILURE;
15867                         goto virt_create_done;
15868                 }
15869                 mutex_enter(&mpt->m_mutex);
15870 
15871                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
15872                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15873                     (uint32_t)ptgt->m_devhdl;
15874                 rval = mptsas_get_sas_device_page0(mpt, page_address,
15875                     &dev_hdl, &dev_sas_wwn, &dev_info, &physport,
15876                     &phy_id, &pdev_hdl, &bay_num, &enclosure, &io_flags);
15877                 if (rval != DDI_SUCCESS) {
15878                         mutex_exit(&mpt->m_mutex);
15879                         mptsas_log(mpt, CE_WARN, "mptsas unable to get "
15880                             "parent device for handle %d", page_address);
15881                         mdi_rtn = MDI_FAILURE;
15882                         goto virt_create_done;
15883                 }
15884 
15885                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
15886                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) | (uint32_t)pdev_hdl;
15887                 rval = mptsas_get_sas_device_page0(mpt, page_address,
15888                     &dev_hdl, &pdev_sas_wwn, &pdev_info, &physport,
15889                     &phy_id, &pdev_hdl, &bay_num, &enclosure, &io_flags);
15890                 if (rval != DDI_SUCCESS) {
15891                         mutex_exit(&mpt->m_mutex);
15892                         mptsas_log(mpt, CE_WARN, "mptsas unable to get"
15893                             "device info for handle %d", page_address);
15894                         mdi_rtn = MDI_FAILURE;
15895                         goto virt_create_done;
15896                 }
15897 
15898                 mutex_exit(&mpt->m_mutex);
15899 
15900                 /*
15901                  * If this device direct attached to the controller
15902                  * set the attached-port to the base wwid
15903                  */
15904                 if ((ptgt->m_deviceinfo & DEVINFO_DIRECT_ATTACHED)
15905                     != DEVINFO_DIRECT_ATTACHED) {
15906                         (void) sprintf(pdev_wwn_str, "w%016"PRIx64,
15907                             pdev_sas_wwn);
15908                 } else {
15909                         /*
15910                          * Update the iport's attached-port to guid
15911                          */
15912                         if (sas_wwn == 0) {
15913                                 (void) sprintf(wwn_str, "p%x", phy);
15914                         } else {
15915                                 (void) sprintf(wwn_str, "w%016"PRIx64, sas_wwn);
15916                         }
15917                         if (ddi_prop_update_string(DDI_DEV_T_NONE,
15918                             pdip, SCSI_ADDR_PROP_ATTACHED_PORT, wwn_str) !=
15919                             DDI_PROP_SUCCESS) {
15920                                 mptsas_log(mpt, CE_WARN,
15921                                     "mptsas unable to create "
15922                                     "property for iport target-port"
15923                                     " %s (sas_wwn)",
15924                                     wwn_str);
15925                                 mdi_rtn = MDI_FAILURE;
15926                                 goto virt_create_done;
15927                         }
15928 
15929                         (void) sprintf(pdev_wwn_str, "w%016"PRIx64,
15930                             mpt->un.m_base_wwid);
15931                 }
15932 
15933                 if (mdi_prop_update_string(*pip,
15934                     SCSI_ADDR_PROP_ATTACHED_PORT, pdev_wwn_str) !=
15935                     DDI_PROP_SUCCESS) {
15936                         mptsas_log(mpt, CE_WARN, "unable to create "
15937                             "property for iport attached-port %s (sas_wwn)",
15938                             pdev_wwn_str);
15939                         mdi_rtn = MDI_FAILURE;
15940                         goto virt_create_done;
15941                 }
15942 
15943 
15944                 if (inq->inq_dtype == 0) {
15945                         component = kmem_zalloc(MAXPATHLEN, KM_SLEEP);
15946                         /*
15947                          * set obp path for pathinfo
15948                          */
15949                         (void) snprintf(component, MAXPATHLEN,
15950                             "disk@%s", lun_addr);
15951 
15952                         if (mdi_pi_pathname_obp_set(*pip, component) !=
15953                             DDI_SUCCESS) {
15954                                 mptsas_log(mpt, CE_WARN,
15955                                     "unable to set obp-path for object %s",
15956                                     component);
15957                                 mdi_rtn = MDI_FAILURE;
15958                                 goto virt_create_done;
15959                         }
15960                 }
15961 
15962                 *lun_dip = MDI_PI(*pip)->pi_client->ct_dip;
15963                 if (devinfo & (MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
15964                     MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15965                         if ((ndi_prop_update_int(DDI_DEV_T_NONE, *lun_dip,
15966                             "pm-capable", 1)) !=
15967                             DDI_PROP_SUCCESS) {
15968                                 mptsas_log(mpt, CE_WARN,
15969                                     "failed to create pm-capable "
15970                                     "property, target %d", target);
15971                                 mdi_rtn = MDI_FAILURE;
15972                                 goto virt_create_done;
15973                         }
15974                 }
15975                 /*
15976                  * Create the phy-num property
15977                  */
15978                 if (mdi_prop_update_int(*pip, "phy-num",
15979                     ptgt->m_phynum) != DDI_SUCCESS) {
15980                         mptsas_log(mpt, CE_WARN, "unable to "
15981                             "create phy-num property for target %d lun %d",
15982                             target, lun);
15983                         mdi_rtn = MDI_FAILURE;
15984                         goto virt_create_done;
15985                 }
15986                 NDBG20(("new path:%s onlining,", MDI_PI(*pip)->pi_addr));
15987                 mdi_rtn = mdi_pi_online(*pip, 0);
15988                 if (mdi_rtn == MDI_SUCCESS) {
15989                         mutex_enter(&mpt->m_mutex);
15990                         ptgt->m_led_status = 0;
15991                         (void) mptsas_flush_led_status(mpt, ptgt);
15992                         mutex_exit(&mpt->m_mutex);
15993                 }
15994                 if (mdi_rtn == MDI_NOT_SUPPORTED) {
15995                         mdi_rtn = MDI_FAILURE;
15996                 }
15997 virt_create_done:
15998                 if (*pip && mdi_rtn != MDI_SUCCESS) {
15999                         (void) mdi_pi_free(*pip, 0);
16000                         *pip = NULL;
16001                         *lun_dip = NULL;
16002                 }
16003         }
16004 
16005         scsi_hba_nodename_compatible_free(nodename, compatible);
16006         if (lun_addr != NULL) {
16007                 kmem_free(lun_addr, SCSI_MAXNAMELEN);
16008         }
16009         if (component != NULL) {
16010                 kmem_free(component, MAXPATHLEN);
16011         }
16012 
16013         return ((mdi_rtn == MDI_SUCCESS) ? DDI_SUCCESS : DDI_FAILURE);
16014 }
16015 
16016 static int
16017 mptsas_create_phys_lun(dev_info_t *pdip, struct scsi_inquiry *inq,
16018     char *guid, dev_info_t **lun_dip, mptsas_target_t *ptgt, int lun)
16019 {
16020         int                     target;
16021         int                     rval;
16022         int                     ndi_rtn = NDI_FAILURE;
16023         uint64_t                be_sas_wwn;
16024         char                    *nodename = NULL;
16025         char                    **compatible = NULL;
16026         int                     ncompatible = 0;
16027         int                     instance = 0;
16028         mptsas_t                *mpt = DIP2MPT(pdip);
16029         char                    wwn_str[MPTSAS_WWN_STRLEN];
16030         char                    component[MAXPATHLEN];
16031         uint8_t                 phy = 0xFF;
16032         uint64_t                sas_wwn;
16033         uint32_t                devinfo;
16034         uint16_t                dev_hdl;
16035         uint16_t                pdev_hdl;
16036         uint64_t                pdev_sas_wwn;
16037         uint64_t                dev_sas_wwn;
16038         uint32_t                pdev_info;
16039         uint8_t                 physport;
16040         uint8_t                 phy_id;
16041         uint32_t                page_address;
16042         uint16_t                bay_num, enclosure, io_flags;
16043         char                    pdev_wwn_str[MPTSAS_WWN_STRLEN];
16044         uint32_t                dev_info;
16045         int64_t                 lun64 = 0;
16046 
16047         mutex_enter(&mpt->m_mutex);
16048         target = ptgt->m_devhdl;
16049         sas_wwn = ptgt->m_addr.mta_wwn;
16050         devinfo = ptgt->m_deviceinfo;
16051         phy = ptgt->m_phynum;
16052         mutex_exit(&mpt->m_mutex);
16053 
16054         /*
16055          * generate compatible property with binding-set "mpt"
16056          */
16057         scsi_hba_nodename_compatible_get(inq, NULL, inq->inq_dtype, NULL,
16058             &nodename, &compatible, &ncompatible);
16059 
16060         /*
16061          * if nodename can't be determined then print a message and skip it
16062          */
16063         if (nodename == NULL) {
16064                 mptsas_log(mpt, CE_WARN, "mptsas found no compatible driver "
16065                     "for target %d lun %d", target, lun);
16066                 return (DDI_FAILURE);
16067         }
16068 
16069         ndi_rtn = ndi_devi_alloc(pdip, nodename,
16070             DEVI_SID_NODEID, lun_dip);
16071 
16072         /*
16073          * if lun alloc success, set props
16074          */
16075         if (ndi_rtn == NDI_SUCCESS) {
16076 
16077                 if (ndi_prop_update_int(DDI_DEV_T_NONE,
16078                     *lun_dip, LUN_PROP, lun) !=
16079                     DDI_PROP_SUCCESS) {
16080                         mptsas_log(mpt, CE_WARN, "mptsas unable to create "
16081                             "property for target %d lun %d (LUN_PROP)",
16082                             target, lun);
16083                         ndi_rtn = NDI_FAILURE;
16084                         goto phys_create_done;
16085                 }
16086 
16087                 lun64 = (int64_t)lun;
16088                 if (ndi_prop_update_int64(DDI_DEV_T_NONE,
16089                     *lun_dip, LUN64_PROP, lun64) !=
16090                     DDI_PROP_SUCCESS) {
16091                         mptsas_log(mpt, CE_WARN, "mptsas unable to create "
16092                             "property for target %d lun64 %d (LUN64_PROP)",
16093                             target, lun);
16094                         ndi_rtn = NDI_FAILURE;
16095                         goto phys_create_done;
16096                 }
16097                 if (ndi_prop_update_string_array(DDI_DEV_T_NONE,
16098                     *lun_dip, "compatible", compatible, ncompatible)
16099                     != DDI_PROP_SUCCESS) {
16100                         mptsas_log(mpt, CE_WARN, "mptsas unable to create "
16101                             "property for target %d lun %d (COMPATIBLE)",
16102                             target, lun);
16103                         ndi_rtn = NDI_FAILURE;
16104                         goto phys_create_done;
16105                 }
16106 
16107                 /*
16108                  * We need the SAS WWN for non-multipath devices, so
16109                  * we'll use the same property as that multipathing
16110                  * devices need to present for MPAPI. If we don't have
16111                  * a WWN (e.g. parallel SCSI), don't create the prop.
16112                  */
16113                 (void) sprintf(wwn_str, "w%016"PRIx64, sas_wwn);
16114                 if (sas_wwn && ndi_prop_update_string(DDI_DEV_T_NONE,
16115                     *lun_dip, SCSI_ADDR_PROP_TARGET_PORT, wwn_str)
16116                     != DDI_PROP_SUCCESS) {
16117                         mptsas_log(mpt, CE_WARN, "mptsas unable to "
16118                             "create property for SAS target %d lun %d "
16119                             "(target-port)", target, lun);
16120                         ndi_rtn = NDI_FAILURE;
16121                         goto phys_create_done;
16122                 }
16123 
16124                 be_sas_wwn = BE_64(sas_wwn);
16125                 if (sas_wwn && ndi_prop_update_byte_array(
16126                     DDI_DEV_T_NONE, *lun_dip, "port-wwn",
16127                     (uchar_t *)&be_sas_wwn, 8) != DDI_PROP_SUCCESS) {
16128                         mptsas_log(mpt, CE_WARN, "mptsas unable to "
16129                             "create property for SAS target %d lun %d "
16130                             "(port-wwn)", target, lun);
16131                         ndi_rtn = NDI_FAILURE;
16132                         goto phys_create_done;
16133                 } else if ((sas_wwn == 0) && (ndi_prop_update_int(
16134                     DDI_DEV_T_NONE, *lun_dip, "sata-phy", phy) !=
16135                     DDI_PROP_SUCCESS)) {
16136                         /*
16137                          * Direct attached SATA device without DeviceName
16138                          */
16139                         mptsas_log(mpt, CE_WARN, "mptsas unable to "
16140                             "create property for SAS target %d lun %d "
16141                             "(sata-phy)", target, lun);
16142                         ndi_rtn = NDI_FAILURE;
16143                         goto phys_create_done;
16144                 }
16145 
16146                 if (ndi_prop_create_boolean(DDI_DEV_T_NONE,
16147                     *lun_dip, SAS_PROP) != DDI_PROP_SUCCESS) {
16148                         mptsas_log(mpt, CE_WARN, "mptsas unable to"
16149                             "create property for SAS target %d lun %d"
16150                             " (SAS_PROP)", target, lun);
16151                         ndi_rtn = NDI_FAILURE;
16152                         goto phys_create_done;
16153                 }
16154                 if (guid && (ndi_prop_update_string(DDI_DEV_T_NONE,
16155                     *lun_dip, NDI_GUID, guid) != DDI_SUCCESS)) {
16156                         mptsas_log(mpt, CE_WARN, "mptsas unable "
16157                             "to create guid property for target %d "
16158                             "lun %d", target, lun);
16159                         ndi_rtn = NDI_FAILURE;
16160                         goto phys_create_done;
16161                 }
16162 
16163                 /*
16164                  * The following code is to set properties for SM-HBA support,
16165                  * it doesn't apply to RAID volumes
16166                  */
16167                 if (ptgt->m_addr.mta_phymask == 0)
16168                         goto phys_raid_lun;
16169 
16170                 mutex_enter(&mpt->m_mutex);
16171 
16172                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
16173                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
16174                     (uint32_t)ptgt->m_devhdl;
16175                 rval = mptsas_get_sas_device_page0(mpt, page_address,
16176                     &dev_hdl, &dev_sas_wwn, &dev_info,
16177                     &physport, &phy_id, &pdev_hdl,
16178                     &bay_num, &enclosure, &io_flags);
16179                 if (rval != DDI_SUCCESS) {
16180                         mutex_exit(&mpt->m_mutex);
16181                         mptsas_log(mpt, CE_WARN, "mptsas unable to get"
16182                             "parent device for handle %d.", page_address);
16183                         ndi_rtn = NDI_FAILURE;
16184                         goto phys_create_done;
16185                 }
16186 
16187                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
16188                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) | (uint32_t)pdev_hdl;
16189                 rval = mptsas_get_sas_device_page0(mpt, page_address,
16190                     &dev_hdl, &pdev_sas_wwn, &pdev_info, &physport,
16191                     &phy_id, &pdev_hdl, &bay_num, &enclosure, &io_flags);
16192                 if (rval != DDI_SUCCESS) {
16193                         mutex_exit(&mpt->m_mutex);
16194                         mptsas_log(mpt, CE_WARN, "mptsas unable to create "
16195                             "device for handle %d.", page_address);
16196                         ndi_rtn = NDI_FAILURE;
16197                         goto phys_create_done;
16198                 }
16199 
16200                 mutex_exit(&mpt->m_mutex);
16201 
16202                 /*
16203                  * If this device direct attached to the controller
16204                  * set the attached-port to the base wwid
16205                  */
16206                 if ((ptgt->m_deviceinfo & DEVINFO_DIRECT_ATTACHED)
16207                     != DEVINFO_DIRECT_ATTACHED) {
16208                         (void) sprintf(pdev_wwn_str, "w%016"PRIx64,
16209                             pdev_sas_wwn);
16210                 } else {
16211                         /*
16212                          * Update the iport's attached-port to guid
16213                          */
16214                         if (sas_wwn == 0) {
16215                                 (void) sprintf(wwn_str, "p%x", phy);
16216                         } else {
16217                                 (void) sprintf(wwn_str, "w%016"PRIx64, sas_wwn);
16218                         }
16219                         if (ddi_prop_update_string(DDI_DEV_T_NONE,
16220                             pdip, SCSI_ADDR_PROP_ATTACHED_PORT, wwn_str) !=
16221                             DDI_PROP_SUCCESS) {
16222                                 mptsas_log(mpt, CE_WARN,
16223                                     "mptsas unable to create "
16224                                     "property for iport target-port"
16225                                     " %s (sas_wwn)",
16226                                     wwn_str);
16227                                 ndi_rtn = NDI_FAILURE;
16228                                 goto phys_create_done;
16229                         }
16230 
16231                         (void) sprintf(pdev_wwn_str, "w%016"PRIx64,
16232                             mpt->un.m_base_wwid);
16233                 }
16234 
16235                 if (ndi_prop_update_string(DDI_DEV_T_NONE,
16236                     *lun_dip, SCSI_ADDR_PROP_ATTACHED_PORT, pdev_wwn_str) !=
16237                     DDI_PROP_SUCCESS) {
16238                         mptsas_log(mpt, CE_WARN,
16239                             "mptsas unable to create "
16240                             "property for iport attached-port %s (sas_wwn)",
16241                             pdev_wwn_str);
16242                         ndi_rtn = NDI_FAILURE;
16243                         goto phys_create_done;
16244                 }
16245 
16246                 if (IS_SATA_DEVICE(dev_info)) {
16247                         if (ndi_prop_update_string(DDI_DEV_T_NONE,
16248                             *lun_dip, MPTSAS_VARIANT, "sata") !=
16249                             DDI_PROP_SUCCESS) {
16250                                 mptsas_log(mpt, CE_WARN,
16251                                     "mptsas unable to create "
16252                                     "property for device variant ");
16253                                 ndi_rtn = NDI_FAILURE;
16254                                 goto phys_create_done;
16255                         }
16256                 }
16257 
16258                 if (IS_ATAPI_DEVICE(dev_info)) {
16259                         if (ndi_prop_update_string(DDI_DEV_T_NONE,
16260                             *lun_dip, MPTSAS_VARIANT, "atapi") !=
16261                             DDI_PROP_SUCCESS) {
16262                                 mptsas_log(mpt, CE_WARN,
16263                                     "mptsas unable to create "
16264                                     "property for device variant ");
16265                                 ndi_rtn = NDI_FAILURE;
16266                                 goto phys_create_done;
16267                         }
16268                 }
16269 
16270 phys_raid_lun:
16271                 /*
16272                  * if this is a SAS controller, and the target is a SATA
16273                  * drive, set the 'pm-capable' property for sd and if on
16274                  * an OPL platform, also check if this is an ATAPI
16275                  * device.
16276                  */
16277                 instance = ddi_get_instance(mpt->m_dip);
16278                 if (devinfo & (MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
16279                     MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
16280                         NDBG2(("mptsas3%d: creating pm-capable property, "
16281                             "target %d", instance, target));
16282 
16283                         if ((ndi_prop_update_int(DDI_DEV_T_NONE,
16284                             *lun_dip, "pm-capable", 1)) !=
16285                             DDI_PROP_SUCCESS) {
16286                                 mptsas_log(mpt, CE_WARN, "mptsas "
16287                                     "failed to create pm-capable "
16288                                     "property, target %d", target);
16289                                 ndi_rtn = NDI_FAILURE;
16290                                 goto phys_create_done;
16291                         }
16292 
16293                 }
16294 
16295                 if ((inq->inq_dtype == 0) || (inq->inq_dtype == 5)) {
16296                         /*
16297                          * add 'obp-path' properties for devinfo
16298                          */
16299                         bzero(wwn_str, sizeof (wwn_str));
16300                         (void) sprintf(wwn_str, "%016"PRIx64, sas_wwn);
16301                         if (guid) {
16302                                 (void) snprintf(component, MAXPATHLEN,
16303                                     "disk@w%s,%x", wwn_str, lun);
16304                         } else {
16305                                 (void) snprintf(component, MAXPATHLEN,
16306                                     "disk@p%x,%x", phy, lun);
16307                         }
16308                         if (ddi_pathname_obp_set(*lun_dip, component)
16309                             != DDI_SUCCESS) {
16310                                 mptsas_log(mpt, CE_WARN, "mpt_sas driver "
16311                                     "unable to set obp-path for SAS "
16312                                     "object %s", component);
16313                                 ndi_rtn = NDI_FAILURE;
16314                                 goto phys_create_done;
16315                         }
16316                 }
16317                 /*
16318                  * Create the phy-num property for non-raid disk
16319                  */
16320                 if (ptgt->m_addr.mta_phymask != 0) {
16321                         if (ndi_prop_update_int(DDI_DEV_T_NONE,
16322                             *lun_dip, "phy-num", ptgt->m_phynum) !=
16323                             DDI_PROP_SUCCESS) {
16324                                 mptsas_log(mpt, CE_WARN,
16325                                     "failed to create phy-num property for "
16326                                     "target %d", target);
16327                                 ndi_rtn = NDI_FAILURE;
16328                                 goto phys_create_done;
16329                         }
16330                 }
16331 phys_create_done:
16332                 /*
16333                  * If props were setup ok, online the lun
16334                  */
16335                 if (ndi_rtn == NDI_SUCCESS) {
16336                         /*
16337                          * Try to online the new node
16338                          */
16339                         ndi_rtn = ndi_devi_online(*lun_dip, NDI_ONLINE_ATTACH);
16340                 }
16341                 if (ndi_rtn == NDI_SUCCESS) {
16342                         mutex_enter(&mpt->m_mutex);
16343                         ptgt->m_led_status = 0;
16344                         (void) mptsas_flush_led_status(mpt, ptgt);
16345                         mutex_exit(&mpt->m_mutex);
16346                 }
16347 
16348                 /*
16349                  * If success set rtn flag, else unwire alloc'd lun
16350                  */
16351                 if (ndi_rtn != NDI_SUCCESS) {
16352                         NDBG12(("unable to online "
16353                             "target %d lun %d", target, lun));
16354                         ndi_prop_remove_all(*lun_dip);
16355                         (void) ndi_devi_free(*lun_dip);
16356                         *lun_dip = NULL;
16357                 }
16358         }
16359 
16360         scsi_hba_nodename_compatible_free(nodename, compatible);
16361 
16362         return ((ndi_rtn == NDI_SUCCESS) ? DDI_SUCCESS : DDI_FAILURE);
16363 }
16364 
16365 static int
16366 mptsas_probe_smp(dev_info_t *pdip, uint64_t wwn)
16367 {
16368         mptsas_t        *mpt = DIP2MPT(pdip);
16369         struct smp_device smp_sd;
16370 
16371         /* XXX An HBA driver should not be allocating an smp_device. */
16372         bzero(&smp_sd, sizeof (struct smp_device));
16373         smp_sd.smp_sd_address.smp_a_hba_tran = mpt->m_smptran;
16374         bcopy(&wwn, smp_sd.smp_sd_address.smp_a_wwn, SAS_WWN_BYTE_SIZE);
16375 
16376         if (smp_probe(&smp_sd) != DDI_PROBE_SUCCESS)
16377                 return (NDI_FAILURE);
16378         return (NDI_SUCCESS);
16379 }
16380 
16381 static int
16382 mptsas_config_smp(dev_info_t *pdip, uint64_t sas_wwn, dev_info_t **smp_dip)
16383 {
16384         mptsas_t        *mpt = DIP2MPT(pdip);
16385         mptsas_smp_t    *psmp = NULL;
16386         int             rval;
16387         int             phymask;
16388 
16389         /*
16390          * Get the physical port associated to the iport
16391          * PHYMASK TODO
16392          */
16393         phymask = ddi_prop_get_int(DDI_DEV_T_ANY, pdip, 0,
16394             "phymask", 0);
16395         /*
16396          * Find the smp node in hash table with specified sas address and
16397          * physical port
16398          */
16399         psmp = mptsas_wwid_to_psmp(mpt, phymask, sas_wwn);
16400         if (psmp == NULL) {
16401                 return (DDI_FAILURE);
16402         }
16403 
16404         rval = mptsas_online_smp(pdip, psmp, smp_dip);
16405 
16406         return (rval);
16407 }
16408 
16409 static int
16410 mptsas_online_smp(dev_info_t *pdip, mptsas_smp_t *smp_node,
16411     dev_info_t **smp_dip)
16412 {
16413         char            wwn_str[MPTSAS_WWN_STRLEN];
16414         char            attached_wwn_str[MPTSAS_WWN_STRLEN];
16415         int             ndi_rtn = NDI_FAILURE;
16416         int             rval = 0;
16417         mptsas_smp_t    dev_info;
16418         uint32_t        page_address;
16419         mptsas_t        *mpt = DIP2MPT(pdip);
16420         uint16_t        dev_hdl;
16421         uint64_t        sas_wwn;
16422         uint64_t        smp_sas_wwn;
16423         uint8_t         physport;
16424         uint8_t         phy_id;
16425         uint16_t        pdev_hdl;
16426         uint8_t         numphys = 0;
16427         uint16_t        i = 0;
16428         char            phymask[MPTSAS_MAX_PHYS];
16429         char            *iport = NULL;
16430         mptsas_phymask_t        phy_mask = 0;
16431         uint16_t        attached_devhdl;
16432         uint16_t        bay_num, enclosure, io_flags;
16433 
16434         (void) sprintf(wwn_str, "%"PRIx64, smp_node->m_addr.mta_wwn);
16435 
16436         /*
16437          * Probe smp device, prevent the node of removed device from being
16438          * configured succesfully
16439          */
16440         if (mptsas_probe_smp(pdip, smp_node->m_addr.mta_wwn) != NDI_SUCCESS) {
16441                 return (DDI_FAILURE);
16442         }
16443 
16444         if ((*smp_dip = mptsas_find_smp_child(pdip, wwn_str)) != NULL) {
16445                 return (DDI_SUCCESS);
16446         }
16447 
16448         ndi_rtn = ndi_devi_alloc(pdip, "smp", DEVI_SID_NODEID, smp_dip);
16449 
16450         /*
16451          * if lun alloc success, set props
16452          */
16453         if (ndi_rtn == NDI_SUCCESS) {
16454                 /*
16455                  * Set the flavor of the child to be SMP flavored
16456                  */
16457                 ndi_flavor_set(*smp_dip, SCSA_FLAVOR_SMP);
16458 
16459                 if (ndi_prop_update_string(DDI_DEV_T_NONE,
16460                     *smp_dip, SMP_WWN, wwn_str) !=
16461                     DDI_PROP_SUCCESS) {
16462                         mptsas_log(mpt, CE_WARN, "mptsas unable to create "
16463                             "property for smp device %s (sas_wwn)",
16464                             wwn_str);
16465                         ndi_rtn = NDI_FAILURE;
16466                         goto smp_create_done;
16467                 }
16468                 (void) sprintf(wwn_str, "w%"PRIx64, smp_node->m_addr.mta_wwn);
16469                 if (ndi_prop_update_string(DDI_DEV_T_NONE,
16470                     *smp_dip, SCSI_ADDR_PROP_TARGET_PORT, wwn_str) !=
16471                     DDI_PROP_SUCCESS) {
16472                         mptsas_log(mpt, CE_WARN, "mptsas unable to create "
16473                             "property for iport target-port %s (sas_wwn)",
16474                             wwn_str);
16475                         ndi_rtn = NDI_FAILURE;
16476                         goto smp_create_done;
16477                 }
16478 
16479                 mutex_enter(&mpt->m_mutex);
16480 
16481                 page_address = (MPI2_SAS_EXPAND_PGAD_FORM_HNDL &
16482                     MPI2_SAS_EXPAND_PGAD_FORM_MASK) | smp_node->m_devhdl;
16483                 rval = mptsas_get_sas_expander_page0(mpt, page_address,
16484                     &dev_info);
16485                 if (rval != DDI_SUCCESS) {
16486                         mutex_exit(&mpt->m_mutex);
16487                         mptsas_log(mpt, CE_WARN,
16488                             "mptsas unable to get expander "
16489                             "parent device info for %x", page_address);
16490                         ndi_rtn = NDI_FAILURE;
16491                         goto smp_create_done;
16492                 }
16493 
16494                 smp_node->m_pdevhdl = dev_info.m_pdevhdl;
16495                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
16496                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
16497                     (uint32_t)dev_info.m_pdevhdl;
16498                 rval = mptsas_get_sas_device_page0(mpt, page_address,
16499                     &dev_hdl, &sas_wwn, &smp_node->m_pdevinfo, &physport,
16500                     &phy_id, &pdev_hdl, &bay_num, &enclosure, &io_flags);
16501                 if (rval != DDI_SUCCESS) {
16502                         mutex_exit(&mpt->m_mutex);
16503                         mptsas_log(mpt, CE_WARN, "mptsas unable to get "
16504                             "device info for %x", page_address);
16505                         ndi_rtn = NDI_FAILURE;
16506                         goto smp_create_done;
16507                 }
16508 
16509                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_HANDLE &
16510                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
16511                     (uint32_t)dev_info.m_devhdl;
16512                 rval = mptsas_get_sas_device_page0(mpt, page_address,
16513                     &dev_hdl, &smp_sas_wwn, &smp_node->m_deviceinfo,
16514                     &physport, &phy_id, &pdev_hdl, &bay_num, &enclosure,
16515                     &io_flags);
16516                 if (rval != DDI_SUCCESS) {
16517                         mutex_exit(&mpt->m_mutex);
16518                         mptsas_log(mpt, CE_WARN, "mptsas unable to get "
16519                             "device info for %x", page_address);
16520                         ndi_rtn = NDI_FAILURE;
16521                         goto smp_create_done;
16522                 }
16523                 mutex_exit(&mpt->m_mutex);
16524 
16525                 /*
16526                  * If this smp direct attached to the controller
16527                  * set the attached-port to the base wwid
16528                  */
16529                 if ((smp_node->m_deviceinfo & DEVINFO_DIRECT_ATTACHED)
16530                     != DEVINFO_DIRECT_ATTACHED) {
16531                         (void) sprintf(attached_wwn_str, "w%016"PRIx64,
16532                             sas_wwn);
16533                 } else {
16534                         (void) sprintf(attached_wwn_str, "w%016"PRIx64,
16535                             mpt->un.m_base_wwid);
16536                 }
16537 
16538                 if (ndi_prop_update_string(DDI_DEV_T_NONE,
16539                     *smp_dip, SCSI_ADDR_PROP_ATTACHED_PORT, attached_wwn_str) !=
16540                     DDI_PROP_SUCCESS) {
16541                         mptsas_log(mpt, CE_WARN, "mptsas unable to create "
16542                             "property for smp attached-port %s (sas_wwn)",
16543                             attached_wwn_str);
16544                         ndi_rtn = NDI_FAILURE;
16545                         goto smp_create_done;
16546                 }
16547 
16548                 if (ndi_prop_create_boolean(DDI_DEV_T_NONE,
16549                     *smp_dip, SMP_PROP) != DDI_PROP_SUCCESS) {
16550                         mptsas_log(mpt, CE_WARN, "mptsas unable to "
16551                             "create property for SMP %s (SMP_PROP) ",
16552                             wwn_str);
16553                         ndi_rtn = NDI_FAILURE;
16554                         goto smp_create_done;
16555                 }
16556 
16557                 /*
16558                  * check the smp to see whether it direct
16559                  * attached to the controller
16560                  */
16561                 if ((smp_node->m_deviceinfo & DEVINFO_DIRECT_ATTACHED)
16562                     != DEVINFO_DIRECT_ATTACHED) {
16563                         goto smp_create_done;
16564                 }
16565                 numphys = ddi_prop_get_int(DDI_DEV_T_ANY, pdip,
16566                     DDI_PROP_DONTPASS, MPTSAS_NUM_PHYS, -1);
16567                 if (numphys > 0) {
16568                         goto smp_create_done;
16569                 }
16570                 /*
16571                  * this iport is an old iport, we need to
16572                  * reconfig the props for it.
16573                  */
16574                 if (ddi_prop_update_int(DDI_DEV_T_NONE, pdip,
16575                     MPTSAS_VIRTUAL_PORT, 0) !=
16576                     DDI_PROP_SUCCESS) {
16577                         (void) ddi_prop_remove(DDI_DEV_T_NONE, pdip,
16578                             MPTSAS_VIRTUAL_PORT);
16579                         mptsas_log(mpt, CE_WARN, "mptsas virtual port "
16580                             "prop update failed");
16581                         goto smp_create_done;
16582                 }
16583 
16584                 mutex_enter(&mpt->m_mutex);
16585                 numphys = 0;
16586                 iport = ddi_get_name_addr(pdip);
16587                 for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
16588                         bzero(phymask, sizeof (phymask));
16589                         (void) sprintf(phymask,
16590                             "%x", mpt->m_phy_info[i].phy_mask);
16591                         if (strcmp(phymask, iport) == 0) {
16592                                 phy_mask = mpt->m_phy_info[i].phy_mask;
16593                                 break;
16594                         }
16595                 }
16596 
16597                 for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
16598                         if ((phy_mask >> i) & 0x01) {
16599                                 numphys++;
16600                         }
16601                 }
16602                 /*
16603                  * Update PHY info for smhba
16604                  */
16605                 if (mptsas_smhba_phy_init(mpt)) {
16606                         mutex_exit(&mpt->m_mutex);
16607                         mptsas_log(mpt, CE_WARN, "mptsas phy update "
16608                             "failed");
16609                         goto smp_create_done;
16610                 }
16611                 mutex_exit(&mpt->m_mutex);
16612 
16613                 mptsas_smhba_set_all_phy_props(mpt, pdip, numphys, phy_mask,
16614                     &attached_devhdl);
16615 
16616                 if (ddi_prop_update_int(DDI_DEV_T_NONE, pdip,
16617                     MPTSAS_NUM_PHYS, numphys) !=
16618                     DDI_PROP_SUCCESS) {
16619                         (void) ddi_prop_remove(DDI_DEV_T_NONE, pdip,
16620                             MPTSAS_NUM_PHYS);
16621                         mptsas_log(mpt, CE_WARN, "mptsas update "
16622                             "num phys props failed");
16623                         goto smp_create_done;
16624                 }
16625                 /*
16626                  * Add parent's props for SMHBA support
16627                  */
16628                 if (ddi_prop_update_string(DDI_DEV_T_NONE, pdip,
16629                     SCSI_ADDR_PROP_ATTACHED_PORT, wwn_str) !=
16630                     DDI_PROP_SUCCESS) {
16631                         (void) ddi_prop_remove(DDI_DEV_T_NONE, pdip,
16632                             SCSI_ADDR_PROP_ATTACHED_PORT);
16633                         mptsas_log(mpt, CE_WARN, "mptsas update iport"
16634                             "attached-port failed");
16635                         goto smp_create_done;
16636                 }
16637 
16638 smp_create_done:
16639                 /*
16640                  * If props were setup ok, online the lun
16641                  */
16642                 if (ndi_rtn == NDI_SUCCESS) {
16643                         /*
16644                          * Try to online the new node
16645                          */
16646                         ndi_rtn = ndi_devi_online(*smp_dip, NDI_ONLINE_ATTACH);
16647                 }
16648 
16649                 /*
16650                  * If success set rtn flag, else unwire alloc'd lun
16651                  */
16652                 if (ndi_rtn != NDI_SUCCESS) {
16653                         NDBG12(("mptsas unable to online "
16654                             "SMP target %s", wwn_str));
16655                         ndi_prop_remove_all(*smp_dip);
16656                         (void) ndi_devi_free(*smp_dip);
16657                 }
16658         }
16659 
16660         return ((ndi_rtn == NDI_SUCCESS) ? DDI_SUCCESS : DDI_FAILURE);
16661 }
16662 
16663 /* smp transport routine */
16664 static int mptsas_smp_start(struct smp_pkt *smp_pkt)
16665 {
16666         uint64_t                        wwn;
16667         Mpi2SmpPassthroughRequest_t     req;
16668         Mpi2SmpPassthroughReply_t       rep;
16669         uint8_t                         direction = 0;
16670         mptsas_t                        *mpt;
16671         int                             ret;
16672         uint64_t                        tmp64;
16673 
16674         mpt = (mptsas_t *)smp_pkt->smp_pkt_address->
16675             smp_a_hba_tran->smp_tran_hba_private;
16676 
16677         bcopy(smp_pkt->smp_pkt_address->smp_a_wwn, &wwn, SAS_WWN_BYTE_SIZE);
16678         /*
16679          * Need to compose a SMP request message
16680          * and call mptsas_do_passthru() function
16681          */
16682         bzero(&req, sizeof (req));
16683         bzero(&rep, sizeof (rep));
16684         req.PassthroughFlags = 0;
16685         req.PhysicalPort = 0xff;
16686         req.ChainOffset = 0;
16687         req.Function = MPI2_FUNCTION_SMP_PASSTHROUGH;
16688 
16689         if ((smp_pkt->smp_pkt_reqsize & 0xffff0000ul) != 0) {
16690                 smp_pkt->smp_pkt_reason = ERANGE;
16691                 return (DDI_FAILURE);
16692         }
16693         req.RequestDataLength = LE_16((uint16_t)(smp_pkt->smp_pkt_reqsize - 4));
16694 
16695         req.MsgFlags = 0;
16696         tmp64 = LE_64(wwn);
16697         bcopy(&tmp64, &req.SASAddress, SAS_WWN_BYTE_SIZE);
16698         if (smp_pkt->smp_pkt_rspsize > 0) {
16699                 direction |= MPTSAS_PASS_THRU_DIRECTION_READ;
16700         }
16701         if (smp_pkt->smp_pkt_reqsize > 0) {
16702                 direction |= MPTSAS_PASS_THRU_DIRECTION_WRITE;
16703         }
16704 
16705         mutex_enter(&mpt->m_mutex);
16706         ret = mptsas_do_passthru(mpt, (uint8_t *)&req, (uint8_t *)&rep,
16707             (uint8_t *)smp_pkt->smp_pkt_rsp,
16708             offsetof(Mpi2SmpPassthroughRequest_t, SGL), sizeof (rep),
16709             smp_pkt->smp_pkt_rspsize - 4, direction,
16710             (uint8_t *)smp_pkt->smp_pkt_req, smp_pkt->smp_pkt_reqsize - 4,
16711             smp_pkt->smp_pkt_timeout, FKIOCTL);
16712         mutex_exit(&mpt->m_mutex);
16713         if (ret != 0) {
16714                 cmn_err(CE_WARN, "smp_start do passthru error %d", ret);
16715                 smp_pkt->smp_pkt_reason = (uchar_t)(ret);
16716                 return (DDI_FAILURE);
16717         }
16718         /* do passthrough success, check the smp status */
16719         if (LE_16(rep.IOCStatus) != MPI2_IOCSTATUS_SUCCESS) {
16720                 switch (LE_16(rep.IOCStatus)) {
16721                 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
16722                         smp_pkt->smp_pkt_reason = ENODEV;
16723                         break;
16724                 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
16725                         smp_pkt->smp_pkt_reason = EOVERFLOW;
16726                         break;
16727                 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
16728                         smp_pkt->smp_pkt_reason = EIO;
16729                         break;
16730                 default:
16731                         mptsas_log(mpt, CE_NOTE, "smp_start: get unknown ioc"
16732                             "status:%x", LE_16(rep.IOCStatus));
16733                         smp_pkt->smp_pkt_reason = EIO;
16734                         break;
16735                 }
16736                 return (DDI_FAILURE);
16737         }
16738         if (rep.SASStatus != MPI2_SASSTATUS_SUCCESS) {
16739                 mptsas_log(mpt, CE_NOTE, "smp_start: get error SAS status:%x",
16740                     rep.SASStatus);
16741                 smp_pkt->smp_pkt_reason = EIO;
16742                 return (DDI_FAILURE);
16743         }
16744 
16745         return (DDI_SUCCESS);
16746 }
16747 
16748 /*
16749  * If we didn't get a match, we need to get sas page0 for each device, and
16750  * untill we get a match. If failed, return NULL
16751  */
16752 static mptsas_target_t *
16753 mptsas_phy_to_tgt(mptsas_t *mpt, mptsas_phymask_t phymask, uint8_t phy)
16754 {
16755         int             i, j = 0;
16756         int             rval = 0;
16757         uint16_t        cur_handle;
16758         uint32_t        page_address;
16759         mptsas_target_t *ptgt = NULL;
16760 
16761         /*
16762          * PHY named device must be direct attached and attaches to
16763          * narrow port, if the iport is not parent of the device which
16764          * we are looking for.
16765          */
16766         for (i = 0; i < MPTSAS_MAX_PHYS; i++) {
16767                 if ((1 << i) & phymask)
16768                         j++;
16769         }
16770 
16771         if (j > 1)
16772                 return (NULL);
16773 
16774         /*
16775          * Must be a narrow port and single device attached to the narrow port
16776          * So the physical port num of device  which is equal to the iport's
16777          * port num is the device what we are looking for.
16778          */
16779 
16780         if (mpt->m_phy_info[phy].phy_mask != phymask)
16781                 return (NULL);
16782 
16783         mutex_enter(&mpt->m_mutex);
16784 
16785         ptgt = refhash_linear_search(mpt->m_targets, mptsas_target_eval_nowwn,
16786             &phy);
16787         if (ptgt != NULL) {
16788                 mutex_exit(&mpt->m_mutex);
16789                 return (ptgt);
16790         }
16791 
16792         if (mpt->m_done_traverse_dev) {
16793                 mutex_exit(&mpt->m_mutex);
16794                 return (NULL);
16795         }
16796 
16797         /* If didn't get a match, come here */
16798         cur_handle = mpt->m_dev_handle;
16799         for (; ; ) {
16800                 ptgt = NULL;
16801                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE &
16802                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) | (uint32_t)cur_handle;
16803                 rval = mptsas_get_target_device_info(mpt, page_address,
16804                     &cur_handle, &ptgt);
16805                 if ((rval == DEV_INFO_FAIL_PAGE0) ||
16806                     (rval == DEV_INFO_FAIL_ALLOC)) {
16807                         break;
16808                 }
16809                 if ((rval == DEV_INFO_WRONG_DEVICE_TYPE) ||
16810                     (rval == DEV_INFO_PHYS_DISK)) {
16811                         continue;
16812                 }
16813                 mpt->m_dev_handle = cur_handle;
16814 
16815                 if ((ptgt->m_addr.mta_wwn == 0) && (ptgt->m_phynum == phy)) {
16816                         break;
16817                 }
16818         }
16819 
16820         mutex_exit(&mpt->m_mutex);
16821         return (ptgt);
16822 }
16823 
16824 /*
16825  * The ptgt->m_addr.mta_wwn contains the wwid for each disk.
16826  * For Raid volumes, we need to check m_raidvol[x].m_raidwwid
16827  * If we didn't get a match, we need to get sas page0 for each device, and
16828  * untill we get a match
16829  * If failed, return NULL
16830  */
16831 static mptsas_target_t *
16832 mptsas_wwid_to_ptgt(mptsas_t *mpt, mptsas_phymask_t phymask, uint64_t wwid)
16833 {
16834         int             rval = 0;
16835         uint16_t        cur_handle;
16836         uint32_t        page_address;
16837         mptsas_target_t *tmp_tgt = NULL;
16838         mptsas_target_addr_t addr;
16839 
16840         addr.mta_wwn = wwid;
16841         addr.mta_phymask = phymask;
16842         mutex_enter(&mpt->m_mutex);
16843         tmp_tgt = refhash_lookup(mpt->m_targets, &addr);
16844         if (tmp_tgt != NULL) {
16845                 mutex_exit(&mpt->m_mutex);
16846                 return (tmp_tgt);
16847         }
16848 
16849         if (phymask == 0) {
16850                 /*
16851                  * It's IR volume
16852                  */
16853                 rval = mptsas_get_raid_info(mpt);
16854                 if (rval) {
16855                         tmp_tgt = refhash_lookup(mpt->m_targets, &addr);
16856                 }
16857                 mutex_exit(&mpt->m_mutex);
16858                 return (tmp_tgt);
16859         }
16860 
16861         if (mpt->m_done_traverse_dev) {
16862                 mutex_exit(&mpt->m_mutex);
16863                 return (NULL);
16864         }
16865 
16866         /* If didn't get a match, come here */
16867         cur_handle = mpt->m_dev_handle;
16868         for (;;) {
16869                 tmp_tgt = NULL;
16870                 page_address = (MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE &
16871                     MPI2_SAS_DEVICE_PGAD_FORM_MASK) | cur_handle;
16872                 rval = mptsas_get_target_device_info(mpt, page_address,
16873                     &cur_handle, &tmp_tgt);
16874                 if ((rval == DEV_INFO_FAIL_PAGE0) ||
16875                     (rval == DEV_INFO_FAIL_ALLOC)) {
16876                         tmp_tgt = NULL;
16877                         break;
16878                 }
16879                 if ((rval == DEV_INFO_WRONG_DEVICE_TYPE) ||
16880                     (rval == DEV_INFO_PHYS_DISK)) {
16881                         continue;
16882                 }
16883                 mpt->m_dev_handle = cur_handle;
16884                 if ((tmp_tgt->m_addr.mta_wwn) &&
16885                     (tmp_tgt->m_addr.mta_wwn == wwid) &&
16886                     (tmp_tgt->m_addr.mta_phymask == phymask)) {
16887                         break;
16888                 }
16889         }
16890 
16891         mutex_exit(&mpt->m_mutex);
16892         return (tmp_tgt);
16893 }
16894 
16895 static mptsas_smp_t *
16896 mptsas_wwid_to_psmp(mptsas_t *mpt, mptsas_phymask_t phymask, uint64_t wwid)
16897 {
16898         int             rval = 0;
16899         uint16_t        cur_handle;
16900         uint32_t        page_address;
16901         mptsas_smp_t    smp_node, *psmp = NULL;
16902         mptsas_target_addr_t addr;
16903 
16904         addr.mta_wwn = wwid;
16905         addr.mta_phymask = phymask;
16906         mutex_enter(&mpt->m_mutex);
16907         psmp = refhash_lookup(mpt->m_smp_targets, &addr);
16908         if (psmp != NULL) {
16909                 mutex_exit(&mpt->m_mutex);
16910                 return (psmp);
16911         }
16912 
16913         if (mpt->m_done_traverse_smp) {
16914                 mutex_exit(&mpt->m_mutex);
16915                 return (NULL);
16916         }
16917 
16918         /* If didn't get a match, come here */
16919         cur_handle = mpt->m_smp_devhdl;
16920         for (;;) {
16921                 psmp = NULL;
16922                 page_address = (MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL &
16923                     MPI2_SAS_EXPAND_PGAD_FORM_MASK) | (uint32_t)cur_handle;
16924                 rval = mptsas_get_sas_expander_page0(mpt, page_address,
16925                     &smp_node);
16926                 if (rval != DDI_SUCCESS) {
16927                         break;
16928                 }
16929                 mpt->m_smp_devhdl = cur_handle = smp_node.m_devhdl;
16930                 psmp = mptsas_smp_alloc(mpt, &smp_node);
16931                 ASSERT(psmp);
16932                 if ((psmp->m_addr.mta_wwn) && (psmp->m_addr.mta_wwn == wwid) &&
16933                     (psmp->m_addr.mta_phymask == phymask)) {
16934                         break;
16935                 }
16936         }
16937 
16938         mutex_exit(&mpt->m_mutex);
16939         return (psmp);
16940 }
16941 
16942 mptsas_target_t *
16943 mptsas_tgt_alloc(mptsas_t *mpt, uint16_t devhdl, uint64_t wwid,
16944     uint32_t devinfo, mptsas_phymask_t phymask, uint8_t phynum)
16945 {
16946         mptsas_target_t *tmp_tgt = NULL;
16947         mptsas_target_addr_t addr;
16948 
16949         addr.mta_wwn = wwid;
16950         addr.mta_phymask = phymask;
16951         tmp_tgt = refhash_lookup(mpt->m_targets, &addr);
16952         if (tmp_tgt != NULL) {
16953                 NDBG20(("Hash item already exist"));
16954                 tmp_tgt->m_deviceinfo = devinfo;
16955                 tmp_tgt->m_devhdl = devhdl;  /* XXX - duplicate? */
16956                 return (tmp_tgt);
16957         }
16958         tmp_tgt = kmem_zalloc(sizeof (struct mptsas_target), KM_SLEEP);
16959         if (tmp_tgt == NULL) {
16960                 cmn_err(CE_WARN, "Fatal, allocated tgt failed");
16961                 return (NULL);
16962         }
16963         tmp_tgt->m_devhdl = devhdl;
16964         tmp_tgt->m_addr.mta_wwn = wwid;
16965         tmp_tgt->m_deviceinfo = devinfo;
16966         tmp_tgt->m_addr.mta_phymask = phymask;
16967         tmp_tgt->m_phynum = phynum;
16968         /* Initialized the tgt structure */
16969         tmp_tgt->m_qfull_retries = QFULL_RETRIES;
16970         tmp_tgt->m_qfull_retry_interval =
16971             drv_usectohz(QFULL_RETRY_INTERVAL * 1000);
16972         tmp_tgt->m_t_throttle = MAX_THROTTLE;
16973         mutex_init(&tmp_tgt->m_t_mutex, NULL, MUTEX_DRIVER, NULL);
16974         TAILQ_INIT(&tmp_tgt->m_active_cmdq);
16975 
16976         refhash_insert(mpt->m_targets, tmp_tgt);
16977 
16978         return (tmp_tgt);
16979 }
16980 
16981 static void
16982 mptsas_smp_target_copy(mptsas_smp_t *src, mptsas_smp_t *dst)
16983 {
16984         dst->m_devhdl = src->m_devhdl;
16985         dst->m_deviceinfo = src->m_deviceinfo;
16986         dst->m_pdevhdl = src->m_pdevhdl;
16987         dst->m_pdevinfo = src->m_pdevinfo;
16988 }
16989 
16990 static mptsas_smp_t *
16991 mptsas_smp_alloc(mptsas_t *mpt, mptsas_smp_t *data)
16992 {
16993         mptsas_target_addr_t addr;
16994         mptsas_smp_t *ret_data;
16995 
16996         addr.mta_wwn = data->m_addr.mta_wwn;
16997         addr.mta_phymask = data->m_addr.mta_phymask;
16998         ret_data = refhash_lookup(mpt->m_smp_targets, &addr);
16999         /*
17000          * If there's already a matching SMP target, update its fields
17001          * in place.  Since the address is not changing, it's safe to do
17002          * this.  We cannot just bcopy() here because the structure we've
17003          * been given has invalid hash links.
17004          */
17005         if (ret_data != NULL) {
17006                 mptsas_smp_target_copy(data, ret_data);
17007                 return (ret_data);
17008         }
17009 
17010         ret_data = kmem_alloc(sizeof (mptsas_smp_t), KM_SLEEP);
17011         bcopy(data, ret_data, sizeof (mptsas_smp_t));
17012         refhash_insert(mpt->m_smp_targets, ret_data);
17013         return (ret_data);
17014 }
17015 
17016 /*
17017  * Functions for SGPIO LED support
17018  */
17019 static dev_info_t *
17020 mptsas_get_dip_from_dev(dev_t dev, mptsas_phymask_t *phymask)
17021 {
17022         dev_info_t      *dip;
17023         int             prop;
17024         dip = e_ddi_hold_devi_by_dev(dev, 0);
17025         if (dip == NULL)
17026                 return (dip);
17027         prop = ddi_prop_get_int(DDI_DEV_T_ANY, dip, 0,
17028             "phymask", 0);
17029         *phymask = (mptsas_phymask_t)prop;
17030         ddi_release_devi(dip);
17031         return (dip);
17032 }
17033 static mptsas_target_t *
17034 mptsas_addr_to_ptgt(mptsas_t *mpt, char *addr, mptsas_phymask_t phymask)
17035 {
17036         uint8_t                 phynum;
17037         uint64_t                wwn;
17038         int                     lun;
17039         mptsas_target_t         *ptgt = NULL;
17040 
17041         if (mptsas_parse_address(addr, &wwn, &phynum, &lun) != DDI_SUCCESS) {
17042                 return (NULL);
17043         }
17044         if (addr[0] == 'w') {
17045                 ptgt = mptsas_wwid_to_ptgt(mpt, (int)phymask, wwn);
17046         } else {
17047                 ptgt = mptsas_phy_to_tgt(mpt, (int)phymask, phynum);
17048         }
17049         return (ptgt);
17050 }
17051 
17052 static int
17053 mptsas_flush_led_status(mptsas_t *mpt, mptsas_target_t *ptgt)
17054 {
17055         uint32_t slotstatus = 0;
17056 
17057         /* Build an MPI2 Slot Status based on our view of the world */
17058         if (ptgt->m_led_status & (1 << (MPTSAS_LEDCTL_LED_IDENT - 1)))
17059                 slotstatus |= MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST;
17060         if (ptgt->m_led_status & (1 << (MPTSAS_LEDCTL_LED_FAIL - 1)))
17061                 slotstatus |= MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT;
17062         if (ptgt->m_led_status & (1 << (MPTSAS_LEDCTL_LED_OK2RM - 1)))
17063                 slotstatus |= MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE;
17064 
17065         /* Write it to the controller */
17066         NDBG14(("mptsas_ioctl: set LED status %x for slot %x",
17067             slotstatus, ptgt->m_slot_num));
17068         return (mptsas_send_sep(mpt, ptgt, &slotstatus,
17069             MPI2_SEP_REQ_ACTION_WRITE_STATUS));
17070 }
17071 
17072 /*
17073  *  send sep request, use enclosure/slot addressing
17074  */
17075 static int
17076 mptsas_send_sep(mptsas_t *mpt, mptsas_target_t *ptgt,
17077     uint32_t *status, uint8_t act)
17078 {
17079         Mpi2SepRequest_t        req;
17080         Mpi2SepReply_t          rep;
17081         int                     ret;
17082 
17083         ASSERT(mutex_owned(&mpt->m_mutex));
17084 
17085         /*
17086          * We only support SEP control of directly-attached targets, in which
17087          * case the "SEP" we're talking to is a virtual one contained within
17088          * the HBA itself.  This is necessary because DA targets typically have
17089          * no other mechanism for LED control.  Targets for which a separate
17090          * enclosure service processor exists should be controlled via ses(7d)
17091          * or sgen(7d).  Furthermore, since such requests can time out, they
17092          * should be made in user context rather than in response to
17093          * asynchronous fabric changes.
17094          *
17095          * In addition, we do not support this operation for RAID volumes,
17096          * since there is no slot associated with them.
17097          */
17098         if (!(ptgt->m_deviceinfo & DEVINFO_DIRECT_ATTACHED) ||
17099             ptgt->m_addr.mta_phymask == 0) {
17100                 return (ENOTTY);
17101         }
17102 
17103         bzero(&req, sizeof (req));
17104         bzero(&rep, sizeof (rep));
17105 
17106         req.Function = MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR;
17107         req.Action = act;
17108         req.Flags = MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS;
17109         req.EnclosureHandle = LE_16(ptgt->m_enclosure);
17110         req.Slot = LE_16(ptgt->m_slot_num);
17111         if (act == MPI2_SEP_REQ_ACTION_WRITE_STATUS) {
17112                 req.SlotStatus = LE_32(*status);
17113         }
17114         ret = mptsas_do_passthru(mpt, (uint8_t *)&req, (uint8_t *)&rep, NULL,
17115             sizeof (req), sizeof (rep), NULL, 0, NULL, 0, 60, FKIOCTL);
17116         if (ret != 0) {
17117                 mptsas_log(mpt, CE_NOTE, "mptsas_send_sep: passthru SEP "
17118                     "Processor Request message error %d", ret);
17119                 return (ret);
17120         }
17121         /* do passthrough success, check the ioc status */
17122         if (LE_16(rep.IOCStatus) != MPI2_IOCSTATUS_SUCCESS) {
17123                 mptsas_log(mpt, CE_NOTE, "send_sep act %x: ioc "
17124                     "status:%x loginfo %x", act, LE_16(rep.IOCStatus),
17125                     LE_32(rep.IOCLogInfo));
17126                 switch (LE_16(rep.IOCStatus) & MPI2_IOCSTATUS_MASK) {
17127                 case MPI2_IOCSTATUS_INVALID_FUNCTION:
17128                 case MPI2_IOCSTATUS_INVALID_VPID:
17129                 case MPI2_IOCSTATUS_INVALID_FIELD:
17130                 case MPI2_IOCSTATUS_INVALID_STATE:
17131                 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
17132                 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
17133                 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
17134                 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
17135                 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
17136                 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
17137                         return (EINVAL);
17138                 case MPI2_IOCSTATUS_BUSY:
17139                         return (EBUSY);
17140                 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
17141                         return (EAGAIN);
17142                 case MPI2_IOCSTATUS_INVALID_SGL:
17143                 case MPI2_IOCSTATUS_INTERNAL_ERROR:
17144                 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
17145                 default:
17146                         return (EIO);
17147                 }
17148         }
17149         if (act != MPI2_SEP_REQ_ACTION_WRITE_STATUS) {
17150                 *status = LE_32(rep.SlotStatus);
17151         }
17152 
17153         return (0);
17154 }
17155 
17156 int
17157 mptsas_dma_addr_create(mptsas_t *mpt, ddi_dma_attr_t dma_attr,
17158     ddi_dma_handle_t *dma_hdp, ddi_acc_handle_t *acc_hdp, caddr_t *dma_memp,
17159     uint32_t alloc_size, ddi_dma_cookie_t *cookiep)
17160 {
17161         ddi_dma_cookie_t        new_cookie;
17162         size_t                  alloc_len;
17163         uint_t                  ncookie;
17164 
17165         if (cookiep == NULL)
17166                 cookiep = &new_cookie;
17167 
17168         if (ddi_dma_alloc_handle(mpt->m_dip, &dma_attr, DDI_DMA_SLEEP,
17169             NULL, dma_hdp) != DDI_SUCCESS) {
17170                 return (FALSE);
17171         }
17172 
17173         if (ddi_dma_mem_alloc(*dma_hdp, alloc_size, &mpt->m_dev_acc_attr,
17174             DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, dma_memp, &alloc_len,
17175             acc_hdp) != DDI_SUCCESS) {
17176                 ddi_dma_free_handle(dma_hdp);
17177                 return (FALSE);
17178         }
17179 
17180         if (ddi_dma_addr_bind_handle(*dma_hdp, NULL, *dma_memp, alloc_len,
17181             (DDI_DMA_RDWR | DDI_DMA_CONSISTENT), DDI_DMA_SLEEP, NULL,
17182             cookiep, &ncookie) != DDI_DMA_MAPPED) {
17183                 (void) ddi_dma_mem_free(acc_hdp);
17184                 ddi_dma_free_handle(dma_hdp);
17185                 return (FALSE);
17186         }
17187 
17188         return (TRUE);
17189 }
17190 
17191 void
17192 mptsas_dma_addr_destroy(ddi_dma_handle_t *dma_hdp, ddi_acc_handle_t *acc_hdp)
17193 {
17194         if (*dma_hdp == NULL)
17195                 return;
17196 
17197         (void) ddi_dma_unbind_handle(*dma_hdp);
17198         (void) ddi_dma_mem_free(acc_hdp);
17199         ddi_dma_free_handle(dma_hdp);
17200 }