1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26 /*
27 * Copyright (c) 2013, Joyent, Inc. All rights reserved.
28 * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
29 */
30
31 /*
32 * Copyright (c) 2000 to 2010, LSI Corporation.
33 * All rights reserved.
34 *
35 * Redistribution and use in source and binary forms of all code within
36 * this file that is exclusively owned by LSI, with or without
37 * modification, is permitted provided that, in addition to the CDDL 1.0
38 * License requirements, the following conditions are met:
39 *
40 * Neither the name of the author nor the names of its contributors may be
41 * used to endorse or promote products derived from this software without
42 * specific prior written permission.
43 *
44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
47 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
48 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
50 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
51 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
52 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
53 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
54 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
55 * DAMAGE.
56 */
57
58 #ifndef _MPTSAS3_IOCTL_H
59 #define _MPTSAS3_IOCTL_H
60
61 #ifdef __cplusplus
62 extern "C" {
63 #endif
64
65 #include <sys/types.h>
66
67 #define MPTIOCTL ('I' << 8)
68 #define MPTIOCTL_GET_ADAPTER_DATA (MPTIOCTL | 1)
69 #define MPTIOCTL_UPDATE_FLASH (MPTIOCTL | 2)
70 #define MPTIOCTL_RESET_ADAPTER (MPTIOCTL | 3)
71 #define MPTIOCTL_PASS_THRU (MPTIOCTL | 4)
72 #define MPTIOCTL_EVENT_QUERY (MPTIOCTL | 5)
73 #define MPTIOCTL_EVENT_ENABLE (MPTIOCTL | 6)
74 #define MPTIOCTL_EVENT_REPORT (MPTIOCTL | 7)
75 #define MPTIOCTL_GET_PCI_INFO (MPTIOCTL | 8)
76 #define MPTIOCTL_DIAG_ACTION (MPTIOCTL | 9)
77 #define MPTIOCTL_REG_ACCESS (MPTIOCTL | 10)
78 #define MPTIOCTL_GET_DISK_INFO (MPTIOCTL | 11)
79 #define MPTIOCTL_LED_CONTROL (MPTIOCTL | 12)
80
81 /*
82 * The following are our ioctl() return status values. If everything went
83 * well, we return good status. If the buffer length sent to us is too short
84 * we return a status to tell the user.
85 */
86 #define MPTIOCTL_STATUS_GOOD 0
87 #define MPTIOCTL_STATUS_LEN_TOO_SHORT 1
88
89 typedef struct mptsas_pci_bits
90 {
91 union {
92 struct {
93 uint32_t DeviceNumber :5;
94 uint32_t FunctionNumber :3;
95 uint32_t BusNumber :24;
96 } bits;
97 uint32_t AsDWORD;
98 } u;
99 uint32_t PciSegmentId;
100 } mptsas_pci_bits_t;
101 /*
102 * The following is the MPTIOCTL_GET_ADAPTER_DATA data structure. This data
103 * structure is setup so that we hopefully are properly aligned for both
104 * 32-bit and 64-bit mode applications.
105 *
106 * Adapter Type - Value = 6 = SCSI Protocol through SAS-3 adapter
107 *
108 * MPI Port Number - The PCI Function number for this device
109 *
110 * PCI Device HW Id - The PCI device number for this device
111 *
112 */
113 #define MPTIOCTL_ADAPTER_TYPE_SAS3 6
114 typedef struct mptsas_adapter_data
115 {
116 uint32_t StructureLength;
117 uint32_t AdapterType;
118 uint32_t MpiPortNumber;
119 uint32_t PCIDeviceHwId;
120 uint32_t PCIDeviceHwRev;
121 uint32_t SubSystemId;
122 uint32_t SubsystemVendorId;
123 uint32_t Reserved1;
124 uint32_t MpiFirmwareVersion;
125 uint32_t BiosVersion;
126 uint8_t DriverVersion[32];
127 uint8_t Reserved2;
128 uint8_t ScsiId;
129 uint16_t Reserved3;
130 mptsas_pci_bits_t PciInformation;
131 } mptsas_adapter_data_t;
132
133
134 typedef struct mptsas_update_flash
135 {
136 uint64_t PtrBuffer;
137 uint32_t ImageChecksum;
138 uint32_t ImageOffset;
139 uint32_t ImageSize;
140 uint32_t ImageType;
141 } mptsas_update_flash_t;
142
143
144 #define MPTSAS_PASS_THRU_DIRECTION_NONE 0
145 #define MPTSAS_PASS_THRU_DIRECTION_READ 1
146 #define MPTSAS_PASS_THRU_DIRECTION_WRITE 2
147 #define MPTSAS_PASS_THRU_DIRECTION_BOTH 3
148
149 typedef struct mptsas_pass_thru
150 {
151 uint64_t PtrRequest;
152 uint64_t PtrReply;
153 uint64_t PtrData;
154 uint32_t RequestSize;
155 uint32_t ReplySize;
156 uint32_t DataSize;
157 uint32_t DataDirection;
158 uint64_t PtrDataOut;
159 uint32_t DataOutSize;
160 uint32_t Timeout;
161 } mptsas_pass_thru_t;
162
163
164 /*
165 * Event queue defines
166 */
167 #define MPTSAS_EVENT_QUEUE_SIZE (50) /* Max Events stored in driver */
168 #define MPTSAS_MAX_EVENT_DATA_LENGTH (48) /* Size of each event in Dwords */
169
170 typedef struct mptsas_event_query
171 {
172 uint16_t Entries;
173 uint16_t Reserved;
174 uint32_t Types[4];
175 } mptsas_event_query_t;
176
177 typedef struct mptsas_event_enable
178 {
179 uint32_t Types[4];
180 } mptsas_event_enable_t;
181
182 /*
183 * Event record entry for ioctl.
184 */
185 typedef struct mptsas_event_entry
186 {
187 uint32_t Type;
188 uint32_t Number;
189 uint32_t Data[MPTSAS_MAX_EVENT_DATA_LENGTH];
190 } mptsas_event_entry_t;
191
192 typedef struct mptsas_event_report
193 {
194 uint32_t Size;
195 mptsas_event_entry_t Events[1];
196 } mptsas_event_report_t;
197
198
199 typedef struct mptsas_pci_info
200 {
201 uint32_t BusNumber;
202 uint8_t DeviceNumber;
203 uint8_t FunctionNumber;
204 uint16_t InterruptVector;
205 uint8_t PciHeader[256];
206 } mptsas_pci_info_t;
207
208
209 typedef struct mptsas_diag_action
210 {
211 uint32_t Action;
212 uint32_t Length;
213 uint64_t PtrDiagAction;
214 uint32_t ReturnCode;
215 } mptsas_diag_action_t;
216
217 #define MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
218
219 #define MPTSAS_FW_DIAG_NEW (0x806E6577)
220
221 #define MPTSAS_FW_DIAG_TYPE_REGISTER (0x00000001)
222 #define MPTSAS_FW_DIAG_TYPE_UNREGISTER (0x00000002)
223 #define MPTSAS_FW_DIAG_TYPE_QUERY (0x00000003)
224 #define MPTSAS_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
225 #define MPTSAS_FW_DIAG_TYPE_RELEASE (0x00000005)
226
227 #define MPTSAS_FW_DIAG_INVALID_UID (0x00000000)
228
229 #define MPTSAS_FW_DIAG_ERROR_SUCCESS (0x00000000)
230 #define MPTSAS_FW_DIAG_ERROR_FAILURE (0x00000001)
231 #define MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
232 #define MPTSAS_FW_DIAG_ERROR_POST_FAILED (0x00000010)
233 #define MPTSAS_FW_DIAG_ERROR_INVALID_UID (0x00000011)
234 #define MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
235 #define MPTSAS_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
236 #define MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
237
238
239 typedef struct mptsas_fw_diag_register
240 {
241 uint8_t ExtendedType;
242 uint8_t BufferType;
243 uint16_t ApplicationFlags;
244 uint32_t DiagnosticFlags;
245 uint32_t ProductSpecific[23];
246 uint32_t RequestedBufferSize;
247 uint32_t UniqueId;
248 } mptsas_fw_diag_register_t;
249
250 typedef struct mptsas_fw_diag_unregister
251 {
252 uint32_t UniqueId;
253 } mptsas_fw_diag_unregister_t;
254
255 #define MPTSAS_FW_DIAG_FLAG_APP_OWNED (0x0001)
256 #define MPTSAS_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
257 #define MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
258
259 typedef struct mptsas_fw_diag_query
260 {
261 uint8_t ExtendedType;
262 uint8_t BufferType;
263 uint16_t ApplicationFlags;
264 uint32_t DiagnosticFlags;
265 uint32_t ProductSpecific[23];
266 uint32_t TotalBufferSize;
267 uint32_t DriverAddedBufferSize;
268 uint32_t UniqueId;
269 } mptsas_fw_diag_query_t;
270
271 typedef struct mptsas_fw_diag_release
272 {
273 uint32_t UniqueId;
274 } mptsas_fw_diag_release_t;
275
276 #define MPTSAS_FW_DIAG_FLAG_REREGISTER (0x0001)
277 #define MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
278
279 typedef struct mptsas_diag_read_buffer
280 {
281 uint8_t Status;
282 uint8_t Reserved;
283 uint16_t Flags;
284 uint32_t StartingOffset;
285 uint32_t BytesToRead;
286 uint32_t UniqueId;
287 uint32_t DataBuffer[1];
288 } mptsas_diag_read_buffer_t;
289
290 /*
291 * Register Access
292 */
293 #define REG_IO_READ 1
294 #define REG_IO_WRITE 2
295 #define REG_MEM_READ 3
296 #define REG_MEM_WRITE 4
297
298 typedef struct mptsas_reg_access
299 {
300 uint32_t Command;
301 uint32_t RegOffset;
302 uint32_t RegData;
303 } mptsas_reg_access_t;
304
305 /*
306 * Disk Toplogy Information
307 */
308 typedef struct mptsas_disk_info
309 {
310 uint64_t SasAddress;
311 uint16_t Instance;
312 uint16_t Enclosure;
313 uint16_t Slot;
314 } mptsas_disk_info_t;
315
316 typedef struct mptsas_get_disk_info
317 {
318 uint16_t DiskCount;
319 mptsas_disk_info_t *PtrDiskInfoArray;
320 uint64_t DiskInfoArraySize;
321 } mptsas_get_disk_info_t;
322
323 #ifdef _KERNEL
324
325 typedef struct mptsas_get_disk_info32
326 {
327 uint16_t DiskCount;
328 caddr32_t PtrDiskInfoArray;
329 uint64_t DiskInfoArraySize;
330 } mptsas_get_disk_info32_t;
331
332 #endif /* _KERNEL */
333
334 /*
335 * LED Control
336 */
337
338 typedef struct mptsas_led_control
339 {
340 uint8_t Command;
341 uint16_t Enclosure;
342 uint16_t Slot;
343 uint8_t Led;
344 uint8_t LedStatus;
345 } mptsas_led_control_t;
346
347 #define MPTSAS_LEDCTL_FLAG_SET 1
348 #define MPTSAS_LEDCTL_FLAG_GET 2
349
350 #define MPTSAS_LEDCTL_LED_IDENT 1
351 #define MPTSAS_LEDCTL_LED_FAIL 2
352 #define MPTSAS_LEDCTL_LED_OK2RM 3
353
354 #define MPTSAS_LEDCTL_LED_MIN MPTSAS_LEDCTL_LED_IDENT
355 #define MPTSAS_LEDCTL_LED_MAX MPTSAS_LEDCTL_LED_OK2RM
356
357 #ifdef __cplusplus
358 }
359 #endif
360
361 #endif /* _MPTSAS3_IOCTL_H */