1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2000-2012 LSI Corporation.
24 *
25 * Redistribution and use in source and binary forms of all code within
26 * this file that is exclusively owned by LSI, with or without
27 * modification, is permitted provided that, in addition to the CDDL 1.0
28 * License requirements, the following conditions are met:
29 *
30 * Neither the name of the author nor the names of its contributors may be
31 * used to endorse or promote products derived from this software without
32 * specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
37 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
38 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
39 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
40 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
41 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
42 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
43 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
44 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
45 * DAMAGE.
46 */
47
48 /*
49 * Name: mpi2.h
50 * Title: MPI Message independent structures and definitions
51 * including System Interface Register Set and
52 * scatter/gather formats.
53 * Creation Date: June 21, 2006
54 *
55 * mpi2.h Version: 02.00.xx
56 *
57 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
58 * prefix are for use only on MPI v2.5 products, and must not be used
59 * with MPI v2.0 products. Unless otherwise noted, names beginning with
60 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
61 *
62 * Version History
63 * ---------------
64 *
65 * Date Version Description
66 * -------- -------- ------------------------------------------------------
67 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
68 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
69 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
70 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
71 * Moved ReplyPostHostIndex register to offset 0x6C of the
72 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for
73 * MPI2_REPLY_POST_HOST_INDEX_OFFSET.
74 * Added union of request descriptors.
75 * Added union of reply descriptors.
76 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
77 * Added define for MPI2_VERSION_02_00.
78 * Fixed the size of the FunctionDependent5 field in the
79 * MPI2_DEFAULT_REPLY structure.
80 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
81 * Removed the MPI-defined Fault Codes and extended the
82 * product specific codes up to 0xEFFF.
83 * Added a sixth key value for the WriteSequence register
84 * and changed the flush value to 0x0.
85 * Added message function codes for Diagnostic Buffer Post
86 * and Diagnsotic Release.
87 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
88 * Moved MPI2_VERSION_UNION from mpi2_ioc.h.
89 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
90 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
91 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
92 * Added #defines for marking a reply descriptor as unused.
93 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
94 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
95 * Moved LUN field defines from mpi2_init.h.
96 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
97 * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
98 * In all request and reply descriptors, replaced VF_ID
99 * field with MSIxIndex field.
100 * Removed DevHandle field from
101 * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
102 * bytes reserved.
103 * Added RAID Accelerator functionality.
104 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
105 * --------------------------------------------------------------------------
106 */
107
108 #ifndef MPI2_H
109 #define MPI2_H
110
111
112 /*****************************************************************************
113 *
114 * MPI Version Definitions
115 *
116 *****************************************************************************/
117
118 #define MPI2_VERSION_MAJOR_MASK (0xFF00)
119 #define MPI2_VERSION_MAJOR_SHIFT (8)
120 #define MPI2_VERSION_MINOR_MASK (0x00FF)
121 #define MPI2_VERSION_MINOR_SHIFT (0)
122
123 /* major version for all MPI v2.x */
124 #define MPI2_VERSION_MAJOR (0x02)
125
126 /* minor version for MPI v2.0 compatible products */
127 #define MPI2_VERSION_MINOR (0x00)
128 #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
129 MPI2_VERSION_MINOR)
130 #define MPI2_VERSION_02_00 (0x0200)
131
132
133 /* minor version for MPI v2.5 compatible products */
134 #define MPI25_VERSION_MINOR (0x05)
135 #define MPI25_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
136 MPI25_VERSION_MINOR)
137 #define MPI2_VERSION_02_05 (0x0205)
138
139
140 /* Unit and Dev versioning for this MPI header set */
141 #define MPI2_HEADER_VERSION_UNIT (0x12)
142 #define MPI2_HEADER_VERSION_DEV (0x00)
143 #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
144 #define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
145 #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
146 #define MPI2_HEADER_VERSION_DEV_SHIFT (0)
147 #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
148
149
150 /*****************************************************************************
151 *
152 * IOC State Definitions
153 *
154 *****************************************************************************/
155
156 #define MPI2_IOC_STATE_RESET (0x00000000)
157 #define MPI2_IOC_STATE_READY (0x10000000)
158 #define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
159 #define MPI2_IOC_STATE_FAULT (0x40000000)
160
161 #define MPI2_IOC_STATE_MASK (0xF0000000)
162 #define MPI2_IOC_STATE_SHIFT (28)
163
164 /* Fault state range for prodcut specific codes */
165 #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
166 #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
167
168
169 /*****************************************************************************
170 *
171 * System Interface Register Definitions
172 *
173 *****************************************************************************/
174
175 typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
176 {
177 U32 Doorbell; /* 0x00 */
178 U32 WriteSequence; /* 0x04 */
179 U32 HostDiagnostic; /* 0x08 */
180 U32 Reserved1; /* 0x0C */
181 U32 DiagRWData; /* 0x10 */
182 U32 DiagRWAddressLow; /* 0x14 */
183 U32 DiagRWAddressHigh; /* 0x18 */
184 U32 Reserved2[5]; /* 0x1C */
185 U32 HostInterruptStatus; /* 0x30 */
186 U32 HostInterruptMask; /* 0x34 */
187 U32 DCRData; /* 0x38 */
188 U32 DCRAddress; /* 0x3C */
189 U32 Reserved3[2]; /* 0x40 */
190 U32 ReplyFreeHostIndex; /* 0x48 */
191 U32 Reserved4[8]; /* 0x4C */
192 U32 ReplyPostHostIndex; /* 0x6C */
193 U32 Reserved5; /* 0x70 */
194 U32 HCBSize; /* 0x74 */
195 U32 HCBAddressLow; /* 0x78 */
196 U32 HCBAddressHigh; /* 0x7C */
197 U32 Reserved6[16]; /* 0x80 */
198 U32 RequestDescriptorPostLow; /* 0xC0 */
199 U32 RequestDescriptorPostHigh; /* 0xC4 */
200 U32 Reserved7[14]; /* 0xC8 */
201 U32 Reserved8[128]; /* 0x100 */
202 U32 Reserved10[3]; /* 0x300 */
203 U32 SuppReplyPostHostIndex[32]; /* 0x30C */
204 } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
205 Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
206
207 /*
208 * Defines for working with the Doorbell register.
209 */
210 #define MPI2_DOORBELL_OFFSET (0x00000000)
211
212 /* IOC --> System values */
213 #define MPI2_DOORBELL_USED (0x08000000)
214 #define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
215 #define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
216 #define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
217 #define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
218
219 /* System --> IOC values */
220 #define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
221 #define MPI2_DOORBELL_FUNCTION_SHIFT (24)
222 #define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
223 #define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
224
225
226 /*
227 * Defines for the WriteSequence register
228 */
229 #define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
230 #define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
231 #define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
232 #define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
233 #define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
234 #define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
235 #define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
236 #define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
237 #define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
238
239 /*
240 * Defines for the HostDiagnostic register
241 */
242 #define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
243
244 #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
245 #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
246 #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
247
248 #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
249 #define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
250 #define MPI2_DIAG_HCB_MODE (0x00000100)
251 #define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
252 #define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
253 #define MPI2_DIAG_RESET_HISTORY (0x00000020)
254 #define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
255 #define MPI2_DIAG_RESET_ADAPTER (0x00000004)
256 #define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
257
258 /*
259 * Offsets for DiagRWData and address
260 */
261 #define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
262 #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
263 #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
264
265 /*
266 * Defines for the HostInterruptStatus register
267 */
268 #define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
269 #define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
270 #define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
271 #define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
272 #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
273 #define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
274 #define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
275
276 /*
277 * Defines for the HostInterruptMask register
278 */
279 #define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
280 #define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
281 #define MPI2_HIM_REPLY_INT_MASK (0x00000008)
282 #define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
283 #define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
284 #define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
285
286 /*
287 * Offsets for DCRData and address
288 */
289 #define MPI2_DCR_DATA_OFFSET (0x00000038)
290 #define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
291
292 /*
293 * Offset for the Reply Free Queue
294 */
295 #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
296
297 /*
298 * Offset for the Reply Descriptor Post Queue
299 */
300 #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
301 #define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF)
302 #define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000)
303 #define MPI2_RPHI_MSIX_INDEX_SHIFT (24)
304
305 /*
306 * Defines for the HCBSize and address
307 */
308 #define MPI2_HCB_SIZE_OFFSET (0x00000074)
309 #define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
310 #define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
311
312 #define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
313 #define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
314
315 /*
316 * Offsets for the Request Queue
317 */
318 #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
319 #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
320
321 /*
322 * Offset for the Supplimentary Host Index Base
323 * For use with more than 8 MSI-X interrupts.
324 */
325 #define MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET (0x0000030C)
326
327
328 /*****************************************************************************
329 *
330 * Message Descriptors
331 *
332 *****************************************************************************/
333
334 /* Request Descriptors */
335
336 /* Default Request Descriptor */
337 typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
338 {
339 U8 RequestFlags; /* 0x00 */
340 U8 MSIxIndex; /* 0x01 */
341 U16 SMID; /* 0x02 */
342 U16 LMID; /* 0x04 */
343 U16 DescriptorTypeDependent; /* 0x06 */
344 } MPI2_DEFAULT_REQUEST_DESCRIPTOR,
345 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
346 Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
347
348 /* defines for the RequestFlags field */
349 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
350 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
351 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
352 #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
353 #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
354 #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A)
355 #define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO (0x0C)
356
357 #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
358
359
360 /* High Priority Request Descriptor */
361 typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
362 {
363 U8 RequestFlags; /* 0x00 */
364 U8 MSIxIndex; /* 0x01 */
365 U16 SMID; /* 0x02 */
366 U16 LMID; /* 0x04 */
367 U16 Reserved1; /* 0x06 */
368 } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
369 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
370 Mpi2HighPriorityRequestDescriptor_t,
371 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
372
373
374 /* SCSI IO Request Descriptor */
375 typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
376 {
377 U8 RequestFlags; /* 0x00 */
378 U8 MSIxIndex; /* 0x01 */
379 U16 SMID; /* 0x02 */
380 U16 LMID; /* 0x04 */
381 U16 DevHandle; /* 0x06 */
382 } MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
383 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
384 Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t;
385
386
387 /* SCSI Target Request Descriptor */
388 typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
389 {
390 U8 RequestFlags; /* 0x00 */
391 U8 MSIxIndex; /* 0x01 */
392 U16 SMID; /* 0x02 */
393 U16 LMID; /* 0x04 */
394 U16 IoIndex; /* 0x06 */
395 } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
396 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
397 Mpi2SCSITargetRequestDescriptor_t,
398 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
399
400
401 /* RAID Accelerator Request Descriptor */
402 typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR
403 {
404 U8 RequestFlags; /* 0x00 */
405 U8 MSIxIndex; /* 0x01 */
406 U16 SMID; /* 0x02 */
407 U16 LMID; /* 0x04 */
408 U16 Reserved; /* 0x06 */
409 } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
410 MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
411 Mpi2RAIDAcceleratorRequestDescriptor_t,
412 MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
413
414
415 /* Fast Path SCSI IO Request Descriptor */
416 typedef MPI2_SCSI_IO_REQUEST_DESCRIPTOR
417 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
418 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
419 Mpi25FastPathSCSIIORequestDescriptor_t,
420 MPI2_POINTER pMpi25FastPathSCSIIORequestDescriptor_t;
421
422
423 /* union of Request Descriptors */
424 typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
425 {
426 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
427 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
428 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
429 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
430 MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
431 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR FastPathSCSIIO;
432 U64 Words;
433 } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
434 Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
435
436
437 /* Reply Descriptors */
438
439 /* Default Reply Descriptor */
440 typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
441 {
442 U8 ReplyFlags; /* 0x00 */
443 U8 MSIxIndex; /* 0x01 */
444 U16 DescriptorTypeDependent1; /* 0x02 */
445 U32 DescriptorTypeDependent2; /* 0x04 */
446 } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
447 Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
448
449 /* defines for the ReplyFlags field */
450 #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
451 #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
452 #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
453 #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
454 #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
455 #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05)
456 #define MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS (0x06)
457 #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
458
459 /* values for marking a reply descriptor as unused */
460 #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
461 #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
462
463 /* Address Reply Descriptor */
464 typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
465 {
466 U8 ReplyFlags; /* 0x00 */
467 U8 MSIxIndex; /* 0x01 */
468 U16 SMID; /* 0x02 */
469 U32 ReplyFrameAddress; /* 0x04 */
470 } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
471 Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
472
473 #define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
474
475
476 /* SCSI IO Success Reply Descriptor */
477 typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
478 {
479 U8 ReplyFlags; /* 0x00 */
480 U8 MSIxIndex; /* 0x01 */
481 U16 SMID; /* 0x02 */
482 U16 TaskTag; /* 0x04 */
483 U16 Reserved1; /* 0x06 */
484 } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
485 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
486 Mpi2SCSIIOSuccessReplyDescriptor_t,
487 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t;
488
489
490 /* TargetAssist Success Reply Descriptor */
491 typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
492 {
493 U8 ReplyFlags; /* 0x00 */
494 U8 MSIxIndex; /* 0x01 */
495 U16 SMID; /* 0x02 */
496 U8 SequenceNumber; /* 0x04 */
497 U8 Reserved1; /* 0x05 */
498 U16 IoIndex; /* 0x06 */
499 } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
500 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
501 Mpi2TargetAssistSuccessReplyDescriptor_t,
502 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t;
503
504
505 /* Target Command Buffer Reply Descriptor */
506 typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
507 {
508 U8 ReplyFlags; /* 0x00 */
509 U8 MSIxIndex; /* 0x01 */
510 U8 VP_ID; /* 0x02 */
511 U8 Flags; /* 0x03 */
512 U16 InitiatorDevHandle; /* 0x04 */
513 U16 IoIndex; /* 0x06 */
514 } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
515 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
516 Mpi2TargetCommandBufferReplyDescriptor_t,
517 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
518
519 /* defines for Flags field */
520 #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
521
522
523 /* RAID Accelerator Success Reply Descriptor */
524 typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR
525 {
526 U8 ReplyFlags; /* 0x00 */
527 U8 MSIxIndex; /* 0x01 */
528 U16 SMID; /* 0x02 */
529 U32 Reserved; /* 0x04 */
530 } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
531 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
532 Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
533 MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
534
535
536 /* Fast Path SCSI IO Success Reply Descriptor */
537 typedef MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
538 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
539 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
540 Mpi25FastPathSCSIIOSuccessReplyDescriptor_t,
541 MPI2_POINTER pMpi25FastPathSCSIIOSuccessReplyDescriptor_t;
542
543
544 /* union of Reply Descriptors */
545 typedef union _MPI2_REPLY_DESCRIPTORS_UNION
546 {
547 MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
548 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
549 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
550 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
551 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
552 MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess;
553 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR FastPathSCSIIOSuccess;
554 U64 Words;
555 } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
556 Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
557
558
559
560 /*****************************************************************************
561 *
562 * Message Functions
563 * 0x80 -> 0x8F reserved for private message use per product
564 *
565 *
566 *****************************************************************************/
567
568 #define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
569 #define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */
570 #define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
571 #define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */
572 #define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */
573 #define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */
574 #define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */
575 #define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */
576 #define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */
577 #define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */
578 #define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */
579 #define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */
580 #define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */
581 #define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */
582 #define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */
583 #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */
584 #define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
585 #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
586 #define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
587 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
588 #define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
589 #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
590 #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
591 #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
592 #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
593 #define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator */
594 #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F) /* Host Based Discovery Action */
595 #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30) /* Power Management Control */
596 #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0) /* beginning of product-specific range */
597 #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF) /* end of product-specific range */
598
599
600
601 /* Doorbell functions */
602 #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
603 #define MPI2_FUNCTION_HANDSHAKE (0x42)
604
605
606 /*****************************************************************************
607 *
608 * IOC Status Values
609 *
610 *****************************************************************************/
611
612 /* mask for IOCStatus status value */
613 #define MPI2_IOCSTATUS_MASK (0x7FFF)
614
615 /****************************************************************************
616 * Common IOCStatus values for all replies
617 ****************************************************************************/
618
619 #define MPI2_IOCSTATUS_SUCCESS (0x0000)
620 #define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
621 #define MPI2_IOCSTATUS_BUSY (0x0002)
622 #define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
623 #define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
624 #define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
625 #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
626 #define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
627 #define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
628 #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
629
630 /****************************************************************************
631 * Config IOCStatus values
632 ****************************************************************************/
633
634 #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
635 #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
636 #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
637 #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
638 #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
639 #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
640
641 /****************************************************************************
642 * SCSI IO Reply
643 ****************************************************************************/
644
645 #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
646 #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
647 #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
648 #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
649 #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
650 #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
651 #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
652 #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
653 #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
654 #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
655 #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
656 #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
657
658 /****************************************************************************
659 * For use by SCSI Initiator and SCSI Target end-to-end data protection
660 ****************************************************************************/
661
662 #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
663 #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
664 #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
665
666 /****************************************************************************
667 * SCSI Target values
668 ****************************************************************************/
669
670 #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
671 #define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
672 #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
673 #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
674 #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
675 #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
676 #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
677 #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
678 #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
679 #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
680
681 /****************************************************************************
682 * Serial Attached SCSI values
683 ****************************************************************************/
684
685 #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
686 #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
687
688 /****************************************************************************
689 * Diagnostic Buffer Post / Diagnostic Release values
690 ****************************************************************************/
691
692 #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
693
694 /****************************************************************************
695 * RAID Accelerator values
696 ****************************************************************************/
697
698 #define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0)
699
700 /****************************************************************************
701 * IOCStatus flag to indicate that log info is available
702 ****************************************************************************/
703
704 #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
705
706 /****************************************************************************
707 * IOCLogInfo Types
708 ****************************************************************************/
709
710 #define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
711 #define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
712 #define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
713 #define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
714 #define MPI2_IOCLOGINFO_TYPE_FC (0x2)
715 #define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
716 #define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
717 #define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
718
719
720 /*****************************************************************************
721 *
722 * Standard Message Structures
723 *
724 *****************************************************************************/
725
726 /****************************************************************************
727 * Request Message Header for all request messages
728 ****************************************************************************/
729
730 typedef struct _MPI2_REQUEST_HEADER
731 {
732 U16 FunctionDependent1; /* 0x00 */
733 U8 ChainOffset; /* 0x02 */
734 U8 Function; /* 0x03 */
735 U16 FunctionDependent2; /* 0x04 */
736 U8 FunctionDependent3; /* 0x06 */
737 U8 MsgFlags; /* 0x07 */
738 U8 VP_ID; /* 0x08 */
739 U8 VF_ID; /* 0x09 */
740 U16 Reserved1; /* 0x0A */
741 } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER,
742 MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t;
743
744
745 /****************************************************************************
746 * Default Reply
747 ****************************************************************************/
748
749 typedef struct _MPI2_DEFAULT_REPLY
750 {
751 U16 FunctionDependent1; /* 0x00 */
752 U8 MsgLength; /* 0x02 */
753 U8 Function; /* 0x03 */
754 U16 FunctionDependent2; /* 0x04 */
755 U8 FunctionDependent3; /* 0x06 */
756 U8 MsgFlags; /* 0x07 */
757 U8 VP_ID; /* 0x08 */
758 U8 VF_ID; /* 0x09 */
759 U16 Reserved1; /* 0x0A */
760 U16 FunctionDependent5; /* 0x0C */
761 U16 IOCStatus; /* 0x0E */
762 U32 IOCLogInfo; /* 0x10 */
763 } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY,
764 MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t;
765
766
767 /* common version structure/union used in messages and configuration pages */
768
769 typedef struct _MPI2_VERSION_STRUCT
770 {
771 U8 Dev; /* 0x00 */
772 U8 Unit; /* 0x01 */
773 U8 Minor; /* 0x02 */
774 U8 Major; /* 0x03 */
775 } MPI2_VERSION_STRUCT;
776
777 typedef union _MPI2_VERSION_UNION
778 {
779 MPI2_VERSION_STRUCT Struct;
780 U32 Word;
781 } MPI2_VERSION_UNION;
782
783
784 /* LUN field defines, common to many structures */
785 #define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
786 #define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
787 #define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
788 #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
789 #define MPI2_LUN_LEVEL_1_WORD (0xFF00)
790 #define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
791
792
793 /*****************************************************************************
794 *
795 * Fusion-MPT MPI Scatter Gather Elements
796 *
797 *****************************************************************************/
798
799 /****************************************************************************
800 * MPI Simple Element structures
801 ****************************************************************************/
802
803 typedef struct _MPI2_SGE_SIMPLE32
804 {
805 U32 FlagsLength;
806 U32 Address;
807 } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32,
808 Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t;
809
810 typedef struct _MPI2_SGE_SIMPLE64
811 {
812 U32 FlagsLength;
813 U64 Address;
814 } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
815 Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
816
817 typedef struct _MPI2_SGE_SIMPLE_UNION
818 {
819 U32 FlagsLength;
820 union
821 {
822 U32 Address32;
823 U64 Address64;
824 } u;
825 } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
826 Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
827
828
829 /****************************************************************************
830 * MPI Chain Element structures - for MPI v2.0 products only
831 ****************************************************************************/
832
833 typedef struct _MPI2_SGE_CHAIN32
834 {
835 U16 Length;
836 U8 NextChainOffset;
837 U8 Flags;
838 U32 Address;
839 } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
840 Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
841
842 typedef struct _MPI2_SGE_CHAIN64
843 {
844 U16 Length;
845 U8 NextChainOffset;
846 U8 Flags;
847 U64 Address;
848 } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
849 Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
850
851 typedef struct _MPI2_SGE_CHAIN_UNION
852 {
853 U16 Length;
854 U8 NextChainOffset;
855 U8 Flags;
856 union
857 {
858 U32 Address32;
859 U64 Address64;
860 } u;
861 } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
862 Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
863
864
865 /****************************************************************************
866 * MPI Transaction Context Element structures - for MPI v2.0 products only
867 ****************************************************************************/
868
869 typedef struct _MPI2_SGE_TRANSACTION32
870 {
871 U8 Reserved;
872 U8 ContextSize;
873 U8 DetailsLength;
874 U8 Flags;
875 U32 TransactionContext[1];
876 U32 TransactionDetails[1];
877 } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
878 Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
879
880 typedef struct _MPI2_SGE_TRANSACTION64
881 {
882 U8 Reserved;
883 U8 ContextSize;
884 U8 DetailsLength;
885 U8 Flags;
886 U32 TransactionContext[2];
887 U32 TransactionDetails[1];
888 } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64,
889 Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t;
890
891 typedef struct _MPI2_SGE_TRANSACTION96
892 {
893 U8 Reserved;
894 U8 ContextSize;
895 U8 DetailsLength;
896 U8 Flags;
897 U32 TransactionContext[3];
898 U32 TransactionDetails[1];
899 } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96,
900 Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t;
901
902 typedef struct _MPI2_SGE_TRANSACTION128
903 {
904 U8 Reserved;
905 U8 ContextSize;
906 U8 DetailsLength;
907 U8 Flags;
908 U32 TransactionContext[4];
909 U32 TransactionDetails[1];
910 } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128,
911 Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128;
912
913 typedef struct _MPI2_SGE_TRANSACTION_UNION
914 {
915 U8 Reserved;
916 U8 ContextSize;
917 U8 DetailsLength;
918 U8 Flags;
919 union
920 {
921 U32 TransactionContext32[1];
922 U32 TransactionContext64[2];
923 U32 TransactionContext96[3];
924 U32 TransactionContext128[4];
925 } u;
926 U32 TransactionDetails[1];
927 } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
928 Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
929
930
931 /****************************************************************************
932 * MPI SGE union for IO SGL's - for MPI v2.0 products only
933 ****************************************************************************/
934
935 typedef struct _MPI2_MPI_SGE_IO_UNION
936 {
937 union
938 {
939 MPI2_SGE_SIMPLE_UNION Simple;
940 MPI2_SGE_CHAIN_UNION Chain;
941 } u;
942 } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
943 Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
944
945
946 /****************************************************************************
947 * MPI SGE union for SGL's with Simple and Transaction elements - for MPI v2.0 products only
948 ****************************************************************************/
949
950 typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
951 {
952 union
953 {
954 MPI2_SGE_SIMPLE_UNION Simple;
955 MPI2_SGE_TRANSACTION_UNION Transaction;
956 } u;
957 } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
958 Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
959
960
961 /****************************************************************************
962 * All MPI SGE types union
963 ****************************************************************************/
964
965 typedef struct _MPI2_MPI_SGE_UNION
966 {
967 union
968 {
969 MPI2_SGE_SIMPLE_UNION Simple;
970 MPI2_SGE_CHAIN_UNION Chain;
971 MPI2_SGE_TRANSACTION_UNION Transaction;
972 } u;
973 } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION,
974 Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t;
975
976
977 /****************************************************************************
978 * MPI SGE field definition and masks
979 ****************************************************************************/
980
981 /* Flags field bit definitions */
982
983 #define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
984 #define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
985 #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
986 #define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
987 #define MPI2_SGE_FLAGS_DIRECTION (0x04)
988 #define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
989 #define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
990
991 #define MPI2_SGE_FLAGS_SHIFT (24)
992
993 #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
994 #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
995
996 /* Element Type */
997
998 #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) /* for MPI v2.0 products only */
999 #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
1000 #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) /* for MPI v2.0 products only */
1001 #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
1002
1003 /* Address location */
1004
1005 #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
1006
1007 /* Direction */
1008
1009 #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
1010 #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
1011
1012 #define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST)
1013 #define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC)
1014
1015 /* Address Size */
1016
1017 #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
1018 #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
1019
1020 /* Context Size */
1021
1022 #define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
1023 #define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
1024 #define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
1025 #define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
1026
1027 #define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
1028 #define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
1029
1030 /****************************************************************************
1031 * MPI SGE operation Macros
1032 ****************************************************************************/
1033
1034 /* SIMPLE FlagsLength manipulations... */
1035 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
1036 #define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
1037 #define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
1038 #define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
1039
1040 #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
1041
1042 #define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
1043 #define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
1044 #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
1045
1046 /* CAUTION - The following are READ-MODIFY-WRITE! */
1047 #define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
1048 #define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
1049
1050 #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
1051
1052
1053 /*****************************************************************************
1054 *
1055 * Fusion-MPT IEEE Scatter Gather Elements
1056 *
1057 *****************************************************************************/
1058
1059 /****************************************************************************
1060 * IEEE Simple Element structures
1061 ****************************************************************************/
1062
1063 /* MPI2_IEEE_SGE_SIMPLE32 is for MPI v2.0 products only */
1064 typedef struct _MPI2_IEEE_SGE_SIMPLE32
1065 {
1066 U32 Address;
1067 U32 FlagsLength;
1068 } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
1069 Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
1070
1071 typedef struct _MPI2_IEEE_SGE_SIMPLE64
1072 {
1073 U64 Address;
1074 U32 Length;
1075 U16 Reserved1;
1076 U8 Reserved2;
1077 U8 Flags;
1078 } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
1079 Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
1080
1081 typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
1082 {
1083 MPI2_IEEE_SGE_SIMPLE32 Simple32;
1084 MPI2_IEEE_SGE_SIMPLE64 Simple64;
1085 } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
1086 Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
1087
1088
1089 /****************************************************************************
1090 * IEEE Chain Element structures
1091 ****************************************************************************/
1092
1093 /* MPI2_IEEE_SGE_CHAIN32 is for MPI v2.0 products only */
1094 typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32;
1095
1096 /* MPI2_IEEE_SGE_CHAIN64 is for MPI v2.0 products only */
1097 typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64;
1098
1099 typedef union _MPI2_IEEE_SGE_CHAIN_UNION
1100 {
1101 MPI2_IEEE_SGE_CHAIN32 Chain32;
1102 MPI2_IEEE_SGE_CHAIN64 Chain64;
1103 } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
1104 Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
1105
1106 /* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */
1107 typedef struct _MPI25_IEEE_SGE_CHAIN64
1108 {
1109 U64 Address;
1110 U32 Length;
1111 U16 Reserved1;
1112 U8 NextChainOffset;
1113 U8 Flags;
1114 } MPI25_IEEE_SGE_CHAIN64, MPI2_POINTER PTR_MPI25_IEEE_SGE_CHAIN64,
1115 Mpi25IeeeSgeChain64_t, MPI2_POINTER pMpi25IeeeSgeChain64_t;
1116
1117
1118 /****************************************************************************
1119 * All IEEE SGE types union
1120 ****************************************************************************/
1121
1122 /* MPI2_IEEE_SGE_UNION is for MPI v2.0 products only */
1123 typedef struct _MPI2_IEEE_SGE_UNION
1124 {
1125 union
1126 {
1127 MPI2_IEEE_SGE_SIMPLE_UNION Simple;
1128 MPI2_IEEE_SGE_CHAIN_UNION Chain;
1129 } u;
1130 } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
1131 Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
1132
1133
1134 /****************************************************************************
1135 * IEEE SGE union for IO SGL's
1136 ****************************************************************************/
1137
1138 typedef union _MPI25_SGE_IO_UNION
1139 {
1140 MPI2_IEEE_SGE_SIMPLE64 IeeeSimple;
1141 MPI25_IEEE_SGE_CHAIN64 IeeeChain;
1142 } MPI25_SGE_IO_UNION, MPI2_POINTER PTR_MPI25_SGE_IO_UNION,
1143 Mpi25SGEIOUnion_t, MPI2_POINTER pMpi25SGEIOUnion_t;
1144
1145
1146 /****************************************************************************
1147 * IEEE SGE field definitions and masks
1148 ****************************************************************************/
1149
1150 /* Flags field bit definitions */
1151
1152 #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
1153 #define MPI25_IEEE_SGE_FLAGS_END_OF_LIST (0x40)
1154
1155 #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
1156
1157 #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
1158
1159 /* Element Type */
1160
1161 #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
1162 #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
1163
1164 /* Data Location Address Space */
1165
1166 #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
1167 #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) /* IEEE Simple Element only */
1168 #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) /* IEEE Simple Element only */
1169 #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
1170 #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) /* IEEE Simple Element only */
1171 #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR (0x03) /* IEEE Chain Element only */
1172
1173
1174 /****************************************************************************
1175 * IEEE SGE operation Macros
1176 ****************************************************************************/
1177
1178 /* SIMPLE FlagsLength manipulations... */
1179 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1180 #define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1181 #define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1182
1183 #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1184
1185 #define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1186 #define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1187 #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1188
1189 /* CAUTION - The following are READ-MODIFY-WRITE! */
1190 #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1191 #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
1192
1193
1194
1195
1196 /*****************************************************************************
1197 *
1198 * Fusion-MPT MPI/IEEE Scatter Gather Unions
1199 *
1200 *****************************************************************************/
1201
1202 typedef union _MPI2_SIMPLE_SGE_UNION
1203 {
1204 MPI2_SGE_SIMPLE_UNION MpiSimple;
1205 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1206 } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION,
1207 Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t;
1208
1209
1210 typedef union _MPI2_SGE_IO_UNION
1211 {
1212 MPI2_SGE_SIMPLE_UNION MpiSimple;
1213 MPI2_SGE_CHAIN_UNION MpiChain;
1214 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1215 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
1216 } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION,
1217 Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t;
1218
1219
1220 /****************************************************************************
1221 *
1222 * Values for SGLFlags field, used in many request messages with an SGL
1223 *
1224 ****************************************************************************/
1225
1226 /* values for MPI SGL Data Location Address Space subfield */
1227 #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
1228 #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
1229 #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
1230 #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
1231 #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
1232 /* values for SGL Type subfield */
1233 #define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
1234 #define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
1235 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01)
1236 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)
1237
1238
1239 #endif
1240