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4853 illumos-gate is not lint-clean when built with openssl 1.0
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--- old/usr/src/lib/openssl/libsunw_crypto/pl/x86cpuid.pl
+++ new/usr/src/lib/openssl/libsunw_crypto/pl/x86cpuid.pl
1 1 #!/usr/bin/env perl
2 2
3 3 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
4 -push(@INC, "${dir}perlasm", "perlasm");
4 +push(@INC, "${dir}", "perlasm");
5 5 require "x86asm.pl";
6 6
7 7 &asm_init($ARGV[0],"x86cpuid");
8 8
9 9 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
10 10
11 11 &function_begin("OPENSSL_ia32_cpuid");
12 12 &xor ("edx","edx");
13 13 &pushf ();
14 14 &pop ("eax");
15 15 &mov ("ecx","eax");
16 16 &xor ("eax",1<<21);
17 17 &push ("eax");
18 18 &popf ();
19 19 &pushf ();
20 20 &pop ("eax");
21 21 &xor ("ecx","eax");
22 22 &xor ("eax","eax");
23 23 &bt ("ecx",21);
24 24 &jnc (&label("nocpuid"));
25 25 &cpuid ();
26 26 &mov ("edi","eax"); # max value for standard query level
27 27
28 28 &xor ("eax","eax");
29 29 &cmp ("ebx",0x756e6547); # "Genu"
30 30 &setne (&LB("eax"));
31 31 &mov ("ebp","eax");
32 32 &cmp ("edx",0x49656e69); # "ineI"
33 33 &setne (&LB("eax"));
34 34 &or ("ebp","eax");
35 35 &cmp ("ecx",0x6c65746e); # "ntel"
36 36 &setne (&LB("eax"));
37 37 &or ("ebp","eax"); # 0 indicates Intel CPU
38 38 &jz (&label("intel"));
39 39
40 40 &cmp ("ebx",0x68747541); # "Auth"
41 41 &setne (&LB("eax"));
42 42 &mov ("esi","eax");
43 43 &cmp ("edx",0x69746E65); # "enti"
44 44 &setne (&LB("eax"));
45 45 &or ("esi","eax");
46 46 &cmp ("ecx",0x444D4163); # "cAMD"
47 47 &setne (&LB("eax"));
48 48 &or ("esi","eax"); # 0 indicates AMD CPU
49 49 &jnz (&label("intel"));
50 50
51 51 # AMD specific
52 52 &mov ("eax",0x80000000);
53 53 &cpuid ();
54 54 &cmp ("eax",0x80000001);
55 55 &jb (&label("intel"));
56 56 &mov ("esi","eax");
57 57 &mov ("eax",0x80000001);
58 58 &cpuid ();
59 59 &or ("ebp","ecx");
60 60 &and ("ebp",1<<11|1); # isolate XOP bit
61 61 &cmp ("esi",0x80000008);
62 62 &jb (&label("intel"));
63 63
64 64 &mov ("eax",0x80000008);
65 65 &cpuid ();
66 66 &movz ("esi",&LB("ecx")); # number of cores - 1
67 67 &inc ("esi"); # number of cores
68 68
69 69 &mov ("eax",1);
70 70 &xor ("ecx","ecx");
71 71 &cpuid ();
72 72 &bt ("edx",28);
73 73 &jnc (&label("generic"));
74 74 &shr ("ebx",16);
75 75 &and ("ebx",0xff);
76 76 &cmp ("ebx","esi");
77 77 &ja (&label("generic"));
78 78 &and ("edx",0xefffffff); # clear hyper-threading bit
79 79 &jmp (&label("generic"));
80 80
81 81 &set_label("intel");
82 82 &cmp ("edi",4);
83 83 &mov ("edi",-1);
84 84 &jb (&label("nocacheinfo"));
85 85
86 86 &mov ("eax",4);
87 87 &mov ("ecx",0); # query L1D
88 88 &cpuid ();
89 89 &mov ("edi","eax");
90 90 &shr ("edi",14);
91 91 &and ("edi",0xfff); # number of cores -1 per L1D
92 92
93 93 &set_label("nocacheinfo");
94 94 &mov ("eax",1);
95 95 &xor ("ecx","ecx");
96 96 &cpuid ();
97 97 &and ("edx",0xbfefffff); # force reserved bits #20, #30 to 0
98 98 &cmp ("ebp",0);
99 99 &jne (&label("notintel"));
100 100 &or ("edx",1<<30); # set reserved bit#30 on Intel CPUs
101 101 &and (&HB("eax"),15); # familiy ID
102 102 &cmp (&HB("eax"),15); # P4?
103 103 &jne (&label("notintel"));
104 104 &or ("edx",1<<20); # set reserved bit#20 to engage RC4_CHAR
105 105 &set_label("notintel");
106 106 &bt ("edx",28); # test hyper-threading bit
107 107 &jnc (&label("generic"));
108 108 &and ("edx",0xefffffff);
109 109 &cmp ("edi",0);
110 110 &je (&label("generic"));
111 111
112 112 &or ("edx",0x10000000);
113 113 &shr ("ebx",16);
114 114 &cmp (&LB("ebx"),1);
115 115 &ja (&label("generic"));
116 116 &and ("edx",0xefffffff); # clear hyper-threading bit if not
117 117
118 118 &set_label("generic");
119 119 &and ("ebp",1<<11); # isolate AMD XOP flag
120 120 &and ("ecx",0xfffff7ff); # force 11th bit to 0
121 121 &mov ("esi","edx");
122 122 &or ("ebp","ecx"); # merge AMD XOP flag
123 123
124 124 &bt ("ecx",27); # check OSXSAVE bit
125 125 &jnc (&label("clear_avx"));
126 126 &xor ("ecx","ecx");
127 127 &data_byte(0x0f,0x01,0xd0); # xgetbv
128 128 &and ("eax",6);
129 129 &cmp ("eax",6);
130 130 &je (&label("done"));
131 131 &cmp ("eax",2);
132 132 &je (&label("clear_avx"));
133 133 &set_label("clear_xmm");
134 134 &and ("ebp",0xfdfffffd); # clear AESNI and PCLMULQDQ bits
135 135 &and ("esi",0xfeffffff); # clear FXSR
136 136 &set_label("clear_avx");
137 137 &and ("ebp",0xefffe7ff); # clear AVX, FMA and AMD XOP bits
138 138 &set_label("done");
139 139 &mov ("eax","esi");
140 140 &mov ("edx","ebp");
141 141 &set_label("nocpuid");
142 142 &function_end("OPENSSL_ia32_cpuid");
143 143
144 144 &external_label("OPENSSL_ia32cap_P");
145 145
146 146 &function_begin_B("OPENSSL_rdtsc","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
147 147 &xor ("eax","eax");
148 148 &xor ("edx","edx");
149 149 &picmeup("ecx","OPENSSL_ia32cap_P");
150 150 &bt (&DWP(0,"ecx"),4);
151 151 &jnc (&label("notsc"));
152 152 &rdtsc ();
153 153 &set_label("notsc");
154 154 &ret ();
155 155 &function_end_B("OPENSSL_rdtsc");
156 156
157 157 # This works in Ring 0 only [read DJGPP+MS-DOS+privileged DPMI host],
158 158 # but it's safe to call it on any [supported] 32-bit platform...
159 159 # Just check for [non-]zero return value...
160 160 &function_begin_B("OPENSSL_instrument_halt","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
161 161 &picmeup("ecx","OPENSSL_ia32cap_P");
162 162 &bt (&DWP(0,"ecx"),4);
163 163 &jnc (&label("nohalt")); # no TSC
164 164
165 165 &data_word(0x9058900e); # push %cs; pop %eax
166 166 &and ("eax",3);
167 167 &jnz (&label("nohalt")); # not enough privileges
168 168
169 169 &pushf ();
170 170 &pop ("eax");
171 171 &bt ("eax",9);
172 172 &jnc (&label("nohalt")); # interrupts are disabled
173 173
174 174 &rdtsc ();
175 175 &push ("edx");
176 176 &push ("eax");
177 177 &halt ();
178 178 &rdtsc ();
179 179
180 180 &sub ("eax",&DWP(0,"esp"));
181 181 &sbb ("edx",&DWP(4,"esp"));
182 182 &add ("esp",8);
183 183 &ret ();
184 184
185 185 &set_label("nohalt");
186 186 &xor ("eax","eax");
187 187 &xor ("edx","edx");
188 188 &ret ();
189 189 &function_end_B("OPENSSL_instrument_halt");
190 190
191 191 # Essentially there is only one use for this function. Under DJGPP:
192 192 #
193 193 # #include <go32.h>
194 194 # ...
195 195 # i=OPENSSL_far_spin(_dos_ds,0x46c);
196 196 # ...
197 197 # to obtain the number of spins till closest timer interrupt.
198 198
199 199 &function_begin_B("OPENSSL_far_spin");
200 200 &pushf ();
201 201 &pop ("eax")
202 202 &bt ("eax",9);
203 203 &jnc (&label("nospin")); # interrupts are disabled
204 204
205 205 &mov ("eax",&DWP(4,"esp"));
206 206 &mov ("ecx",&DWP(8,"esp"));
207 207 &data_word (0x90d88e1e); # push %ds, mov %eax,%ds
208 208 &xor ("eax","eax");
209 209 &mov ("edx",&DWP(0,"ecx"));
210 210 &jmp (&label("spin"));
211 211
212 212 &align (16);
213 213 &set_label("spin");
214 214 &inc ("eax");
215 215 &cmp ("edx",&DWP(0,"ecx"));
216 216 &je (&label("spin"));
217 217
218 218 &data_word (0x1f909090); # pop %ds
219 219 &ret ();
220 220
221 221 &set_label("nospin");
222 222 &xor ("eax","eax");
223 223 &xor ("edx","edx");
224 224 &ret ();
225 225 &function_end_B("OPENSSL_far_spin");
226 226
227 227 &function_begin_B("OPENSSL_wipe_cpu","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
228 228 &xor ("eax","eax");
229 229 &xor ("edx","edx");
230 230 &picmeup("ecx","OPENSSL_ia32cap_P");
231 231 &mov ("ecx",&DWP(0,"ecx"));
232 232 &bt (&DWP(0,"ecx"),1);
233 233 &jnc (&label("no_x87"));
234 234 if ($sse2) {
235 235 &and ("ecx",1<<26|1<<24); # check SSE2 and FXSR bits
236 236 &cmp ("ecx",1<<26|1<<24);
237 237 &jne (&label("no_sse2"));
238 238 &pxor ("xmm0","xmm0");
239 239 &pxor ("xmm1","xmm1");
240 240 &pxor ("xmm2","xmm2");
241 241 &pxor ("xmm3","xmm3");
242 242 &pxor ("xmm4","xmm4");
243 243 &pxor ("xmm5","xmm5");
244 244 &pxor ("xmm6","xmm6");
245 245 &pxor ("xmm7","xmm7");
246 246 &set_label("no_sse2");
247 247 }
248 248 # just a bunch of fldz to zap the fp/mm bank followed by finit...
249 249 &data_word(0xeed9eed9,0xeed9eed9,0xeed9eed9,0xeed9eed9,0x90e3db9b);
250 250 &set_label("no_x87");
251 251 &lea ("eax",&DWP(4,"esp"));
252 252 &ret ();
253 253 &function_end_B("OPENSSL_wipe_cpu");
254 254
255 255 &function_begin_B("OPENSSL_atomic_add");
256 256 &mov ("edx",&DWP(4,"esp")); # fetch the pointer, 1st arg
257 257 &mov ("ecx",&DWP(8,"esp")); # fetch the increment, 2nd arg
258 258 &push ("ebx");
259 259 &nop ();
260 260 &mov ("eax",&DWP(0,"edx"));
261 261 &set_label("spin");
262 262 &lea ("ebx",&DWP(0,"eax","ecx"));
263 263 &nop ();
264 264 &data_word(0x1ab10ff0); # lock; cmpxchg %ebx,(%edx) # %eax is envolved and is always reloaded
265 265 &jne (&label("spin"));
266 266 &mov ("eax","ebx"); # OpenSSL expects the new value
267 267 &pop ("ebx");
268 268 &ret ();
269 269 &function_end_B("OPENSSL_atomic_add");
270 270
271 271 # This function can become handy under Win32 in situations when
272 272 # we don't know which calling convention, __stdcall or __cdecl(*),
273 273 # indirect callee is using. In C it can be deployed as
274 274 #
275 275 #ifdef OPENSSL_CPUID_OBJ
276 276 # type OPENSSL_indirect_call(void *f,...);
277 277 # ...
278 278 # OPENSSL_indirect_call(func,[up to $max arguments]);
279 279 #endif
280 280 #
281 281 # (*) it's designed to work even for __fastcall if number of
282 282 # arguments is 1 or 2!
283 283 &function_begin_B("OPENSSL_indirect_call");
284 284 {
285 285 my ($max,$i)=(7,); # $max has to be chosen as 4*n-1
286 286 # in order to preserve eventual
287 287 # stack alignment
288 288 &push ("ebp");
289 289 &mov ("ebp","esp");
290 290 &sub ("esp",$max*4);
291 291 &mov ("ecx",&DWP(12,"ebp"));
292 292 &mov (&DWP(0,"esp"),"ecx");
293 293 &mov ("edx",&DWP(16,"ebp"));
294 294 &mov (&DWP(4,"esp"),"edx");
295 295 for($i=2;$i<$max;$i++)
296 296 {
297 297 # Some copies will be redundant/bogus...
298 298 &mov ("eax",&DWP(12+$i*4,"ebp"));
299 299 &mov (&DWP(0+$i*4,"esp"),"eax");
300 300 }
301 301 &call_ptr (&DWP(8,"ebp"));# make the call...
302 302 &mov ("esp","ebp"); # ... and just restore the stack pointer
303 303 # without paying attention to what we called,
304 304 # (__cdecl *func) or (__stdcall *one).
305 305 &pop ("ebp");
306 306 &ret ();
307 307 }
308 308 &function_end_B("OPENSSL_indirect_call");
309 309
310 310 &function_begin_B("OPENSSL_cleanse");
311 311 &mov ("edx",&wparam(0));
312 312 &mov ("ecx",&wparam(1));
313 313 &xor ("eax","eax");
314 314 &cmp ("ecx",7);
315 315 &jae (&label("lot"));
316 316 &cmp ("ecx",0);
317 317 &je (&label("ret"));
318 318 &set_label("little");
319 319 &mov (&BP(0,"edx"),"al");
320 320 &sub ("ecx",1);
321 321 &lea ("edx",&DWP(1,"edx"));
322 322 &jnz (&label("little"));
323 323 &set_label("ret");
324 324 &ret ();
325 325
326 326 &set_label("lot",16);
327 327 &test ("edx",3);
328 328 &jz (&label("aligned"));
329 329 &mov (&BP(0,"edx"),"al");
330 330 &lea ("ecx",&DWP(-1,"ecx"));
331 331 &lea ("edx",&DWP(1,"edx"));
332 332 &jmp (&label("lot"));
333 333 &set_label("aligned");
334 334 &mov (&DWP(0,"edx"),"eax");
335 335 &lea ("ecx",&DWP(-4,"ecx"));
336 336 &test ("ecx",-4);
337 337 &lea ("edx",&DWP(4,"edx"));
338 338 &jnz (&label("aligned"));
339 339 &cmp ("ecx",0);
340 340 &jne (&label("little"));
341 341 &ret ();
342 342 &function_end_B("OPENSSL_cleanse");
343 343
344 344 &function_begin_B("OPENSSL_ia32_rdrand");
345 345 &mov ("ecx",8);
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346 346 &set_label("loop");
347 347 &rdrand ("eax");
348 348 &jc (&label("break"));
349 349 &loop (&label("loop"));
350 350 &set_label("break");
351 351 &cmp ("eax",0);
352 352 &cmove ("eax","ecx");
353 353 &ret ();
354 354 &function_end_B("OPENSSL_ia32_rdrand");
355 355
356 +&initseg("illumos_locking_setup");
356 357 &initseg("OPENSSL_cpuid_setup");
358 +
359 +&hidden("illumos_locking_setup");
360 +&hidden("OPENSSL_cpuid_setup");
361 +&hidden("OPENSSL_ia32cap_P");
357 362
358 363 &asm_finish();
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