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4853 illumos-gate is not lint-clean when built with openssl 1.0
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--- old/usr/src/lib/openssl/libsunw_crypto/pl/x86_64cpuid.pl
+++ new/usr/src/lib/openssl/libsunw_crypto/pl/x86_64cpuid.pl
1 1 #!/usr/bin/env perl
2 2
3 3 $flavour = shift;
4 4 $output = shift;
5 5 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
6 6
7 7 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
8 8
9 9 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
10 10 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
11 11 ( $xlate="${dir}perlasm/x86_64-xlate.pl" and -f $xlate) or
12 12 die "can't locate x86_64-xlate.pl";
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13 13
14 14 open OUT,"| \"$^X\" $xlate $flavour $output";
15 15 *STDOUT=*OUT;
16 16
17 17 ($arg1,$arg2,$arg3,$arg4)=$win64?("%rcx","%rdx","%r8", "%r9") : # Win64 order
18 18 ("%rdi","%rsi","%rdx","%rcx"); # Unix order
19 19
20 20 print<<___;
21 21 .extern OPENSSL_cpuid_setup
22 22 .hidden OPENSSL_cpuid_setup
23 +.extern illumos_locking_setup
24 +.hidden illumos_locking_setup
23 25 .section .init
26 + call illumos_locking_setup
24 27 call OPENSSL_cpuid_setup
25 28
26 29 .hidden OPENSSL_ia32cap_P
27 30 .comm OPENSSL_ia32cap_P,8,4
28 31
29 32 .text
30 33
31 34 .globl OPENSSL_atomic_add
32 35 .type OPENSSL_atomic_add,\@abi-omnipotent
33 36 .align 16
34 37 OPENSSL_atomic_add:
35 38 movl ($arg1),%eax
36 39 .Lspin: leaq ($arg2,%rax),%r8
37 40 .byte 0xf0 # lock
38 41 cmpxchgl %r8d,($arg1)
39 42 jne .Lspin
40 43 movl %r8d,%eax
41 44 .byte 0x48,0x98 # cltq/cdqe
42 45 ret
43 46 .size OPENSSL_atomic_add,.-OPENSSL_atomic_add
44 47
45 48 .globl OPENSSL_rdtsc
46 49 .type OPENSSL_rdtsc,\@abi-omnipotent
47 50 .align 16
48 51 OPENSSL_rdtsc:
49 52 rdtsc
50 53 shl \$32,%rdx
51 54 or %rdx,%rax
52 55 ret
53 56 .size OPENSSL_rdtsc,.-OPENSSL_rdtsc
54 57
55 58 .globl OPENSSL_ia32_cpuid
56 59 .type OPENSSL_ia32_cpuid,\@abi-omnipotent
57 60 .align 16
58 61 OPENSSL_ia32_cpuid:
59 62 mov %rbx,%r8 # save %rbx
60 63
61 64 xor %eax,%eax
62 65 cpuid
63 66 mov %eax,%r11d # max value for standard query level
64 67
65 68 xor %eax,%eax
66 69 cmp \$0x756e6547,%ebx # "Genu"
67 70 setne %al
68 71 mov %eax,%r9d
69 72 cmp \$0x49656e69,%edx # "ineI"
70 73 setne %al
71 74 or %eax,%r9d
72 75 cmp \$0x6c65746e,%ecx # "ntel"
73 76 setne %al
74 77 or %eax,%r9d # 0 indicates Intel CPU
75 78 jz .Lintel
76 79
77 80 cmp \$0x68747541,%ebx # "Auth"
78 81 setne %al
79 82 mov %eax,%r10d
80 83 cmp \$0x69746E65,%edx # "enti"
81 84 setne %al
82 85 or %eax,%r10d
83 86 cmp \$0x444D4163,%ecx # "cAMD"
84 87 setne %al
85 88 or %eax,%r10d # 0 indicates AMD CPU
86 89 jnz .Lintel
87 90
88 91 # AMD specific
89 92 mov \$0x80000000,%eax
90 93 cpuid
91 94 cmp \$0x80000001,%eax
92 95 jb .Lintel
93 96 mov %eax,%r10d
94 97 mov \$0x80000001,%eax
95 98 cpuid
96 99 or %ecx,%r9d
97 100 and \$0x00000801,%r9d # isolate AMD XOP bit, 1<<11
98 101
99 102 cmp \$0x80000008,%r10d
100 103 jb .Lintel
101 104
102 105 mov \$0x80000008,%eax
103 106 cpuid
104 107 movzb %cl,%r10 # number of cores - 1
105 108 inc %r10 # number of cores
106 109
107 110 mov \$1,%eax
108 111 cpuid
109 112 bt \$28,%edx # test hyper-threading bit
110 113 jnc .Lgeneric
111 114 shr \$16,%ebx # number of logical processors
112 115 cmp %r10b,%bl
113 116 ja .Lgeneric
114 117 and \$0xefffffff,%edx # ~(1<<28)
115 118 jmp .Lgeneric
116 119
117 120 .Lintel:
118 121 cmp \$4,%r11d
119 122 mov \$-1,%r10d
120 123 jb .Lnocacheinfo
121 124
122 125 mov \$4,%eax
123 126 mov \$0,%ecx # query L1D
124 127 cpuid
125 128 mov %eax,%r10d
126 129 shr \$14,%r10d
127 130 and \$0xfff,%r10d # number of cores -1 per L1D
128 131
129 132 .Lnocacheinfo:
130 133 mov \$1,%eax
131 134 cpuid
132 135 and \$0xbfefffff,%edx # force reserved bits to 0
133 136 cmp \$0,%r9d
134 137 jne .Lnotintel
135 138 or \$0x40000000,%edx # set reserved bit#30 on Intel CPUs
136 139 and \$15,%ah
137 140 cmp \$15,%ah # examine Family ID
138 141 jne .Lnotintel
139 142 or \$0x00100000,%edx # set reserved bit#20 to engage RC4_CHAR
140 143 .Lnotintel:
141 144 bt \$28,%edx # test hyper-threading bit
142 145 jnc .Lgeneric
143 146 and \$0xefffffff,%edx # ~(1<<28)
144 147 cmp \$0,%r10d
145 148 je .Lgeneric
146 149
147 150 or \$0x10000000,%edx # 1<<28
148 151 shr \$16,%ebx
149 152 cmp \$1,%bl # see if cache is shared
150 153 ja .Lgeneric
151 154 and \$0xefffffff,%edx # ~(1<<28)
152 155 .Lgeneric:
153 156 and \$0x00000800,%r9d # isolate AMD XOP flag
154 157 and \$0xfffff7ff,%ecx
155 158 or %ecx,%r9d # merge AMD XOP flag
156 159
157 160 mov %edx,%r10d # %r9d:%r10d is copy of %ecx:%edx
158 161 bt \$27,%r9d # check OSXSAVE bit
159 162 jnc .Lclear_avx
160 163 xor %ecx,%ecx # XCR0
161 164 .byte 0x0f,0x01,0xd0 # xgetbv
162 165 and \$6,%eax # isolate XMM and YMM state support
163 166 cmp \$6,%eax
164 167 je .Ldone
165 168 .Lclear_avx:
166 169 mov \$0xefffe7ff,%eax # ~(1<<28|1<<12|1<<11)
167 170 and %eax,%r9d # clear AVX, FMA and AMD XOP bits
168 171 .Ldone:
169 172 shl \$32,%r9
170 173 mov %r10d,%eax
171 174 mov %r8,%rbx # restore %rbx
172 175 or %r9,%rax
173 176 ret
174 177 .size OPENSSL_ia32_cpuid,.-OPENSSL_ia32_cpuid
175 178
176 179 .globl OPENSSL_cleanse
177 180 .type OPENSSL_cleanse,\@abi-omnipotent
178 181 .align 16
179 182 OPENSSL_cleanse:
180 183 xor %rax,%rax
181 184 cmp \$15,$arg2
182 185 jae .Lot
183 186 cmp \$0,$arg2
184 187 je .Lret
185 188 .Little:
186 189 mov %al,($arg1)
187 190 sub \$1,$arg2
188 191 lea 1($arg1),$arg1
189 192 jnz .Little
190 193 .Lret:
191 194 ret
192 195 .align 16
193 196 .Lot:
194 197 test \$7,$arg1
195 198 jz .Laligned
196 199 mov %al,($arg1)
197 200 lea -1($arg2),$arg2
198 201 lea 1($arg1),$arg1
199 202 jmp .Lot
200 203 .Laligned:
201 204 mov %rax,($arg1)
202 205 lea -8($arg2),$arg2
203 206 test \$-8,$arg2
204 207 lea 8($arg1),$arg1
205 208 jnz .Laligned
206 209 cmp \$0,$arg2
207 210 jne .Little
208 211 ret
209 212 .size OPENSSL_cleanse,.-OPENSSL_cleanse
210 213 ___
211 214
212 215 print<<___ if (!$win64);
213 216 .globl OPENSSL_wipe_cpu
214 217 .type OPENSSL_wipe_cpu,\@abi-omnipotent
215 218 .align 16
216 219 OPENSSL_wipe_cpu:
217 220 pxor %xmm0,%xmm0
218 221 pxor %xmm1,%xmm1
219 222 pxor %xmm2,%xmm2
220 223 pxor %xmm3,%xmm3
221 224 pxor %xmm4,%xmm4
222 225 pxor %xmm5,%xmm5
223 226 pxor %xmm6,%xmm6
224 227 pxor %xmm7,%xmm7
225 228 pxor %xmm8,%xmm8
226 229 pxor %xmm9,%xmm9
227 230 pxor %xmm10,%xmm10
228 231 pxor %xmm11,%xmm11
229 232 pxor %xmm12,%xmm12
230 233 pxor %xmm13,%xmm13
231 234 pxor %xmm14,%xmm14
232 235 pxor %xmm15,%xmm15
233 236 xorq %rcx,%rcx
234 237 xorq %rdx,%rdx
235 238 xorq %rsi,%rsi
236 239 xorq %rdi,%rdi
237 240 xorq %r8,%r8
238 241 xorq %r9,%r9
239 242 xorq %r10,%r10
240 243 xorq %r11,%r11
241 244 leaq 8(%rsp),%rax
242 245 ret
243 246 .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
244 247 ___
245 248 print<<___ if ($win64);
246 249 .globl OPENSSL_wipe_cpu
247 250 .type OPENSSL_wipe_cpu,\@abi-omnipotent
248 251 .align 16
249 252 OPENSSL_wipe_cpu:
250 253 pxor %xmm0,%xmm0
251 254 pxor %xmm1,%xmm1
252 255 pxor %xmm2,%xmm2
253 256 pxor %xmm3,%xmm3
254 257 pxor %xmm4,%xmm4
255 258 pxor %xmm5,%xmm5
256 259 xorq %rcx,%rcx
257 260 xorq %rdx,%rdx
258 261 xorq %r8,%r8
259 262 xorq %r9,%r9
260 263 xorq %r10,%r10
261 264 xorq %r11,%r11
262 265 leaq 8(%rsp),%rax
263 266 ret
264 267 .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
265 268 ___
266 269
267 270 print<<___;
268 271 .globl OPENSSL_ia32_rdrand
269 272 .type OPENSSL_ia32_rdrand,\@abi-omnipotent
270 273 .align 16
271 274 OPENSSL_ia32_rdrand:
272 275 mov \$8,%ecx
273 276 .Loop_rdrand:
274 277 rdrand %rax
275 278 jc .Lbreak_rdrand
276 279 loop .Loop_rdrand
277 280 .Lbreak_rdrand:
278 281 cmp \$0,%rax
279 282 cmove %rcx,%rax
280 283 ret
281 284 .size OPENSSL_ia32_rdrand,.-OPENSSL_ia32_rdrand
282 285 ___
283 286
284 287 close STDOUT; # flush
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