Print this page
Bring back LX zones.
| Split |
Close |
| Expand all |
| Collapse all |
--- old/usr/src/uts/intel/ia32/os/archdep.c
+++ new/usr/src/uts/intel/ia32/os/archdep.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
23 23 */
24 24
25 25 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
26 26 /* All Rights Reserved */
27 27 /*
28 28 * Copyright (c) 2012, Joyent, Inc. All rights reserved.
29 29 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
30 30 */
31 31
32 32 #include <sys/param.h>
33 33 #include <sys/types.h>
34 34 #include <sys/vmparam.h>
35 35 #include <sys/systm.h>
36 36 #include <sys/signal.h>
37 37 #include <sys/stack.h>
38 38 #include <sys/regset.h>
39 39 #include <sys/privregs.h>
40 40 #include <sys/frame.h>
41 41 #include <sys/proc.h>
42 42 #include <sys/psw.h>
43 43 #include <sys/siginfo.h>
44 44 #include <sys/cpuvar.h>
45 45 #include <sys/asm_linkage.h>
46 46 #include <sys/kmem.h>
47 47 #include <sys/errno.h>
48 48 #include <sys/bootconf.h>
49 49 #include <sys/archsystm.h>
50 50 #include <sys/debug.h>
51 51 #include <sys/elf.h>
52 52 #include <sys/spl.h>
53 53 #include <sys/time.h>
54 54 #include <sys/atomic.h>
55 55 #include <sys/sysmacros.h>
56 56 #include <sys/cmn_err.h>
57 57 #include <sys/modctl.h>
58 58 #include <sys/kobj.h>
59 59 #include <sys/panic.h>
60 60 #include <sys/reboot.h>
61 61 #include <sys/time.h>
62 62 #include <sys/fp.h>
63 63 #include <sys/x86_archext.h>
64 64 #include <sys/auxv.h>
65 65 #include <sys/auxv_386.h>
66 66 #include <sys/dtrace.h>
67 67 #include <sys/brand.h>
68 68 #include <sys/machbrand.h>
69 69 #include <sys/cmn_err.h>
70 70
71 71 extern const struct fnsave_state x87_initial;
72 72 extern const struct fxsave_state sse_initial;
73 73
74 74 /*
75 75 * Map an fnsave-formatted save area into an fxsave-formatted save area.
76 76 *
77 77 * Most fields are the same width, content and semantics. However
78 78 * the tag word is compressed.
79 79 */
80 80 static void
81 81 fnsave_to_fxsave(const struct fnsave_state *fn, struct fxsave_state *fx)
82 82 {
83 83 uint_t i, tagbits;
84 84
85 85 fx->fx_fcw = fn->f_fcw;
86 86 fx->fx_fsw = fn->f_fsw;
87 87
88 88 /*
89 89 * copy element by element (because of holes)
90 90 */
91 91 for (i = 0; i < 8; i++)
92 92 bcopy(&fn->f_st[i].fpr_16[0], &fx->fx_st[i].fpr_16[0],
93 93 sizeof (fn->f_st[0].fpr_16)); /* 80-bit x87-style floats */
94 94
95 95 /*
96 96 * synthesize compressed tag bits
97 97 */
98 98 fx->fx_fctw = 0;
99 99 for (tagbits = fn->f_ftw, i = 0; i < 8; i++, tagbits >>= 2)
100 100 if ((tagbits & 3) != 3)
101 101 fx->fx_fctw |= (1 << i);
102 102
103 103 fx->fx_fop = fn->f_fop;
104 104
105 105 #if defined(__amd64)
106 106 fx->fx_rip = (uint64_t)fn->f_eip;
107 107 fx->fx_rdp = (uint64_t)fn->f_dp;
108 108 #else
109 109 fx->fx_eip = fn->f_eip;
110 110 fx->fx_cs = fn->f_cs;
111 111 fx->__fx_ign0 = 0;
112 112 fx->fx_dp = fn->f_dp;
113 113 fx->fx_ds = fn->f_ds;
114 114 fx->__fx_ign1 = 0;
115 115 #endif
116 116 }
117 117
118 118 /*
119 119 * Map from an fxsave-format save area to an fnsave-format save area.
120 120 */
121 121 static void
122 122 fxsave_to_fnsave(const struct fxsave_state *fx, struct fnsave_state *fn)
123 123 {
124 124 uint_t i, top, tagbits;
125 125
126 126 fn->f_fcw = fx->fx_fcw;
127 127 fn->__f_ign0 = 0;
128 128 fn->f_fsw = fx->fx_fsw;
129 129 fn->__f_ign1 = 0;
130 130
131 131 top = (fx->fx_fsw & FPS_TOP) >> 11;
132 132
133 133 /*
134 134 * copy element by element (because of holes)
135 135 */
136 136 for (i = 0; i < 8; i++)
137 137 bcopy(&fx->fx_st[i].fpr_16[0], &fn->f_st[i].fpr_16[0],
138 138 sizeof (fn->f_st[0].fpr_16)); /* 80-bit x87-style floats */
139 139
140 140 /*
141 141 * synthesize uncompressed tag bits
142 142 */
143 143 fn->f_ftw = 0;
144 144 for (tagbits = fx->fx_fctw, i = 0; i < 8; i++, tagbits >>= 1) {
145 145 uint_t ibit, expo;
146 146 const uint16_t *fpp;
147 147 static const uint16_t zero[5] = { 0, 0, 0, 0, 0 };
148 148
149 149 if ((tagbits & 1) == 0) {
150 150 fn->f_ftw |= 3 << (i << 1); /* empty */
151 151 continue;
152 152 }
153 153
154 154 /*
155 155 * (tags refer to *physical* registers)
156 156 */
157 157 fpp = &fx->fx_st[(i - top + 8) & 7].fpr_16[0];
158 158 ibit = fpp[3] >> 15;
159 159 expo = fpp[4] & 0x7fff;
160 160
161 161 if (ibit && expo != 0 && expo != 0x7fff)
162 162 continue; /* valid fp number */
163 163
164 164 if (bcmp(fpp, &zero, sizeof (zero)))
165 165 fn->f_ftw |= 2 << (i << 1); /* NaN */
166 166 else
167 167 fn->f_ftw |= 1 << (i << 1); /* fp zero */
168 168 }
169 169
170 170 fn->f_fop = fx->fx_fop;
171 171
172 172 fn->__f_ign2 = 0;
173 173 #if defined(__amd64)
174 174 fn->f_eip = (uint32_t)fx->fx_rip;
175 175 fn->f_cs = U32CS_SEL;
176 176 fn->f_dp = (uint32_t)fx->fx_rdp;
177 177 fn->f_ds = UDS_SEL;
178 178 #else
179 179 fn->f_eip = fx->fx_eip;
180 180 fn->f_cs = fx->fx_cs;
181 181 fn->f_dp = fx->fx_dp;
182 182 fn->f_ds = fx->fx_ds;
183 183 #endif
184 184 fn->__f_ign3 = 0;
185 185 }
186 186
187 187 /*
188 188 * Map from an fpregset_t into an fxsave-format save area
189 189 */
190 190 static void
191 191 fpregset_to_fxsave(const fpregset_t *fp, struct fxsave_state *fx)
192 192 {
193 193 #if defined(__amd64)
194 194 bcopy(fp, fx, sizeof (*fx));
195 195 #else
196 196 const struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
197 197
198 198 fnsave_to_fxsave((const struct fnsave_state *)fc, fx);
199 199 fx->fx_mxcsr = fc->mxcsr;
200 200 bcopy(&fc->xmm[0], &fx->fx_xmm[0], sizeof (fc->xmm));
201 201 #endif
202 202 /*
203 203 * avoid useless #gp exceptions - mask reserved bits
204 204 */
205 205 fx->fx_mxcsr &= sse_mxcsr_mask;
206 206 }
207 207
208 208 /*
209 209 * Map from an fxsave-format save area into a fpregset_t
210 210 */
211 211 static void
212 212 fxsave_to_fpregset(const struct fxsave_state *fx, fpregset_t *fp)
213 213 {
214 214 #if defined(__amd64)
215 215 bcopy(fx, fp, sizeof (*fx));
216 216 #else
217 217 struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
218 218
219 219 fxsave_to_fnsave(fx, (struct fnsave_state *)fc);
220 220 fc->mxcsr = fx->fx_mxcsr;
221 221 bcopy(&fx->fx_xmm[0], &fc->xmm[0], sizeof (fc->xmm));
222 222 #endif
223 223 }
224 224
225 225 #if defined(_SYSCALL32_IMPL)
226 226 static void
227 227 fpregset32_to_fxsave(const fpregset32_t *fp, struct fxsave_state *fx)
228 228 {
229 229 const struct fpchip32_state *fc = &fp->fp_reg_set.fpchip_state;
230 230
231 231 fnsave_to_fxsave((const struct fnsave_state *)fc, fx);
232 232 /*
233 233 * avoid useless #gp exceptions - mask reserved bits
234 234 */
235 235 fx->fx_mxcsr = sse_mxcsr_mask & fc->mxcsr;
236 236 bcopy(&fc->xmm[0], &fx->fx_xmm[0], sizeof (fc->xmm));
237 237 }
238 238
239 239 static void
240 240 fxsave_to_fpregset32(const struct fxsave_state *fx, fpregset32_t *fp)
241 241 {
242 242 struct fpchip32_state *fc = &fp->fp_reg_set.fpchip_state;
243 243
244 244 fxsave_to_fnsave(fx, (struct fnsave_state *)fc);
245 245 fc->mxcsr = fx->fx_mxcsr;
246 246 bcopy(&fx->fx_xmm[0], &fc->xmm[0], sizeof (fc->xmm));
247 247 }
248 248
249 249 static void
250 250 fpregset_nto32(const fpregset_t *src, fpregset32_t *dst)
251 251 {
252 252 fxsave_to_fpregset32((struct fxsave_state *)src, dst);
253 253 dst->fp_reg_set.fpchip_state.status =
254 254 src->fp_reg_set.fpchip_state.status;
255 255 dst->fp_reg_set.fpchip_state.xstatus =
256 256 src->fp_reg_set.fpchip_state.xstatus;
257 257 }
258 258
259 259 static void
260 260 fpregset_32ton(const fpregset32_t *src, fpregset_t *dst)
261 261 {
262 262 fpregset32_to_fxsave(src, (struct fxsave_state *)dst);
263 263 dst->fp_reg_set.fpchip_state.status =
264 264 src->fp_reg_set.fpchip_state.status;
265 265 dst->fp_reg_set.fpchip_state.xstatus =
266 266 src->fp_reg_set.fpchip_state.xstatus;
267 267 }
268 268 #endif
269 269
270 270 /*
271 271 * Set floating-point registers from a native fpregset_t.
272 272 */
273 273 void
274 274 setfpregs(klwp_t *lwp, fpregset_t *fp)
275 275 {
276 276 struct fpu_ctx *fpu = &lwp->lwp_pcb.pcb_fpu;
277 277
278 278 if (fpu->fpu_flags & FPU_EN) {
279 279 if (!(fpu->fpu_flags & FPU_VALID)) {
280 280 /*
281 281 * FPU context is still active, release the
282 282 * ownership.
283 283 */
284 284 fp_free(fpu, 0);
285 285 }
286 286 }
287 287 /*
288 288 * Else: if we are trying to change the FPU state of a thread which
289 289 * hasn't yet initialized floating point, store the state in
290 290 * the pcb and indicate that the state is valid. When the
291 291 * thread enables floating point, it will use this state instead
292 292 * of the default state.
293 293 */
294 294
295 295 switch (fp_save_mech) {
296 296 #if defined(__i386)
297 297 case FP_FNSAVE:
298 298 bcopy(fp, &fpu->fpu_regs.kfpu_u.kfpu_fn,
299 299 sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
300 300 break;
301 301 #endif
302 302 case FP_FXSAVE:
303 303 fpregset_to_fxsave(fp, &fpu->fpu_regs.kfpu_u.kfpu_fx);
304 304 fpu->fpu_regs.kfpu_xstatus =
305 305 fp->fp_reg_set.fpchip_state.xstatus;
306 306 break;
307 307
308 308 case FP_XSAVE:
309 309 fpregset_to_fxsave(fp,
310 310 &fpu->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave);
311 311 fpu->fpu_regs.kfpu_xstatus =
312 312 fp->fp_reg_set.fpchip_state.xstatus;
313 313 fpu->fpu_regs.kfpu_u.kfpu_xs.xs_xstate_bv |=
314 314 (XFEATURE_LEGACY_FP | XFEATURE_SSE);
315 315 break;
316 316 default:
317 317 panic("Invalid fp_save_mech");
318 318 /*NOTREACHED*/
319 319 }
320 320
321 321 fpu->fpu_regs.kfpu_status = fp->fp_reg_set.fpchip_state.status;
322 322 fpu->fpu_flags |= FPU_VALID;
323 323 }
324 324
325 325 /*
326 326 * Get floating-point registers into a native fpregset_t.
327 327 */
328 328 void
329 329 getfpregs(klwp_t *lwp, fpregset_t *fp)
330 330 {
331 331 struct fpu_ctx *fpu = &lwp->lwp_pcb.pcb_fpu;
332 332
333 333 kpreempt_disable();
334 334 if (fpu->fpu_flags & FPU_EN) {
335 335 /*
336 336 * If we have FPU hw and the thread's pcb doesn't have
337 337 * a valid FPU state then get the state from the hw.
338 338 */
339 339 if (fpu_exists && ttolwp(curthread) == lwp &&
340 340 !(fpu->fpu_flags & FPU_VALID))
341 341 fp_save(fpu); /* get the current FPU state */
342 342 }
343 343
344 344 /*
345 345 * There are 3 possible cases we have to be aware of here:
346 346 *
347 347 * 1. FPU is enabled. FPU state is stored in the current LWP.
348 348 *
349 349 * 2. FPU is not enabled, and there have been no intervening /proc
350 350 * modifications. Return initial FPU state.
351 351 *
352 352 * 3. FPU is not enabled, but a /proc consumer has modified FPU state.
353 353 * FPU state is stored in the current LWP.
354 354 */
355 355 if ((fpu->fpu_flags & FPU_EN) || (fpu->fpu_flags & FPU_VALID)) {
356 356 /*
357 357 * Cases 1 and 3.
358 358 */
359 359 switch (fp_save_mech) {
360 360 #if defined(__i386)
361 361 case FP_FNSAVE:
362 362 bcopy(&fpu->fpu_regs.kfpu_u.kfpu_fn, fp,
363 363 sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
364 364 break;
365 365 #endif
366 366 case FP_FXSAVE:
367 367 fxsave_to_fpregset(&fpu->fpu_regs.kfpu_u.kfpu_fx, fp);
368 368 fp->fp_reg_set.fpchip_state.xstatus =
369 369 fpu->fpu_regs.kfpu_xstatus;
370 370 break;
371 371 case FP_XSAVE:
372 372 fxsave_to_fpregset(
373 373 &fpu->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave, fp);
374 374 fp->fp_reg_set.fpchip_state.xstatus =
375 375 fpu->fpu_regs.kfpu_xstatus;
376 376 break;
377 377 default:
378 378 panic("Invalid fp_save_mech");
379 379 /*NOTREACHED*/
380 380 }
381 381 fp->fp_reg_set.fpchip_state.status = fpu->fpu_regs.kfpu_status;
382 382 } else {
383 383 /*
384 384 * Case 2.
385 385 */
386 386 switch (fp_save_mech) {
387 387 #if defined(__i386)
388 388 case FP_FNSAVE:
389 389 bcopy(&x87_initial, fp, sizeof (x87_initial));
390 390 break;
391 391 #endif
392 392 case FP_FXSAVE:
393 393 case FP_XSAVE:
394 394 /*
395 395 * For now, we don't have any AVX specific field in ABI.
396 396 * If we add any in the future, we need to initial them
397 397 * as well.
398 398 */
399 399 fxsave_to_fpregset(&sse_initial, fp);
400 400 fp->fp_reg_set.fpchip_state.xstatus =
401 401 fpu->fpu_regs.kfpu_xstatus;
402 402 break;
403 403 default:
404 404 panic("Invalid fp_save_mech");
405 405 /*NOTREACHED*/
406 406 }
407 407 fp->fp_reg_set.fpchip_state.status = fpu->fpu_regs.kfpu_status;
408 408 }
409 409 kpreempt_enable();
410 410 }
411 411
412 412 #if defined(_SYSCALL32_IMPL)
413 413
414 414 /*
415 415 * Set floating-point registers from an fpregset32_t.
416 416 */
417 417 void
418 418 setfpregs32(klwp_t *lwp, fpregset32_t *fp)
419 419 {
420 420 fpregset_t fpregs;
421 421
422 422 fpregset_32ton(fp, &fpregs);
423 423 setfpregs(lwp, &fpregs);
424 424 }
425 425
426 426 /*
427 427 * Get floating-point registers into an fpregset32_t.
428 428 */
429 429 void
430 430 getfpregs32(klwp_t *lwp, fpregset32_t *fp)
431 431 {
432 432 fpregset_t fpregs;
433 433
434 434 getfpregs(lwp, &fpregs);
435 435 fpregset_nto32(&fpregs, fp);
436 436 }
437 437
438 438 #endif /* _SYSCALL32_IMPL */
439 439
440 440 /*
441 441 * Return the general registers
442 442 */
443 443 void
444 444 getgregs(klwp_t *lwp, gregset_t grp)
445 445 {
446 446 struct regs *rp = lwptoregs(lwp);
447 447 #if defined(__amd64)
448 448 struct pcb *pcb = &lwp->lwp_pcb;
449 449 int thisthread = lwptot(lwp) == curthread;
450 450
451 451 grp[REG_RDI] = rp->r_rdi;
452 452 grp[REG_RSI] = rp->r_rsi;
453 453 grp[REG_RDX] = rp->r_rdx;
454 454 grp[REG_RCX] = rp->r_rcx;
455 455 grp[REG_R8] = rp->r_r8;
456 456 grp[REG_R9] = rp->r_r9;
457 457 grp[REG_RAX] = rp->r_rax;
458 458 grp[REG_RBX] = rp->r_rbx;
459 459 grp[REG_RBP] = rp->r_rbp;
460 460 grp[REG_R10] = rp->r_r10;
461 461 grp[REG_R11] = rp->r_r11;
462 462 grp[REG_R12] = rp->r_r12;
463 463 grp[REG_R13] = rp->r_r13;
464 464 grp[REG_R14] = rp->r_r14;
465 465 grp[REG_R15] = rp->r_r15;
466 466 grp[REG_FSBASE] = pcb->pcb_fsbase;
467 467 grp[REG_GSBASE] = pcb->pcb_gsbase;
468 468 if (thisthread)
469 469 kpreempt_disable();
470 470 if (pcb->pcb_rupdate == 1) {
471 471 grp[REG_DS] = pcb->pcb_ds;
472 472 grp[REG_ES] = pcb->pcb_es;
473 473 grp[REG_FS] = pcb->pcb_fs;
474 474 grp[REG_GS] = pcb->pcb_gs;
475 475 } else {
476 476 grp[REG_DS] = rp->r_ds;
477 477 grp[REG_ES] = rp->r_es;
478 478 grp[REG_FS] = rp->r_fs;
479 479 grp[REG_GS] = rp->r_gs;
480 480 }
481 481 if (thisthread)
482 482 kpreempt_enable();
483 483 grp[REG_TRAPNO] = rp->r_trapno;
484 484 grp[REG_ERR] = rp->r_err;
485 485 grp[REG_RIP] = rp->r_rip;
486 486 grp[REG_CS] = rp->r_cs;
487 487 grp[REG_SS] = rp->r_ss;
488 488 grp[REG_RFL] = rp->r_rfl;
489 489 grp[REG_RSP] = rp->r_rsp;
490 490 #else
491 491 bcopy(&rp->r_gs, grp, sizeof (gregset_t));
492 492 #endif
493 493 }
494 494
495 495 #if defined(_SYSCALL32_IMPL)
496 496
497 497 void
498 498 getgregs32(klwp_t *lwp, gregset32_t grp)
499 499 {
500 500 struct regs *rp = lwptoregs(lwp);
501 501 struct pcb *pcb = &lwp->lwp_pcb;
502 502 int thisthread = lwptot(lwp) == curthread;
503 503
504 504 if (thisthread)
505 505 kpreempt_disable();
506 506 if (pcb->pcb_rupdate == 1) {
507 507 grp[GS] = (uint16_t)pcb->pcb_gs;
508 508 grp[FS] = (uint16_t)pcb->pcb_fs;
509 509 grp[DS] = (uint16_t)pcb->pcb_ds;
510 510 grp[ES] = (uint16_t)pcb->pcb_es;
511 511 } else {
512 512 grp[GS] = (uint16_t)rp->r_gs;
513 513 grp[FS] = (uint16_t)rp->r_fs;
514 514 grp[DS] = (uint16_t)rp->r_ds;
515 515 grp[ES] = (uint16_t)rp->r_es;
516 516 }
517 517 if (thisthread)
518 518 kpreempt_enable();
519 519 grp[EDI] = (greg32_t)rp->r_rdi;
520 520 grp[ESI] = (greg32_t)rp->r_rsi;
521 521 grp[EBP] = (greg32_t)rp->r_rbp;
522 522 grp[ESP] = 0;
523 523 grp[EBX] = (greg32_t)rp->r_rbx;
524 524 grp[EDX] = (greg32_t)rp->r_rdx;
525 525 grp[ECX] = (greg32_t)rp->r_rcx;
526 526 grp[EAX] = (greg32_t)rp->r_rax;
527 527 grp[TRAPNO] = (greg32_t)rp->r_trapno;
528 528 grp[ERR] = (greg32_t)rp->r_err;
529 529 grp[EIP] = (greg32_t)rp->r_rip;
530 530 grp[CS] = (uint16_t)rp->r_cs;
531 531 grp[EFL] = (greg32_t)rp->r_rfl;
532 532 grp[UESP] = (greg32_t)rp->r_rsp;
533 533 grp[SS] = (uint16_t)rp->r_ss;
534 534 }
535 535
536 536 void
537 537 ucontext_32ton(const ucontext32_t *src, ucontext_t *dst)
538 538 {
539 539 mcontext_t *dmc = &dst->uc_mcontext;
540 540 const mcontext32_t *smc = &src->uc_mcontext;
541 541
542 542 bzero(dst, sizeof (*dst));
543 543 dst->uc_flags = src->uc_flags;
544 544 dst->uc_link = (ucontext_t *)(uintptr_t)src->uc_link;
545 545
546 546 bcopy(&src->uc_sigmask, &dst->uc_sigmask, sizeof (dst->uc_sigmask));
547 547
548 548 dst->uc_stack.ss_sp = (void *)(uintptr_t)src->uc_stack.ss_sp;
549 549 dst->uc_stack.ss_size = (size_t)src->uc_stack.ss_size;
550 550 dst->uc_stack.ss_flags = src->uc_stack.ss_flags;
551 551
552 552 dmc->gregs[REG_GS] = (greg_t)(uint32_t)smc->gregs[GS];
553 553 dmc->gregs[REG_FS] = (greg_t)(uint32_t)smc->gregs[FS];
554 554 dmc->gregs[REG_ES] = (greg_t)(uint32_t)smc->gregs[ES];
555 555 dmc->gregs[REG_DS] = (greg_t)(uint32_t)smc->gregs[DS];
556 556 dmc->gregs[REG_RDI] = (greg_t)(uint32_t)smc->gregs[EDI];
557 557 dmc->gregs[REG_RSI] = (greg_t)(uint32_t)smc->gregs[ESI];
558 558 dmc->gregs[REG_RBP] = (greg_t)(uint32_t)smc->gregs[EBP];
559 559 dmc->gregs[REG_RBX] = (greg_t)(uint32_t)smc->gregs[EBX];
560 560 dmc->gregs[REG_RDX] = (greg_t)(uint32_t)smc->gregs[EDX];
561 561 dmc->gregs[REG_RCX] = (greg_t)(uint32_t)smc->gregs[ECX];
562 562 dmc->gregs[REG_RAX] = (greg_t)(uint32_t)smc->gregs[EAX];
563 563 dmc->gregs[REG_TRAPNO] = (greg_t)(uint32_t)smc->gregs[TRAPNO];
564 564 dmc->gregs[REG_ERR] = (greg_t)(uint32_t)smc->gregs[ERR];
565 565 dmc->gregs[REG_RIP] = (greg_t)(uint32_t)smc->gregs[EIP];
566 566 dmc->gregs[REG_CS] = (greg_t)(uint32_t)smc->gregs[CS];
567 567 dmc->gregs[REG_RFL] = (greg_t)(uint32_t)smc->gregs[EFL];
568 568 dmc->gregs[REG_RSP] = (greg_t)(uint32_t)smc->gregs[UESP];
569 569 dmc->gregs[REG_SS] = (greg_t)(uint32_t)smc->gregs[SS];
570 570
571 571 /*
572 572 * A valid fpregs is only copied in if uc.uc_flags has UC_FPU set
573 573 * otherwise there is no guarantee that anything in fpregs is valid.
574 574 */
575 575 if (src->uc_flags & UC_FPU)
576 576 fpregset_32ton(&src->uc_mcontext.fpregs,
577 577 &dst->uc_mcontext.fpregs);
578 578 }
579 579
580 580 #endif /* _SYSCALL32_IMPL */
581 581
582 582 /*
583 583 * Return the user-level PC.
584 584 * If in a system call, return the address of the syscall trap.
585 585 */
586 586 greg_t
587 587 getuserpc()
588 588 {
589 589 greg_t upc = lwptoregs(ttolwp(curthread))->r_pc;
590 590 uint32_t insn;
591 591
592 592 if (curthread->t_sysnum == 0)
593 593 return (upc);
594 594
595 595 /*
596 596 * We might've gotten here from sysenter (0xf 0x34),
597 597 * syscall (0xf 0x5) or lcall (0x9a 0 0 0 0 0x27 0).
598 598 *
599 599 * Go peek at the binary to figure it out..
600 600 */
601 601 if (fuword32((void *)(upc - 2), &insn) != -1 &&
602 602 (insn & 0xffff) == 0x340f || (insn & 0xffff) == 0x050f)
603 603 return (upc - 2);
604 604 return (upc - 7);
605 605 }
606 606
607 607 /*
608 608 * Protect segment registers from non-user privilege levels and GDT selectors
609 609 * other than USER_CS, USER_DS and lwp FS and GS values. If the segment
610 610 * selector is non-null and not USER_CS/USER_DS, we make sure that the
611 611 * TI bit is set to point into the LDT and that the RPL is set to 3.
612 612 *
613 613 * Since struct regs stores each 16-bit segment register as a 32-bit greg_t, we
614 614 * also explicitly zero the top 16 bits since they may be coming from the
615 615 * user's address space via setcontext(2) or /proc.
616 616 *
617 617 * Note about null selector. When running on the hypervisor if we allow a
618 618 * process to set its %cs to null selector with RPL of 0 the hypervisor will
619 619 * crash the domain. If running on bare metal we would get a #gp fault and
620 620 * be able to kill the process and continue on. Therefore we make sure to
621 621 * force RPL to SEL_UPL even for null selector when setting %cs.
622 622 */
623 623
624 624 #if defined(IS_CS) || defined(IS_NOT_CS)
|
↓ open down ↓ |
624 lines elided |
↑ open up ↑ |
625 625 #error "IS_CS and IS_NOT_CS already defined"
626 626 #endif
627 627
628 628 #define IS_CS 1
629 629 #define IS_NOT_CS 0
630 630
631 631 /*ARGSUSED*/
632 632 static greg_t
633 633 fix_segreg(greg_t sr, int iscs, model_t datamodel)
634 634 {
635 + kthread_t *t = curthread;
636 +
635 637 switch (sr &= 0xffff) {
636 638
637 639 case 0:
638 640 if (iscs == IS_CS)
639 641 return (0 | SEL_UPL);
640 642 else
641 643 return (0);
642 644
643 645 #if defined(__amd64)
644 646 /*
645 647 * If lwp attempts to switch data model then force their
646 648 * code selector to be null selector.
647 649 */
648 650 case U32CS_SEL:
649 651 if (datamodel == DATAMODEL_NATIVE)
650 652 return (0 | SEL_UPL);
651 653 else
652 654 return (sr);
653 655
654 656 case UCS_SEL:
655 657 if (datamodel == DATAMODEL_ILP32)
656 658 return (0 | SEL_UPL);
657 659 #elif defined(__i386)
|
↓ open down ↓ |
13 lines elided |
↑ open up ↑ |
658 660 case UCS_SEL:
659 661 #endif
660 662 /*FALLTHROUGH*/
661 663 case UDS_SEL:
662 664 case LWPFS_SEL:
663 665 case LWPGS_SEL:
664 666 case SEL_UPL:
665 667 return (sr);
666 668 default:
667 669 break;
670 + }
671 +
672 + /*
673 + * Allow this process's brand to do any necessary segment register
674 + * manipulation.
675 + */
676 + if (PROC_IS_BRANDED(t->t_procp) && BRMOP(t->t_procp)->b_fixsegreg) {
677 + greg_t bsr = BRMOP(t->t_procp)->b_fixsegreg(sr, datamodel);
678 +
679 + if (bsr == 0 && iscs == IS_CS)
680 + return (0 | SEL_UPL);
681 + else
682 + return (bsr);
668 683 }
669 684
670 685 /*
671 686 * Force it into the LDT in ring 3 for 32-bit processes, which by
672 687 * default do not have an LDT, so that any attempt to use an invalid
673 688 * selector will reference the (non-existant) LDT, and cause a #gp
674 689 * fault for the process.
675 690 *
676 691 * 64-bit processes get the null gdt selector since they
677 692 * are not allowed to have a private LDT.
678 693 */
679 694 #if defined(__amd64)
680 695 if (datamodel == DATAMODEL_ILP32) {
681 696 return (sr | SEL_TI_LDT | SEL_UPL);
682 697 } else {
683 698 if (iscs == IS_CS)
684 699 return (0 | SEL_UPL);
685 700 else
686 701 return (0);
687 702 }
688 703
689 704 #elif defined(__i386)
690 705 return (sr | SEL_TI_LDT | SEL_UPL);
691 706 #endif
692 707 }
693 708
694 709 /*
695 710 * Set general registers.
696 711 */
697 712 void
698 713 setgregs(klwp_t *lwp, gregset_t grp)
699 714 {
700 715 struct regs *rp = lwptoregs(lwp);
701 716 model_t datamodel = lwp_getdatamodel(lwp);
702 717
703 718 #if defined(__amd64)
704 719 struct pcb *pcb = &lwp->lwp_pcb;
705 720 int thisthread = lwptot(lwp) == curthread;
706 721
707 722 if (datamodel == DATAMODEL_NATIVE) {
708 723
709 724 if (thisthread)
710 725 (void) save_syscall_args(); /* copy the args */
711 726
712 727 rp->r_rdi = grp[REG_RDI];
713 728 rp->r_rsi = grp[REG_RSI];
714 729 rp->r_rdx = grp[REG_RDX];
715 730 rp->r_rcx = grp[REG_RCX];
716 731 rp->r_r8 = grp[REG_R8];
717 732 rp->r_r9 = grp[REG_R9];
718 733 rp->r_rax = grp[REG_RAX];
719 734 rp->r_rbx = grp[REG_RBX];
720 735 rp->r_rbp = grp[REG_RBP];
721 736 rp->r_r10 = grp[REG_R10];
722 737 rp->r_r11 = grp[REG_R11];
723 738 rp->r_r12 = grp[REG_R12];
724 739 rp->r_r13 = grp[REG_R13];
725 740 rp->r_r14 = grp[REG_R14];
726 741 rp->r_r15 = grp[REG_R15];
727 742 rp->r_trapno = grp[REG_TRAPNO];
728 743 rp->r_err = grp[REG_ERR];
729 744 rp->r_rip = grp[REG_RIP];
730 745 /*
731 746 * Setting %cs or %ss to anything else is quietly but
732 747 * quite definitely forbidden!
733 748 */
734 749 rp->r_cs = UCS_SEL;
735 750 rp->r_ss = UDS_SEL;
736 751 rp->r_rsp = grp[REG_RSP];
737 752
738 753 if (thisthread)
739 754 kpreempt_disable();
740 755
741 756 pcb->pcb_ds = UDS_SEL;
742 757 pcb->pcb_es = UDS_SEL;
743 758
744 759 /*
745 760 * 64-bit processes -are- allowed to set their fsbase/gsbase
746 761 * values directly, but only if they're using the segment
747 762 * selectors that allow that semantic.
748 763 *
749 764 * (32-bit processes must use lwp_set_private().)
750 765 */
751 766 pcb->pcb_fsbase = grp[REG_FSBASE];
752 767 pcb->pcb_gsbase = grp[REG_GSBASE];
753 768 pcb->pcb_fs = fix_segreg(grp[REG_FS], IS_NOT_CS, datamodel);
754 769 pcb->pcb_gs = fix_segreg(grp[REG_GS], IS_NOT_CS, datamodel);
755 770
756 771 /*
757 772 * Ensure that we go out via update_sregs
758 773 */
759 774 pcb->pcb_rupdate = 1;
760 775 lwptot(lwp)->t_post_sys = 1;
761 776 if (thisthread)
762 777 kpreempt_enable();
763 778 #if defined(_SYSCALL32_IMPL)
764 779 } else {
765 780 rp->r_rdi = (uint32_t)grp[REG_RDI];
766 781 rp->r_rsi = (uint32_t)grp[REG_RSI];
767 782 rp->r_rdx = (uint32_t)grp[REG_RDX];
768 783 rp->r_rcx = (uint32_t)grp[REG_RCX];
769 784 rp->r_rax = (uint32_t)grp[REG_RAX];
770 785 rp->r_rbx = (uint32_t)grp[REG_RBX];
771 786 rp->r_rbp = (uint32_t)grp[REG_RBP];
772 787 rp->r_trapno = (uint32_t)grp[REG_TRAPNO];
773 788 rp->r_err = (uint32_t)grp[REG_ERR];
774 789 rp->r_rip = (uint32_t)grp[REG_RIP];
775 790
776 791 rp->r_cs = fix_segreg(grp[REG_CS], IS_CS, datamodel);
777 792 rp->r_ss = fix_segreg(grp[REG_DS], IS_NOT_CS, datamodel);
778 793
779 794 rp->r_rsp = (uint32_t)grp[REG_RSP];
780 795
781 796 if (thisthread)
782 797 kpreempt_disable();
783 798
784 799 pcb->pcb_ds = fix_segreg(grp[REG_DS], IS_NOT_CS, datamodel);
785 800 pcb->pcb_es = fix_segreg(grp[REG_ES], IS_NOT_CS, datamodel);
786 801
787 802 /*
788 803 * (See fsbase/gsbase commentary above)
789 804 */
790 805 pcb->pcb_fs = fix_segreg(grp[REG_FS], IS_NOT_CS, datamodel);
791 806 pcb->pcb_gs = fix_segreg(grp[REG_GS], IS_NOT_CS, datamodel);
792 807
793 808 /*
794 809 * Ensure that we go out via update_sregs
795 810 */
796 811 pcb->pcb_rupdate = 1;
797 812 lwptot(lwp)->t_post_sys = 1;
798 813 if (thisthread)
799 814 kpreempt_enable();
800 815 #endif
801 816 }
802 817
803 818 /*
804 819 * Only certain bits of the flags register can be modified.
805 820 */
806 821 rp->r_rfl = (rp->r_rfl & ~PSL_USERMASK) |
807 822 (grp[REG_RFL] & PSL_USERMASK);
808 823
809 824 #elif defined(__i386)
810 825
811 826 /*
812 827 * Only certain bits of the flags register can be modified.
813 828 */
814 829 grp[EFL] = (rp->r_efl & ~PSL_USERMASK) | (grp[EFL] & PSL_USERMASK);
815 830
816 831 /*
817 832 * Copy saved registers from user stack.
818 833 */
819 834 bcopy(grp, &rp->r_gs, sizeof (gregset_t));
820 835
821 836 rp->r_cs = fix_segreg(rp->r_cs, IS_CS, datamodel);
822 837 rp->r_ss = fix_segreg(rp->r_ss, IS_NOT_CS, datamodel);
823 838 rp->r_ds = fix_segreg(rp->r_ds, IS_NOT_CS, datamodel);
824 839 rp->r_es = fix_segreg(rp->r_es, IS_NOT_CS, datamodel);
825 840 rp->r_fs = fix_segreg(rp->r_fs, IS_NOT_CS, datamodel);
826 841 rp->r_gs = fix_segreg(rp->r_gs, IS_NOT_CS, datamodel);
827 842
828 843 #endif /* __i386 */
829 844 }
830 845
831 846 /*
832 847 * Determine whether eip is likely to have an interrupt frame
833 848 * on the stack. We do this by comparing the address to the
834 849 * range of addresses spanned by several well-known routines.
835 850 */
836 851 extern void _interrupt();
837 852 extern void _allsyscalls();
838 853 extern void _cmntrap();
839 854 extern void fakesoftint();
840 855
841 856 extern size_t _interrupt_size;
842 857 extern size_t _allsyscalls_size;
843 858 extern size_t _cmntrap_size;
844 859 extern size_t _fakesoftint_size;
845 860
846 861 /*
847 862 * Get a pc-only stacktrace. Used for kmem_alloc() buffer ownership tracking.
848 863 * Returns MIN(current stack depth, pcstack_limit).
849 864 */
850 865 int
851 866 getpcstack(pc_t *pcstack, int pcstack_limit)
852 867 {
853 868 struct frame *fp = (struct frame *)getfp();
854 869 struct frame *nextfp, *minfp, *stacktop;
855 870 int depth = 0;
856 871 int on_intr;
857 872 uintptr_t pc;
858 873
859 874 if ((on_intr = CPU_ON_INTR(CPU)) != 0)
860 875 stacktop = (struct frame *)(CPU->cpu_intr_stack + SA(MINFRAME));
861 876 else
862 877 stacktop = (struct frame *)curthread->t_stk;
863 878 minfp = fp;
864 879
865 880 pc = ((struct regs *)fp)->r_pc;
866 881
867 882 while (depth < pcstack_limit) {
868 883 nextfp = (struct frame *)fp->fr_savfp;
869 884 pc = fp->fr_savpc;
870 885 if (nextfp <= minfp || nextfp >= stacktop) {
871 886 if (on_intr) {
872 887 /*
873 888 * Hop from interrupt stack to thread stack.
874 889 */
875 890 stacktop = (struct frame *)curthread->t_stk;
876 891 minfp = (struct frame *)curthread->t_stkbase;
877 892 on_intr = 0;
878 893 continue;
879 894 }
880 895 break;
881 896 }
882 897 pcstack[depth++] = (pc_t)pc;
883 898 fp = nextfp;
884 899 minfp = fp;
885 900 }
886 901 return (depth);
887 902 }
888 903
889 904 /*
890 905 * The following ELF header fields are defined as processor-specific
891 906 * in the V8 ABI:
892 907 *
893 908 * e_ident[EI_DATA] encoding of the processor-specific
894 909 * data in the object file
895 910 * e_machine processor identification
896 911 * e_flags processor-specific flags associated
897 912 * with the file
898 913 */
899 914
900 915 /*
901 916 * The value of at_flags reflects a platform's cpu module support.
902 917 * at_flags is used to check for allowing a binary to execute and
903 918 * is passed as the value of the AT_FLAGS auxiliary vector.
904 919 */
905 920 int at_flags = 0;
906 921
907 922 /*
908 923 * Check the processor-specific fields of an ELF header.
909 924 *
910 925 * returns 1 if the fields are valid, 0 otherwise
911 926 */
912 927 /*ARGSUSED2*/
913 928 int
914 929 elfheadcheck(
915 930 unsigned char e_data,
916 931 Elf32_Half e_machine,
917 932 Elf32_Word e_flags)
918 933 {
919 934 if (e_data != ELFDATA2LSB)
920 935 return (0);
921 936 #if defined(__amd64)
922 937 if (e_machine == EM_AMD64)
923 938 return (1);
924 939 #endif
925 940 return (e_machine == EM_386);
926 941 }
927 942
928 943 uint_t auxv_hwcap_include = 0; /* patch to enable unrecognized features */
929 944 uint_t auxv_hwcap_include_2 = 0; /* second word */
930 945 uint_t auxv_hwcap_exclude = 0; /* patch for broken cpus, debugging */
931 946 uint_t auxv_hwcap_exclude_2 = 0; /* second word */
932 947 #if defined(_SYSCALL32_IMPL)
933 948 uint_t auxv_hwcap32_include = 0; /* ditto for 32-bit apps */
934 949 uint_t auxv_hwcap32_include_2 = 0; /* ditto for 32-bit apps */
935 950 uint_t auxv_hwcap32_exclude = 0; /* ditto for 32-bit apps */
936 951 uint_t auxv_hwcap32_exclude_2 = 0; /* ditto for 32-bit apps */
937 952 #endif
938 953
939 954 /*
940 955 * Gather information about the processor and place it into auxv_hwcap
941 956 * so that it can be exported to the linker via the aux vector.
942 957 *
943 958 * We use this seemingly complicated mechanism so that we can ensure
944 959 * that /etc/system can be used to override what the system can or
945 960 * cannot discover for itself.
946 961 */
947 962 void
948 963 bind_hwcap(void)
949 964 {
950 965 uint_t cpu_hwcap_flags[2];
951 966 cpuid_pass4(NULL, cpu_hwcap_flags);
952 967
953 968 auxv_hwcap = (auxv_hwcap_include | cpu_hwcap_flags[0]) &
954 969 ~auxv_hwcap_exclude;
955 970 auxv_hwcap_2 = (auxv_hwcap_include_2 | cpu_hwcap_flags[1]) &
956 971 ~auxv_hwcap_exclude_2;
957 972
958 973 #if defined(__amd64)
959 974 /*
960 975 * On AMD processors, sysenter just doesn't work at all
961 976 * when the kernel is in long mode. On IA-32e processors
962 977 * it does, but there's no real point in all the alternate
963 978 * mechanism when syscall works on both.
964 979 *
965 980 * Besides, the kernel's sysenter handler is expecting a
966 981 * 32-bit lwp ...
967 982 */
968 983 auxv_hwcap &= ~AV_386_SEP;
969 984 #else
970 985 /*
971 986 * 32-bit processes can -always- use the lahf/sahf instructions
972 987 */
973 988 auxv_hwcap |= AV_386_AHF;
974 989 #endif
975 990
976 991 if (auxv_hwcap_include || auxv_hwcap_exclude || auxv_hwcap_include_2 ||
977 992 auxv_hwcap_exclude_2) {
978 993 /*
979 994 * The below assignment is regrettably required to get lint
980 995 * to accept the validity of our format string. The format
981 996 * string is in fact valid, but whatever intelligence in lint
982 997 * understands the cmn_err()-specific %b appears to have an
983 998 * off-by-one error: it (mistakenly) complains about bit
984 999 * number 32 (even though this is explicitly permitted).
985 1000 * Normally, one would will away such warnings with a "LINTED"
986 1001 * directive, but for reasons unclear and unknown, lint
987 1002 * refuses to be assuaged in this case. Fortunately, lint
988 1003 * doesn't pretend to have solved the Halting Problem --
989 1004 * and as soon as the format string is programmatic, it
990 1005 * knows enough to shut up.
991 1006 */
992 1007 char *fmt = "?user ABI extensions: %b\n";
993 1008 cmn_err(CE_CONT, fmt, auxv_hwcap, FMT_AV_386);
994 1009 fmt = "?user ABI extensions (word 2): %b\n";
995 1010 cmn_err(CE_CONT, fmt, auxv_hwcap_2, FMT_AV_386_2);
996 1011 }
997 1012
998 1013 #if defined(_SYSCALL32_IMPL)
999 1014 auxv_hwcap32 = (auxv_hwcap32_include | cpu_hwcap_flags[0]) &
1000 1015 ~auxv_hwcap32_exclude;
1001 1016 auxv_hwcap32_2 = (auxv_hwcap32_include_2 | cpu_hwcap_flags[1]) &
1002 1017 ~auxv_hwcap32_exclude_2;
1003 1018
1004 1019 #if defined(__amd64)
1005 1020 /*
1006 1021 * If this is an amd64 architecture machine from Intel, then
1007 1022 * syscall -doesn't- work in compatibility mode, only sysenter does.
1008 1023 *
1009 1024 * Sigh.
1010 1025 */
1011 1026 if (!cpuid_syscall32_insn(NULL))
1012 1027 auxv_hwcap32 &= ~AV_386_AMD_SYSC;
1013 1028
1014 1029 /*
1015 1030 * 32-bit processes can -always- use the lahf/sahf instructions
1016 1031 */
1017 1032 auxv_hwcap32 |= AV_386_AHF;
1018 1033 #endif
1019 1034
1020 1035 if (auxv_hwcap32_include || auxv_hwcap32_exclude ||
1021 1036 auxv_hwcap32_include_2 || auxv_hwcap32_exclude_2) {
1022 1037 /*
1023 1038 * See the block comment in the cmn_err() of auxv_hwcap, above.
1024 1039 */
1025 1040 char *fmt = "?32-bit user ABI extensions: %b\n";
1026 1041 cmn_err(CE_CONT, fmt, auxv_hwcap32, FMT_AV_386);
1027 1042 fmt = "?32-bit user ABI extensions (word 2): %b\n";
1028 1043 cmn_err(CE_CONT, fmt, auxv_hwcap32_2, FMT_AV_386_2);
1029 1044 }
1030 1045 #endif
1031 1046 }
1032 1047
1033 1048 /*
1034 1049 * sync_icache() - this is called
1035 1050 * in proc/fs/prusrio.c. x86 has an unified cache and therefore
1036 1051 * this is a nop.
1037 1052 */
1038 1053 /* ARGSUSED */
1039 1054 void
1040 1055 sync_icache(caddr_t addr, uint_t len)
1041 1056 {
1042 1057 /* Do nothing for now */
1043 1058 }
1044 1059
1045 1060 /*ARGSUSED*/
1046 1061 void
1047 1062 sync_data_memory(caddr_t va, size_t len)
1048 1063 {
1049 1064 /* Not implemented for this platform */
1050 1065 }
1051 1066
1052 1067 int
1053 1068 __ipltospl(int ipl)
1054 1069 {
1055 1070 return (ipltospl(ipl));
1056 1071 }
1057 1072
1058 1073 /*
1059 1074 * The panic code invokes panic_saveregs() to record the contents of a
1060 1075 * regs structure into the specified panic_data structure for debuggers.
1061 1076 */
1062 1077 void
1063 1078 panic_saveregs(panic_data_t *pdp, struct regs *rp)
1064 1079 {
1065 1080 panic_nv_t *pnv = PANICNVGET(pdp);
1066 1081
1067 1082 struct cregs creg;
1068 1083
1069 1084 getcregs(&creg);
1070 1085
1071 1086 #if defined(__amd64)
1072 1087 PANICNVADD(pnv, "rdi", rp->r_rdi);
1073 1088 PANICNVADD(pnv, "rsi", rp->r_rsi);
1074 1089 PANICNVADD(pnv, "rdx", rp->r_rdx);
1075 1090 PANICNVADD(pnv, "rcx", rp->r_rcx);
1076 1091 PANICNVADD(pnv, "r8", rp->r_r8);
1077 1092 PANICNVADD(pnv, "r9", rp->r_r9);
1078 1093 PANICNVADD(pnv, "rax", rp->r_rax);
1079 1094 PANICNVADD(pnv, "rbx", rp->r_rbx);
1080 1095 PANICNVADD(pnv, "rbp", rp->r_rbp);
1081 1096 PANICNVADD(pnv, "r10", rp->r_r10);
1082 1097 PANICNVADD(pnv, "r11", rp->r_r11);
1083 1098 PANICNVADD(pnv, "r12", rp->r_r12);
1084 1099 PANICNVADD(pnv, "r13", rp->r_r13);
1085 1100 PANICNVADD(pnv, "r14", rp->r_r14);
1086 1101 PANICNVADD(pnv, "r15", rp->r_r15);
1087 1102 PANICNVADD(pnv, "fsbase", rdmsr(MSR_AMD_FSBASE));
1088 1103 PANICNVADD(pnv, "gsbase", rdmsr(MSR_AMD_GSBASE));
1089 1104 PANICNVADD(pnv, "ds", rp->r_ds);
1090 1105 PANICNVADD(pnv, "es", rp->r_es);
1091 1106 PANICNVADD(pnv, "fs", rp->r_fs);
1092 1107 PANICNVADD(pnv, "gs", rp->r_gs);
1093 1108 PANICNVADD(pnv, "trapno", rp->r_trapno);
1094 1109 PANICNVADD(pnv, "err", rp->r_err);
1095 1110 PANICNVADD(pnv, "rip", rp->r_rip);
1096 1111 PANICNVADD(pnv, "cs", rp->r_cs);
1097 1112 PANICNVADD(pnv, "rflags", rp->r_rfl);
1098 1113 PANICNVADD(pnv, "rsp", rp->r_rsp);
1099 1114 PANICNVADD(pnv, "ss", rp->r_ss);
1100 1115 PANICNVADD(pnv, "gdt_hi", (uint64_t)(creg.cr_gdt._l[3]));
1101 1116 PANICNVADD(pnv, "gdt_lo", (uint64_t)(creg.cr_gdt._l[0]));
1102 1117 PANICNVADD(pnv, "idt_hi", (uint64_t)(creg.cr_idt._l[3]));
1103 1118 PANICNVADD(pnv, "idt_lo", (uint64_t)(creg.cr_idt._l[0]));
1104 1119 #elif defined(__i386)
1105 1120 PANICNVADD(pnv, "gs", (uint32_t)rp->r_gs);
1106 1121 PANICNVADD(pnv, "fs", (uint32_t)rp->r_fs);
1107 1122 PANICNVADD(pnv, "es", (uint32_t)rp->r_es);
1108 1123 PANICNVADD(pnv, "ds", (uint32_t)rp->r_ds);
1109 1124 PANICNVADD(pnv, "edi", (uint32_t)rp->r_edi);
1110 1125 PANICNVADD(pnv, "esi", (uint32_t)rp->r_esi);
1111 1126 PANICNVADD(pnv, "ebp", (uint32_t)rp->r_ebp);
1112 1127 PANICNVADD(pnv, "esp", (uint32_t)rp->r_esp);
1113 1128 PANICNVADD(pnv, "ebx", (uint32_t)rp->r_ebx);
1114 1129 PANICNVADD(pnv, "edx", (uint32_t)rp->r_edx);
1115 1130 PANICNVADD(pnv, "ecx", (uint32_t)rp->r_ecx);
1116 1131 PANICNVADD(pnv, "eax", (uint32_t)rp->r_eax);
1117 1132 PANICNVADD(pnv, "trapno", (uint32_t)rp->r_trapno);
1118 1133 PANICNVADD(pnv, "err", (uint32_t)rp->r_err);
1119 1134 PANICNVADD(pnv, "eip", (uint32_t)rp->r_eip);
1120 1135 PANICNVADD(pnv, "cs", (uint32_t)rp->r_cs);
1121 1136 PANICNVADD(pnv, "eflags", (uint32_t)rp->r_efl);
1122 1137 PANICNVADD(pnv, "uesp", (uint32_t)rp->r_uesp);
1123 1138 PANICNVADD(pnv, "ss", (uint32_t)rp->r_ss);
1124 1139 PANICNVADD(pnv, "gdt", creg.cr_gdt);
1125 1140 PANICNVADD(pnv, "idt", creg.cr_idt);
1126 1141 #endif /* __i386 */
1127 1142
1128 1143 PANICNVADD(pnv, "ldt", creg.cr_ldt);
1129 1144 PANICNVADD(pnv, "task", creg.cr_task);
1130 1145 PANICNVADD(pnv, "cr0", creg.cr_cr0);
1131 1146 PANICNVADD(pnv, "cr2", creg.cr_cr2);
1132 1147 PANICNVADD(pnv, "cr3", creg.cr_cr3);
1133 1148 if (creg.cr_cr4)
1134 1149 PANICNVADD(pnv, "cr4", creg.cr_cr4);
1135 1150
1136 1151 PANICNVSET(pdp, pnv);
1137 1152 }
1138 1153
1139 1154 #define TR_ARG_MAX 6 /* Max args to print, same as SPARC */
1140 1155
1141 1156 #if !defined(__amd64)
1142 1157
1143 1158 /*
1144 1159 * Given a return address (%eip), determine the likely number of arguments
1145 1160 * that were pushed on the stack prior to its execution. We do this by
1146 1161 * expecting that a typical call sequence consists of pushing arguments on
1147 1162 * the stack, executing a call instruction, and then performing an add
1148 1163 * on %esp to restore it to the value prior to pushing the arguments for
1149 1164 * the call. We attempt to detect such an add, and divide the addend
1150 1165 * by the size of a word to determine the number of pushed arguments.
1151 1166 *
1152 1167 * If we do not find such an add, we punt and return TR_ARG_MAX. It is not
1153 1168 * possible to reliably determine if a function took no arguments (i.e. was
1154 1169 * void) because assembler routines do not reliably perform an add on %esp
1155 1170 * immediately upon returning (eg. _sys_call()), so returning TR_ARG_MAX is
1156 1171 * safer than returning 0.
1157 1172 */
1158 1173 static ulong_t
1159 1174 argcount(uintptr_t eip)
1160 1175 {
1161 1176 const uint8_t *ins = (const uint8_t *)eip;
1162 1177 ulong_t n;
1163 1178
1164 1179 enum {
1165 1180 M_MODRM_ESP = 0xc4, /* Mod/RM byte indicates %esp */
1166 1181 M_ADD_IMM32 = 0x81, /* ADD imm32 to r/m32 */
1167 1182 M_ADD_IMM8 = 0x83 /* ADD imm8 to r/m32 */
1168 1183 };
1169 1184
1170 1185 if (eip < KERNELBASE || ins[1] != M_MODRM_ESP)
1171 1186 return (TR_ARG_MAX);
1172 1187
1173 1188 switch (ins[0]) {
1174 1189 case M_ADD_IMM32:
1175 1190 n = ins[2] + (ins[3] << 8) + (ins[4] << 16) + (ins[5] << 24);
1176 1191 break;
1177 1192
1178 1193 case M_ADD_IMM8:
1179 1194 n = ins[2];
1180 1195 break;
1181 1196
1182 1197 default:
1183 1198 return (TR_ARG_MAX);
1184 1199 }
1185 1200
1186 1201 n /= sizeof (long);
1187 1202 return (MIN(n, TR_ARG_MAX));
1188 1203 }
1189 1204
1190 1205 #endif /* !__amd64 */
1191 1206
1192 1207 /*
1193 1208 * Print a stack backtrace using the specified frame pointer. We delay two
1194 1209 * seconds before continuing, unless this is the panic traceback.
1195 1210 * If we are in the process of panicking, we also attempt to write the
1196 1211 * stack backtrace to a staticly assigned buffer, to allow the panic
1197 1212 * code to find it and write it in to uncompressed pages within the
1198 1213 * system crash dump.
1199 1214 * Note that the frame for the starting stack pointer value is omitted because
1200 1215 * the corresponding %eip is not known.
1201 1216 */
1202 1217
1203 1218 extern char *dump_stack_scratch;
1204 1219
1205 1220 #if defined(__amd64)
1206 1221
1207 1222 void
1208 1223 traceback(caddr_t fpreg)
1209 1224 {
1210 1225 struct frame *fp = (struct frame *)fpreg;
1211 1226 struct frame *nextfp;
1212 1227 uintptr_t pc, nextpc;
1213 1228 ulong_t off;
1214 1229 char args[TR_ARG_MAX * 2 + 16], *sym;
1215 1230 uint_t offset = 0;
1216 1231 uint_t next_offset = 0;
1217 1232 char stack_buffer[1024];
1218 1233
1219 1234 if (!panicstr)
1220 1235 printf("traceback: %%fp = %p\n", (void *)fp);
1221 1236
1222 1237 if (panicstr && !dump_stack_scratch) {
1223 1238 printf("Warning - stack not written to the dump buffer\n");
1224 1239 }
1225 1240
1226 1241 fp = (struct frame *)plat_traceback(fpreg);
1227 1242 if ((uintptr_t)fp < KERNELBASE)
1228 1243 goto out;
1229 1244
1230 1245 pc = fp->fr_savpc;
1231 1246 fp = (struct frame *)fp->fr_savfp;
1232 1247
1233 1248 while ((uintptr_t)fp >= KERNELBASE) {
1234 1249 /*
1235 1250 * XX64 Until port is complete tolerate 8-byte aligned
1236 1251 * frame pointers but flag with a warning so they can
1237 1252 * be fixed.
1238 1253 */
1239 1254 if (((uintptr_t)fp & (STACK_ALIGN - 1)) != 0) {
1240 1255 if (((uintptr_t)fp & (8 - 1)) == 0) {
1241 1256 printf(" >> warning! 8-byte"
1242 1257 " aligned %%fp = %p\n", (void *)fp);
1243 1258 } else {
1244 1259 printf(
1245 1260 " >> mis-aligned %%fp = %p\n", (void *)fp);
1246 1261 break;
1247 1262 }
1248 1263 }
1249 1264
1250 1265 args[0] = '\0';
1251 1266 nextpc = (uintptr_t)fp->fr_savpc;
1252 1267 nextfp = (struct frame *)fp->fr_savfp;
1253 1268 if ((sym = kobj_getsymname(pc, &off)) != NULL) {
1254 1269 printf("%016lx %s:%s+%lx (%s)\n", (uintptr_t)fp,
1255 1270 mod_containing_pc((caddr_t)pc), sym, off, args);
1256 1271 (void) snprintf(stack_buffer, sizeof (stack_buffer),
1257 1272 "%s:%s+%lx (%s) | ",
1258 1273 mod_containing_pc((caddr_t)pc), sym, off, args);
1259 1274 } else {
1260 1275 printf("%016lx %lx (%s)\n",
1261 1276 (uintptr_t)fp, pc, args);
1262 1277 (void) snprintf(stack_buffer, sizeof (stack_buffer),
1263 1278 "%lx (%s) | ", pc, args);
1264 1279 }
1265 1280
1266 1281 if (panicstr && dump_stack_scratch) {
1267 1282 next_offset = offset + strlen(stack_buffer);
1268 1283 if (next_offset < STACK_BUF_SIZE) {
1269 1284 bcopy(stack_buffer, dump_stack_scratch + offset,
1270 1285 strlen(stack_buffer));
1271 1286 offset = next_offset;
1272 1287 } else {
1273 1288 /*
1274 1289 * In attempting to save the panic stack
1275 1290 * to the dumpbuf we have overflowed that area.
1276 1291 * Print a warning and continue to printf the
1277 1292 * stack to the msgbuf
1278 1293 */
1279 1294 printf("Warning: stack in the dump buffer"
1280 1295 " may be incomplete\n");
1281 1296 offset = next_offset;
1282 1297 }
1283 1298 }
1284 1299
1285 1300 pc = nextpc;
1286 1301 fp = nextfp;
1287 1302 }
1288 1303 out:
1289 1304 if (!panicstr) {
1290 1305 printf("end of traceback\n");
1291 1306 DELAY(2 * MICROSEC);
1292 1307 } else if (dump_stack_scratch) {
1293 1308 dump_stack_scratch[offset] = '\0';
1294 1309 }
1295 1310 }
1296 1311
1297 1312 #elif defined(__i386)
1298 1313
1299 1314 void
1300 1315 traceback(caddr_t fpreg)
1301 1316 {
1302 1317 struct frame *fp = (struct frame *)fpreg;
1303 1318 struct frame *nextfp, *minfp, *stacktop;
1304 1319 uintptr_t pc, nextpc;
1305 1320 uint_t offset = 0;
1306 1321 uint_t next_offset = 0;
1307 1322 char stack_buffer[1024];
1308 1323
1309 1324 cpu_t *cpu;
1310 1325
1311 1326 /*
1312 1327 * args[] holds TR_ARG_MAX hex long args, plus ", " or '\0'.
1313 1328 */
1314 1329 char args[TR_ARG_MAX * 2 + 8], *p;
1315 1330
1316 1331 int on_intr;
1317 1332 ulong_t off;
1318 1333 char *sym;
1319 1334
1320 1335 if (!panicstr)
1321 1336 printf("traceback: %%fp = %p\n", (void *)fp);
1322 1337
1323 1338 if (panicstr && !dump_stack_scratch) {
1324 1339 printf("Warning - stack not written to the dumpbuf\n");
1325 1340 }
1326 1341
1327 1342 /*
1328 1343 * If we are panicking, all high-level interrupt information in
1329 1344 * CPU was overwritten. panic_cpu has the correct values.
1330 1345 */
1331 1346 kpreempt_disable(); /* prevent migration */
1332 1347
1333 1348 cpu = (panicstr && CPU->cpu_id == panic_cpu.cpu_id)? &panic_cpu : CPU;
1334 1349
1335 1350 if ((on_intr = CPU_ON_INTR(cpu)) != 0)
1336 1351 stacktop = (struct frame *)(cpu->cpu_intr_stack + SA(MINFRAME));
1337 1352 else
1338 1353 stacktop = (struct frame *)curthread->t_stk;
1339 1354
1340 1355 kpreempt_enable();
1341 1356
1342 1357 fp = (struct frame *)plat_traceback(fpreg);
1343 1358 if ((uintptr_t)fp < KERNELBASE)
1344 1359 goto out;
1345 1360
1346 1361 minfp = fp; /* Baseline minimum frame pointer */
1347 1362 pc = fp->fr_savpc;
1348 1363 fp = (struct frame *)fp->fr_savfp;
1349 1364
1350 1365 while ((uintptr_t)fp >= KERNELBASE) {
1351 1366 ulong_t argc;
1352 1367 long *argv;
1353 1368
1354 1369 if (fp <= minfp || fp >= stacktop) {
1355 1370 if (on_intr) {
1356 1371 /*
1357 1372 * Hop from interrupt stack to thread stack.
1358 1373 */
1359 1374 stacktop = (struct frame *)curthread->t_stk;
1360 1375 minfp = (struct frame *)curthread->t_stkbase;
1361 1376 on_intr = 0;
1362 1377 continue;
1363 1378 }
1364 1379 break; /* we're outside of the expected range */
1365 1380 }
1366 1381
1367 1382 if ((uintptr_t)fp & (STACK_ALIGN - 1)) {
1368 1383 printf(" >> mis-aligned %%fp = %p\n", (void *)fp);
1369 1384 break;
1370 1385 }
1371 1386
1372 1387 nextpc = fp->fr_savpc;
1373 1388 nextfp = (struct frame *)fp->fr_savfp;
1374 1389 argc = argcount(nextpc);
1375 1390 argv = (long *)((char *)fp + sizeof (struct frame));
1376 1391
1377 1392 args[0] = '\0';
1378 1393 p = args;
1379 1394 while (argc-- > 0 && argv < (long *)stacktop) {
1380 1395 p += snprintf(p, args + sizeof (args) - p,
1381 1396 "%s%lx", (p == args) ? "" : ", ", *argv++);
1382 1397 }
1383 1398
1384 1399 if ((sym = kobj_getsymname(pc, &off)) != NULL) {
1385 1400 printf("%08lx %s:%s+%lx (%s)\n", (uintptr_t)fp,
1386 1401 mod_containing_pc((caddr_t)pc), sym, off, args);
1387 1402 (void) snprintf(stack_buffer, sizeof (stack_buffer),
1388 1403 "%s:%s+%lx (%s) | ",
1389 1404 mod_containing_pc((caddr_t)pc), sym, off, args);
1390 1405
1391 1406 } else {
1392 1407 printf("%08lx %lx (%s)\n",
1393 1408 (uintptr_t)fp, pc, args);
1394 1409 (void) snprintf(stack_buffer, sizeof (stack_buffer),
1395 1410 "%lx (%s) | ", pc, args);
1396 1411
1397 1412 }
1398 1413
1399 1414 if (panicstr && dump_stack_scratch) {
1400 1415 next_offset = offset + strlen(stack_buffer);
1401 1416 if (next_offset < STACK_BUF_SIZE) {
1402 1417 bcopy(stack_buffer, dump_stack_scratch + offset,
1403 1418 strlen(stack_buffer));
1404 1419 offset = next_offset;
1405 1420 } else {
1406 1421 /*
1407 1422 * In attempting to save the panic stack
1408 1423 * to the dumpbuf we have overflowed that area.
1409 1424 * Print a warning and continue to printf the
1410 1425 * stack to the msgbuf
1411 1426 */
1412 1427 printf("Warning: stack in the dumpbuf"
1413 1428 " may be incomplete\n");
1414 1429 offset = next_offset;
1415 1430 }
1416 1431 }
1417 1432
1418 1433 minfp = fp;
1419 1434 pc = nextpc;
1420 1435 fp = nextfp;
1421 1436 }
1422 1437 out:
1423 1438 if (!panicstr) {
1424 1439 printf("end of traceback\n");
1425 1440 DELAY(2 * MICROSEC);
1426 1441 } else if (dump_stack_scratch) {
1427 1442 dump_stack_scratch[offset] = '\0';
1428 1443 }
1429 1444
1430 1445 }
1431 1446
1432 1447 #endif /* __i386 */
1433 1448
1434 1449 /*
1435 1450 * Generate a stack backtrace from a saved register set.
1436 1451 */
1437 1452 void
1438 1453 traceregs(struct regs *rp)
1439 1454 {
1440 1455 traceback((caddr_t)rp->r_fp);
1441 1456 }
1442 1457
1443 1458 void
1444 1459 exec_set_sp(size_t stksize)
1445 1460 {
1446 1461 klwp_t *lwp = ttolwp(curthread);
1447 1462
1448 1463 lwptoregs(lwp)->r_sp = (uintptr_t)curproc->p_usrstack - stksize;
1449 1464 }
1450 1465
1451 1466 hrtime_t
1452 1467 gethrtime_waitfree(void)
1453 1468 {
1454 1469 return (dtrace_gethrtime());
1455 1470 }
1456 1471
1457 1472 hrtime_t
1458 1473 gethrtime(void)
1459 1474 {
1460 1475 return (gethrtimef());
1461 1476 }
1462 1477
1463 1478 hrtime_t
1464 1479 gethrtime_unscaled(void)
1465 1480 {
1466 1481 return (gethrtimeunscaledf());
1467 1482 }
1468 1483
1469 1484 void
1470 1485 scalehrtime(hrtime_t *hrt)
1471 1486 {
1472 1487 scalehrtimef(hrt);
1473 1488 }
1474 1489
1475 1490 uint64_t
1476 1491 unscalehrtime(hrtime_t nsecs)
1477 1492 {
1478 1493 return (unscalehrtimef(nsecs));
1479 1494 }
1480 1495
1481 1496 void
1482 1497 gethrestime(timespec_t *tp)
1483 1498 {
1484 1499 gethrestimef(tp);
1485 1500 }
1486 1501
1487 1502 #if defined(__amd64)
1488 1503 /*
1489 1504 * Part of the implementation of hres_tick(); this routine is
1490 1505 * easier in C than assembler .. called with the hres_lock held.
1491 1506 *
1492 1507 * XX64 Many of these timekeeping variables need to be extern'ed in a header
1493 1508 */
1494 1509
1495 1510 #include <sys/time.h>
1496 1511 #include <sys/machlock.h>
1497 1512
1498 1513 extern int one_sec;
1499 1514 extern int max_hres_adj;
1500 1515
1501 1516 void
1502 1517 __adj_hrestime(void)
1503 1518 {
1504 1519 long long adj;
1505 1520
1506 1521 if (hrestime_adj == 0)
1507 1522 adj = 0;
1508 1523 else if (hrestime_adj > 0) {
1509 1524 if (hrestime_adj < max_hres_adj)
1510 1525 adj = hrestime_adj;
1511 1526 else
1512 1527 adj = max_hres_adj;
1513 1528 } else {
1514 1529 if (hrestime_adj < -max_hres_adj)
1515 1530 adj = -max_hres_adj;
1516 1531 else
1517 1532 adj = hrestime_adj;
1518 1533 }
1519 1534
1520 1535 timedelta -= adj;
1521 1536 hrestime_adj = timedelta;
1522 1537 hrestime.tv_nsec += adj;
1523 1538
1524 1539 while (hrestime.tv_nsec >= NANOSEC) {
1525 1540 one_sec++;
1526 1541 hrestime.tv_sec++;
1527 1542 hrestime.tv_nsec -= NANOSEC;
1528 1543 }
1529 1544 }
1530 1545 #endif
1531 1546
1532 1547 /*
1533 1548 * Wrapper functions to maintain backwards compability
1534 1549 */
1535 1550 int
1536 1551 xcopyin(const void *uaddr, void *kaddr, size_t count)
1537 1552 {
1538 1553 return (xcopyin_nta(uaddr, kaddr, count, UIO_COPY_CACHED));
1539 1554 }
1540 1555
1541 1556 int
1542 1557 xcopyout(const void *kaddr, void *uaddr, size_t count)
1543 1558 {
1544 1559 return (xcopyout_nta(kaddr, uaddr, count, UIO_COPY_CACHED));
1545 1560 }
|
↓ open down ↓ |
868 lines elided |
↑ open up ↑ |
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX