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xhci_Quiesce


1073         ddi_fm_init(xhcip->xhci_dip, &xhcip->xhci_fm_caps, &iblk);
1074         if (DDI_FM_EREPORT_CAP(xhcip->xhci_fm_caps) ||
1075             DDI_FM_ERRCB_CAP(xhcip->xhci_fm_caps)) {
1076                 pci_ereport_setup(xhcip->xhci_dip);
1077         }
1078 
1079         if (DDI_FM_ERRCB_CAP(xhcip->xhci_fm_caps)) {
1080                 ddi_fm_handler_register(xhcip->xhci_dip,
1081                     xhci_fm_error_cb, xhcip);
1082         }
1083 }
1084 
1085 static int
1086 xhci_reg_poll(xhci_t *xhcip, xhci_reg_type_t rt, int reg, uint32_t mask,
1087     uint32_t targ, uint_t tries, int delay_ms)
1088 {
1089         uint_t i;
1090 
1091         for (i = 0; i < tries; i++) {
1092                 uint32_t val = xhci_get32(xhcip, rt, reg);
1093                 if (xhci_check_regs_acc(xhcip) != DDI_FM_OK) {

1094                         ddi_fm_service_impact(xhcip->xhci_dip,
1095                             DDI_SERVICE_LOST);
1096                         return (EIO);
1097                 }
1098 
1099                 if ((val & mask) == targ)
1100                         return (0);
1101 
1102                 delay(drv_usectohz(delay_ms * 1000));
1103         }
1104         return (ETIMEDOUT);
1105 }
1106 
1107 static boolean_t
1108 xhci_regs_map(xhci_t *xhcip)
1109 {
1110         off_t memsize;
1111         int ret;
1112         ddi_device_acc_attr_t da;
1113 


1556         }
1557         val &= XHCI_XECP_SMI_MASK;
1558         val |= XHCI_XECP_CLEAR_SMI;
1559         xhci_put32(xhcip, XHCI_R_CAP, off + XHCI_XECP_LEGCTLSTS, val);
1560         if (xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1561                 xhci_error(xhcip, "failed to write legacy control registers: "
1562                     "encountered fatal FM register error");
1563                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1564                 return (B_FALSE);
1565         }
1566 
1567         return (B_TRUE);
1568 }
1569 
1570 static int
1571 xhci_controller_stop(xhci_t *xhcip)
1572 {
1573         uint32_t cmdreg;
1574 
1575         cmdreg = xhci_get32(xhcip, XHCI_R_OPER, XHCI_USBCMD);
1576         if (xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1577                 xhci_error(xhcip, "failed to read USB Command register: "
1578                     "encountered fatal FM register error");
1579                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1580                 return (EIO);
1581         }
1582 
1583         cmdreg &= ~(XHCI_CMD_RS | XHCI_CMD_INTE);
1584         xhci_put32(xhcip, XHCI_R_OPER, XHCI_USBCMD, cmdreg);
1585         if (xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1586                 xhci_error(xhcip, "failed to write USB Command register: "
1587                     "encountered fatal FM register error");
1588                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1589                 return (EIO);
1590         }
1591 
1592         /*
1593          * Wait up to 50ms for this to occur. The specification says that this
1594          * should stop within 16ms, but we give ourselves a bit more time just
1595          * in case.
1596          */
1597         return (xhci_reg_poll(xhcip, XHCI_R_OPER, XHCI_USBSTS, XHCI_STS_HCH,
1598             XHCI_STS_HCH, 50, 10));
1599 }
1600 
1601 static int
1602 xhci_controller_reset(xhci_t *xhcip)
1603 {
1604         int ret;
1605         uint32_t cmdreg;
1606 
1607         cmdreg = xhci_get32(xhcip, XHCI_R_OPER, XHCI_USBCMD);
1608         if (xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1609                 xhci_error(xhcip, "failed to read USB Command register for "
1610                     "reset: encountered fatal FM register error");
1611                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1612                 return (EIO);
1613         }
1614 
1615         cmdreg |= XHCI_CMD_HCRST;
1616         xhci_put32(xhcip, XHCI_R_OPER, XHCI_USBCMD, cmdreg);
1617         if (xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1618                 xhci_error(xhcip, "failed to write USB Command register for "
1619                     "reset: encountered fatal FM register error");
1620                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1621                 return (EIO);
1622         }
1623 
1624         /*
1625          * Some controllers apparently don't want to be touched for at least 1ms
1626          * after we initiate the reset. Therefore give all controllers this
1627          * moment to breathe.
1628          */
1629         delay(drv_usectohz(xhci_reset_delay));
1630 
1631         /*
1632          * To tell that the reset has completed we first verify that the reset
1633          * has finished and that the USBCMD register no longer has the reset bit
1634          * asserted. However, once that's done we have to go verify that CNR
1635          * (Controller Not Ready) is no longer asserted.
1636          */
1637         if ((ret = xhci_reg_poll(xhcip, XHCI_R_OPER, XHCI_USBCMD,


1954                 xhcip->xhci_regs_handle = NULL;
1955         }
1956 
1957         if (xhcip->xhci_seq & XHCI_ATTACH_PCI_CONFIG) {
1958                 pci_config_teardown(&xhcip->xhci_cfg_handle);
1959                 xhcip->xhci_cfg_handle = NULL;
1960         }
1961 
1962         if (xhcip->xhci_seq & XHCI_ATTACH_FM) {
1963                 xhci_fm_fini(xhcip);
1964                 xhcip->xhci_fm_caps = 0;
1965         }
1966 
1967         inst = ddi_get_instance(xhcip->xhci_dip);
1968         xhcip->xhci_dip = NULL;
1969         ddi_soft_state_free(xhci_soft_state, inst);
1970 
1971         return (DDI_SUCCESS);
1972 }
1973 












1974 static int
1975 xhci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
1976 {
1977         int ret, inst, route;
1978         xhci_t *xhcip;
1979 
1980         if (cmd != DDI_ATTACH)
1981                 return (DDI_FAILURE);
1982 
1983         inst = ddi_get_instance(dip);
1984         if (ddi_soft_state_zalloc(xhci_soft_state, inst) != 0)
1985                 return (DDI_FAILURE);
1986         xhcip = ddi_get_soft_state(xhci_soft_state, ddi_get_instance(dip));
1987         xhcip->xhci_dip = dip;
1988 
1989         xhcip->xhci_regs_capoff = PCI_EINVAL32;
1990         xhcip->xhci_regs_operoff = PCI_EINVAL32;
1991         xhcip->xhci_regs_runoff = PCI_EINVAL32;
1992         xhcip->xhci_regs_dooroff = PCI_EINVAL32;
1993 


2166         ddi_prop_op,            /* cb_prop_op */
2167         NULL,                   /* cb_stream */
2168         D_MP | D_HOTPLUG,       /* cb_flag */
2169         CB_REV,                 /* cb_rev */
2170         nodev,                  /* cb_aread */
2171         nodev                   /* cb_awrite */
2172 };
2173 
2174 static struct dev_ops xhci_dev_ops = {
2175         DEVO_REV,                       /* devo_rev */
2176         0,                              /* devo_refcnt */
2177         xhci_getinfo,                   /* devo_getinfo */
2178         nulldev,                        /* devo_identify */
2179         nulldev,                        /* devo_probe */
2180         xhci_attach,                    /* devo_attach */
2181         xhci_detach,                    /* devo_detach */
2182         nodev,                          /* devo_reset */
2183         &xhci_cb_ops,                       /* devo_cb_ops */
2184         &usba_hubdi_busops,         /* devo_bus_ops */
2185         usba_hubdi_root_hub_power,      /* devo_power */
2186         ddi_quiesce_not_supported       /* devo_quiesce */
2187 };
2188 
2189 static struct modldrv xhci_modldrv = {
2190         &mod_driverops,
2191         "USB xHCI Driver",
2192         &xhci_dev_ops
2193 };
2194 
2195 static struct modlinkage xhci_modlinkage = {
2196         MODREV_1,
2197         &xhci_modldrv,
2198         NULL
2199 };
2200 
2201 int
2202 _init(void)
2203 {
2204         int ret;
2205 
2206         if ((ret = ddi_soft_state_init(&xhci_soft_state, sizeof (xhci_t),




1073         ddi_fm_init(xhcip->xhci_dip, &xhcip->xhci_fm_caps, &iblk);
1074         if (DDI_FM_EREPORT_CAP(xhcip->xhci_fm_caps) ||
1075             DDI_FM_ERRCB_CAP(xhcip->xhci_fm_caps)) {
1076                 pci_ereport_setup(xhcip->xhci_dip);
1077         }
1078 
1079         if (DDI_FM_ERRCB_CAP(xhcip->xhci_fm_caps)) {
1080                 ddi_fm_handler_register(xhcip->xhci_dip,
1081                     xhci_fm_error_cb, xhcip);
1082         }
1083 }
1084 
1085 static int
1086 xhci_reg_poll(xhci_t *xhcip, xhci_reg_type_t rt, int reg, uint32_t mask,
1087     uint32_t targ, uint_t tries, int delay_ms)
1088 {
1089         uint_t i;
1090 
1091         for (i = 0; i < tries; i++) {
1092                 uint32_t val = xhci_get32(xhcip, rt, reg);
1093                 if (!quiesce_active && xhci_check_regs_acc(xhcip)
1094                     != DDI_FM_OK) {
1095                         ddi_fm_service_impact(xhcip->xhci_dip,
1096                             DDI_SERVICE_LOST);
1097                         return (EIO);
1098                 }
1099 
1100                 if ((val & mask) == targ)
1101                         return (0);
1102 
1103                 delay(drv_usectohz(delay_ms * 1000));
1104         }
1105         return (ETIMEDOUT);
1106 }
1107 
1108 static boolean_t
1109 xhci_regs_map(xhci_t *xhcip)
1110 {
1111         off_t memsize;
1112         int ret;
1113         ddi_device_acc_attr_t da;
1114 


1557         }
1558         val &= XHCI_XECP_SMI_MASK;
1559         val |= XHCI_XECP_CLEAR_SMI;
1560         xhci_put32(xhcip, XHCI_R_CAP, off + XHCI_XECP_LEGCTLSTS, val);
1561         if (xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1562                 xhci_error(xhcip, "failed to write legacy control registers: "
1563                     "encountered fatal FM register error");
1564                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1565                 return (B_FALSE);
1566         }
1567 
1568         return (B_TRUE);
1569 }
1570 
1571 static int
1572 xhci_controller_stop(xhci_t *xhcip)
1573 {
1574         uint32_t cmdreg;
1575 
1576         cmdreg = xhci_get32(xhcip, XHCI_R_OPER, XHCI_USBCMD);
1577         if (!quiesce_active && xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1578                 xhci_error(xhcip, "failed to read USB Command register: "
1579                     "encountered fatal FM register error");
1580                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1581                 return (EIO);
1582         }
1583 
1584         cmdreg &= ~(XHCI_CMD_RS | XHCI_CMD_INTE);
1585         xhci_put32(xhcip, XHCI_R_OPER, XHCI_USBCMD, cmdreg);
1586         if (!quiesce_active && xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1587                 xhci_error(xhcip, "failed to write USB Command register: "
1588                     "encountered fatal FM register error");
1589                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1590                 return (EIO);
1591         }
1592 
1593         /*
1594          * Wait up to 50ms for this to occur. The specification says that this
1595          * should stop within 16ms, but we give ourselves a bit more time just
1596          * in case.
1597          */
1598         return (xhci_reg_poll(xhcip, XHCI_R_OPER, XHCI_USBSTS, XHCI_STS_HCH,
1599             XHCI_STS_HCH, 50, 10));
1600 }
1601 
1602 static int
1603 xhci_controller_reset(xhci_t *xhcip)
1604 {
1605         int ret;
1606         uint32_t cmdreg;
1607 
1608         cmdreg = xhci_get32(xhcip, XHCI_R_OPER, XHCI_USBCMD);
1609         if (!quiesce_active && xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1610                 xhci_error(xhcip, "failed to read USB Command register for "
1611                     "reset: encountered fatal FM register error");
1612                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1613                 return (EIO);
1614         }
1615 
1616         cmdreg |= XHCI_CMD_HCRST;
1617         xhci_put32(xhcip, XHCI_R_OPER, XHCI_USBCMD, cmdreg);
1618         if (!quiesce_active && xhci_check_regs_acc(xhcip) != DDI_FM_OK) {
1619                 xhci_error(xhcip, "failed to write USB Command register for "
1620                     "reset: encountered fatal FM register error");
1621                 ddi_fm_service_impact(xhcip->xhci_dip, DDI_SERVICE_LOST);
1622                 return (EIO);
1623         }
1624 
1625         /*
1626          * Some controllers apparently don't want to be touched for at least 1ms
1627          * after we initiate the reset. Therefore give all controllers this
1628          * moment to breathe.
1629          */
1630         delay(drv_usectohz(xhci_reset_delay));
1631 
1632         /*
1633          * To tell that the reset has completed we first verify that the reset
1634          * has finished and that the USBCMD register no longer has the reset bit
1635          * asserted. However, once that's done we have to go verify that CNR
1636          * (Controller Not Ready) is no longer asserted.
1637          */
1638         if ((ret = xhci_reg_poll(xhcip, XHCI_R_OPER, XHCI_USBCMD,


1955                 xhcip->xhci_regs_handle = NULL;
1956         }
1957 
1958         if (xhcip->xhci_seq & XHCI_ATTACH_PCI_CONFIG) {
1959                 pci_config_teardown(&xhcip->xhci_cfg_handle);
1960                 xhcip->xhci_cfg_handle = NULL;
1961         }
1962 
1963         if (xhcip->xhci_seq & XHCI_ATTACH_FM) {
1964                 xhci_fm_fini(xhcip);
1965                 xhcip->xhci_fm_caps = 0;
1966         }
1967 
1968         inst = ddi_get_instance(xhcip->xhci_dip);
1969         xhcip->xhci_dip = NULL;
1970         ddi_soft_state_free(xhci_soft_state, inst);
1971 
1972         return (DDI_SUCCESS);
1973 }
1974 
1975 /* QUIESCE(9E) to support fast reboot */
1976 int
1977 xhci_quiesce(dev_info_t *dip)
1978 {
1979         xhci_t *xhcip;
1980 
1981         xhcip = ddi_get_soft_state(xhci_soft_state, ddi_get_instance(dip));
1982 
1983         return (xhci_controller_stop(xhcip) == 0 &&
1984             xhci_controller_reset(xhcip) == 0 ? DDI_SUCCESS : DDI_FAILURE);
1985 }
1986 
1987 static int
1988 xhci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
1989 {
1990         int ret, inst, route;
1991         xhci_t *xhcip;
1992 
1993         if (cmd != DDI_ATTACH)
1994                 return (DDI_FAILURE);
1995 
1996         inst = ddi_get_instance(dip);
1997         if (ddi_soft_state_zalloc(xhci_soft_state, inst) != 0)
1998                 return (DDI_FAILURE);
1999         xhcip = ddi_get_soft_state(xhci_soft_state, ddi_get_instance(dip));
2000         xhcip->xhci_dip = dip;
2001 
2002         xhcip->xhci_regs_capoff = PCI_EINVAL32;
2003         xhcip->xhci_regs_operoff = PCI_EINVAL32;
2004         xhcip->xhci_regs_runoff = PCI_EINVAL32;
2005         xhcip->xhci_regs_dooroff = PCI_EINVAL32;
2006 


2179         ddi_prop_op,            /* cb_prop_op */
2180         NULL,                   /* cb_stream */
2181         D_MP | D_HOTPLUG,       /* cb_flag */
2182         CB_REV,                 /* cb_rev */
2183         nodev,                  /* cb_aread */
2184         nodev                   /* cb_awrite */
2185 };
2186 
2187 static struct dev_ops xhci_dev_ops = {
2188         DEVO_REV,                       /* devo_rev */
2189         0,                              /* devo_refcnt */
2190         xhci_getinfo,                   /* devo_getinfo */
2191         nulldev,                        /* devo_identify */
2192         nulldev,                        /* devo_probe */
2193         xhci_attach,                    /* devo_attach */
2194         xhci_detach,                    /* devo_detach */
2195         nodev,                          /* devo_reset */
2196         &xhci_cb_ops,                       /* devo_cb_ops */
2197         &usba_hubdi_busops,         /* devo_bus_ops */
2198         usba_hubdi_root_hub_power,      /* devo_power */
2199         xhci_quiesce                    /* devo_quiesce */
2200 };
2201 
2202 static struct modldrv xhci_modldrv = {
2203         &mod_driverops,
2204         "USB xHCI Driver",
2205         &xhci_dev_ops
2206 };
2207 
2208 static struct modlinkage xhci_modlinkage = {
2209         MODREV_1,
2210         &xhci_modldrv,
2211         NULL
2212 };
2213 
2214 int
2215 _init(void)
2216 {
2217         int ret;
2218 
2219         if ((ret = ddi_soft_state_init(&xhci_soft_state, sizeof (xhci_t),