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cstyle sort of updates
7127  remove -Wno-missing-braces from Makefile.uts


 993         enum mc_funcnum bm_func; /* PCI config space function number for bind */
 994         const char *bm_model;    /* value for device node model property */
 995         void (*bm_mkprops)(mc_pcicfg_hdl_t, mc_t *);
 996 } mc_bind_map_t;
 997 
 998 /*
 999  * Do not attach to MC function 3 - agpgart already attaches to that.
1000  * Function 3 may be a good candidate for a nexus driver to fan it out
1001  * into virtual devices by functionality.  We will use pci_mech1_getl
1002  * to retrieve the function 3 parameters we require.
1003  */
1004 
1005 static const mc_bind_map_t mc_bind_map[] = {
1006         { MC_FUNC_HTCONFIG_BINDNM, MC_FUNC_HTCONFIG,
1007             "AMD Memory Controller (HT Configuration)", mc_mkprops_htcfg },
1008         { MC_FUNC_ADDRMAP_BINDNM, MC_FUNC_ADDRMAP,
1009             "AMD Memory Controller (Address Map)", mc_mkprops_addrmap },
1010         { MC_FUNC_DRAMCTL_BINDNM, MC_FUNC_DRAMCTL,
1011             "AMD Memory Controller (DRAM Controller & HT Trace)",
1012             mc_mkprops_dramctl },
1013         NULL
1014 };
1015 
1016 /*ARGSUSED*/
1017 static int
1018 mc_open(dev_t *devp, int flag, int otyp, cred_t *credp)
1019 {
1020         if (otyp != OTYP_CHR)
1021                 return (EINVAL);
1022 
1023         rw_enter(&mc_lock, RW_READER);
1024         if (mc_lookup_by_chipid(getminor(*devp)) == NULL) {
1025                 rw_exit(&mc_lock);
1026                 return (EINVAL);
1027         }
1028         rw_exit(&mc_lock);
1029 
1030         return (0);
1031 }
1032 
1033 /*ARGSUSED*/


1749         mc_getinfo,             /* devo_getinfo */
1750         nulldev,                /* devo_identify */
1751         nulldev,                /* devo_probe */
1752         mc_attach,              /* devo_attach */
1753         mc_detach,              /* devo_detach */
1754         nodev,                  /* devo_reset */
1755         &mc_cb_ops,         /* devo_cb_ops */
1756         NULL,                   /* devo_bus_ops */
1757         NULL,                   /* devo_power */
1758         ddi_quiesce_not_needed,         /* devo_quiesce */
1759 };
1760 
1761 static struct modldrv modldrv = {
1762         &mod_driverops,
1763         "Memory Controller for AMD processors",
1764         &mc_ops
1765 };
1766 
1767 static struct modlinkage modlinkage = {
1768         MODREV_1,
1769         (void *)&modldrv,
1770         NULL
1771 };
1772 
1773 int
1774 _init(void)
1775 {
1776         /*
1777          * Refuse to load if there is no PCI config space support.
1778          */
1779         if (pci_getl_func == NULL)
1780                 return (ENOTSUP);
1781 
1782         rw_init(&mc_lock, NULL, RW_DRIVER, NULL);
1783         return (mod_install(&modlinkage));
1784 }
1785 
1786 int
1787 _info(struct modinfo *modinfop)
1788 {
1789         return (mod_info(&modlinkage, modinfop));
1790 }


 993         enum mc_funcnum bm_func; /* PCI config space function number for bind */
 994         const char *bm_model;    /* value for device node model property */
 995         void (*bm_mkprops)(mc_pcicfg_hdl_t, mc_t *);
 996 } mc_bind_map_t;
 997 
 998 /*
 999  * Do not attach to MC function 3 - agpgart already attaches to that.
1000  * Function 3 may be a good candidate for a nexus driver to fan it out
1001  * into virtual devices by functionality.  We will use pci_mech1_getl
1002  * to retrieve the function 3 parameters we require.
1003  */
1004 
1005 static const mc_bind_map_t mc_bind_map[] = {
1006         { MC_FUNC_HTCONFIG_BINDNM, MC_FUNC_HTCONFIG,
1007             "AMD Memory Controller (HT Configuration)", mc_mkprops_htcfg },
1008         { MC_FUNC_ADDRMAP_BINDNM, MC_FUNC_ADDRMAP,
1009             "AMD Memory Controller (Address Map)", mc_mkprops_addrmap },
1010         { MC_FUNC_DRAMCTL_BINDNM, MC_FUNC_DRAMCTL,
1011             "AMD Memory Controller (DRAM Controller & HT Trace)",
1012             mc_mkprops_dramctl },
1013         { NULL }
1014 };
1015 
1016 /*ARGSUSED*/
1017 static int
1018 mc_open(dev_t *devp, int flag, int otyp, cred_t *credp)
1019 {
1020         if (otyp != OTYP_CHR)
1021                 return (EINVAL);
1022 
1023         rw_enter(&mc_lock, RW_READER);
1024         if (mc_lookup_by_chipid(getminor(*devp)) == NULL) {
1025                 rw_exit(&mc_lock);
1026                 return (EINVAL);
1027         }
1028         rw_exit(&mc_lock);
1029 
1030         return (0);
1031 }
1032 
1033 /*ARGSUSED*/


1749         mc_getinfo,             /* devo_getinfo */
1750         nulldev,                /* devo_identify */
1751         nulldev,                /* devo_probe */
1752         mc_attach,              /* devo_attach */
1753         mc_detach,              /* devo_detach */
1754         nodev,                  /* devo_reset */
1755         &mc_cb_ops,         /* devo_cb_ops */
1756         NULL,                   /* devo_bus_ops */
1757         NULL,                   /* devo_power */
1758         ddi_quiesce_not_needed,         /* devo_quiesce */
1759 };
1760 
1761 static struct modldrv modldrv = {
1762         &mod_driverops,
1763         "Memory Controller for AMD processors",
1764         &mc_ops
1765 };
1766 
1767 static struct modlinkage modlinkage = {
1768         MODREV_1,
1769         { (void *)&modldrv, NULL }

1770 };
1771 
1772 int
1773 _init(void)
1774 {
1775         /*
1776          * Refuse to load if there is no PCI config space support.
1777          */
1778         if (pci_getl_func == NULL)
1779                 return (ENOTSUP);
1780 
1781         rw_init(&mc_lock, NULL, RW_DRIVER, NULL);
1782         return (mod_install(&modlinkage));
1783 }
1784 
1785 int
1786 _info(struct modinfo *modinfop)
1787 {
1788         return (mod_info(&modlinkage, modinfop));
1789 }