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7127 remove -Wno-missing-braces from Makefile.uts
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--- old/usr/src/uts/intel/io/agpgart/amd64_gart.c
+++ new/usr/src/uts/intel/io/agpgart/amd64_gart.c
1 1 /*
2 2 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
3 3 * Use is subject to license terms.
4 4 */
5 5
6 6 #include <sys/conf.h>
7 7 #include <sys/ddi.h>
8 8 #include <sys/sunddi.h>
9 9 #include <sys/modctl.h>
10 10 #include <sys/stat.h>
11 11 #include <sys/sunldi.h>
12 12 #include <sys/file.h>
13 13 #include <sys/agpgart.h>
14 14 #include <sys/agp/agpdefs.h>
15 15 #include <sys/agp/agpamd64gart_io.h>
16 16
17 17 #define MAX_GART_INSTS 8
18 18 #define GETSOFTC(instance) ((amd64_gart_softstate_t *) \
19 19 ddi_get_soft_state(amd64_gart_glob_soft_handle, (instance)));
20 20 #define DEV2INST(dev) (getminor(dev))
21 21 #define INST2NODENUM(inst) (inst)
22 22
23 23 int amd64_debug_var = 0;
24 24 #define AMD64DB_PRINT1(fmt) if (amd64_debug_var == 1) cmn_err fmt
25 25 #define AMD64DB_PRINT2(fmt) if (amd64_debug_var >= 1) cmn_err fmt
26 26
27 27 typedef struct amd64_gart_softstate {
28 28 dev_info_t *gsoft_dip;
29 29 ddi_acc_handle_t gsoft_pcihdl;
30 30 kmutex_t gsoft_lock;
31 31 }amd64_gart_softstate_t;
32 32
33 33 static void *amd64_gart_glob_soft_handle;
34 34
35 35 static uint64_t
36 36 amd64_get_aperbase(amd64_gart_softstate_t *sc)
37 37 {
38 38 uint32_t value;
39 39 uint64_t aper_base;
40 40
41 41 /* amd64 aperture base support 40 bits and 32M aligned */
42 42 value = pci_config_get32(sc->gsoft_pcihdl,
43 43 AMD64_APERTURE_BASE) & AMD64_APERBASE_MASK;
44 44 aper_base = (uint64_t)value << AMD64_APERBASE_SHIFT;
45 45 return (aper_base);
46 46 }
47 47
48 48 static size_t
49 49 amd64_get_apersize(amd64_gart_softstate_t *sc)
50 50 {
51 51 uint32_t value;
52 52 size_t size;
53 53
54 54 value = pci_config_get32(sc->gsoft_pcihdl, AMD64_APERTURE_CONTROL);
55 55
56 56 value = (value & AMD64_APERSIZE_MASK) >> 1;
57 57
58 58 /* aper size = 2^value x 32 */
59 59 switch (value) {
60 60 case 0x0:
61 61 size = 32;
62 62 break;
63 63 case 0x1:
64 64 size = 64;
65 65 break;
66 66 case 0x2:
67 67 size = 128;
68 68 break;
69 69 case 0x3:
70 70 size = 256;
71 71 break;
72 72 case 0x4:
73 73 size = 512;
74 74 break;
75 75 case 0x5:
76 76 size = 1024;
77 77 break;
78 78 case 0x6:
79 79 size = 2048;
80 80 break;
81 81 default: /* reserved */
82 82 size = 0;
83 83 };
84 84
85 85 return (size);
86 86 }
87 87
88 88 static void
89 89 amd64_invalidate_gtlb(amd64_gart_softstate_t *sc)
90 90 {
91 91 uint32_t value;
92 92
93 93 value = pci_config_get32(sc->gsoft_pcihdl, AMD64_GART_CACHE_CTL);
94 94 value |= AMD64_INVALID_CACHE;
95 95
96 96 pci_config_put32(sc->gsoft_pcihdl, AMD64_GART_CACHE_CTL, value);
97 97 }
98 98
99 99 static void
100 100 amd64_enable_gart(amd64_gart_softstate_t *sc, int enable)
101 101 {
102 102 uint32_t aper_ctl;
103 103 uint32_t aper_base;
104 104 uint32_t gart_ctl;
105 105 uint32_t gart_base;
106 106
107 107 aper_ctl = pci_config_get32(sc->gsoft_pcihdl, AMD64_APERTURE_CONTROL);
108 108 AMD64DB_PRINT1((CE_NOTE, "before: aper_ctl = %x", aper_ctl));
109 109 aper_base = pci_config_get32(sc->gsoft_pcihdl, AMD64_APERTURE_BASE);
110 110 gart_ctl = pci_config_get32(sc->gsoft_pcihdl, AMD64_GART_CACHE_CTL);
111 111 gart_base = pci_config_get32(sc->gsoft_pcihdl, AMD64_GART_BASE);
112 112 #ifdef lint
113 113 aper_base = aper_base;
114 114 gart_ctl = gart_ctl;
115 115 gart_base = gart_base;
116 116 #endif /* lint */
117 117 AMD64DB_PRINT1((CE_NOTE, "before: aper_base = %x", aper_base));
118 118 AMD64DB_PRINT1((CE_NOTE, "before: gart_ctl = %x", gart_ctl));
119 119 AMD64DB_PRINT1((CE_NOTE, "before: gart_base = %x", gart_base));
120 120 if (enable) {
121 121 aper_ctl |= AMD64_GARTEN;
122 122 aper_ctl &= ~(AMD64_DISGARTCPU | AMD64_DISGARTIO);
123 123 } else
124 124 aper_ctl &= (~AMD64_GARTEN);
125 125
126 126 pci_config_put32(sc->gsoft_pcihdl, AMD64_APERTURE_CONTROL, aper_ctl);
127 127 }
128 128
129 129 /*ARGSUSED*/
130 130 static int
131 131 amd64_gart_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd,
132 132 void *arg, void **resultp)
133 133 {
134 134 amd64_gart_softstate_t *st;
135 135 int instance, rval = DDI_FAILURE;
136 136 dev_t dev;
137 137
138 138 switch (cmd) {
139 139 case DDI_INFO_DEVT2DEVINFO:
140 140 dev = (dev_t)arg;
141 141 instance = DEV2INST(dev);
142 142 st = ddi_get_soft_state(amd64_gart_glob_soft_handle, instance);
143 143 if (st != NULL) {
144 144 mutex_enter(&st->gsoft_lock);
145 145 *resultp = st->gsoft_dip;
146 146 mutex_exit(&st->gsoft_lock);
147 147 rval = DDI_SUCCESS;
148 148 } else {
149 149 *resultp = NULL;
150 150 }
151 151
152 152 break;
153 153 case DDI_INFO_DEVT2INSTANCE:
154 154 dev = (dev_t)arg;
155 155 instance = DEV2INST(dev);
156 156 *resultp = (void *)(uintptr_t)instance;
157 157 rval = DDI_SUCCESS;
158 158 break;
159 159 default:
160 160 break;
161 161 }
162 162
163 163 return (rval);
164 164 }
165 165
166 166 static int
167 167 amd64_gart_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
168 168 {
169 169 int instance;
170 170 amd64_gart_softstate_t *sc;
171 171 int status;
172 172 char buf[80];
173 173
174 174 switch (cmd) {
175 175 default:
176 176 return (DDI_FAILURE);
177 177
178 178 case DDI_RESUME:
179 179 /* Nothing special is needed for resume. */
180 180 return (DDI_SUCCESS);
181 181
182 182 case DDI_ATTACH:
183 183 break;
184 184 }
185 185
186 186 instance = ddi_get_instance(dip);
187 187
188 188 if (ddi_soft_state_zalloc(amd64_gart_glob_soft_handle, instance) !=
189 189 DDI_SUCCESS)
190 190 return (DDI_FAILURE);
191 191
192 192 sc = ddi_get_soft_state(amd64_gart_glob_soft_handle, instance);
193 193 mutex_init(&sc->gsoft_lock, NULL, MUTEX_DRIVER, NULL);
194 194 sc->gsoft_dip = dip;
195 195 status = pci_config_setup(dip, &sc->gsoft_pcihdl);
196 196 if (status != DDI_SUCCESS) {
197 197 ddi_soft_state_free(amd64_gart_glob_soft_handle, instance);
198 198 return (DDI_FAILURE);
199 199 }
200 200 (void) sprintf(buf, "%s-%d", AMD64GART_NAME, instance);
201 201 status = ddi_create_minor_node(dip, buf, S_IFCHR,
202 202 INST2NODENUM(instance), DDI_NT_AGP_CPUGART, 0);
203 203 if (status != DDI_SUCCESS) {
204 204 pci_config_teardown(&sc->gsoft_pcihdl);
205 205 ddi_soft_state_free(amd64_gart_glob_soft_handle, instance);
206 206 return (DDI_FAILURE);
207 207 }
208 208 return (DDI_SUCCESS);
209 209 }
210 210
211 211 /*ARGSUSED*/
212 212 static int
213 213 amd64_gart_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
214 214 {
215 215 int instance;
216 216 amd64_gart_softstate_t *sc;
217 217 char buf[80];
218 218
219 219 switch (cmd) {
220 220 default:
221 221 return (DDI_FAILURE);
222 222
223 223 case DDI_SUSPEND:
224 224 /* Nothing special is needed for suspend */
225 225 return (DDI_SUCCESS);
226 226
227 227 case DDI_DETACH:
228 228 break;
229 229 }
230 230
231 231 instance = ddi_get_instance(dip);
232 232 sc = ddi_get_soft_state(amd64_gart_glob_soft_handle, instance);
233 233
234 234 (void) sprintf(buf, "%s-%d", AMD64GART_NAME, instance);
235 235 ddi_remove_minor_node(dip, buf);
236 236 pci_config_teardown(&sc->gsoft_pcihdl);
237 237 mutex_destroy(&sc->gsoft_lock);
238 238 ddi_soft_state_free(amd64_gart_glob_soft_handle, instance);
239 239
240 240 return (DDI_SUCCESS);
241 241 }
242 242
243 243 /*ARGSUSED*/
244 244 static int
245 245 amd64_gart_ioctl(dev_t dev, int cmd, intptr_t data, int mode,
246 246 cred_t *cred, int *rval)
247 247 {
248 248 int instance;
249 249 amd64_gart_softstate_t *sc;
250 250 static char kernel_only[] =
251 251 "amd64_gart_ioctl: is a kernel only ioctl";
252 252
253 253 if (!(mode & FKIOCTL)) {
254 254 AMD64DB_PRINT2((CE_CONT, kernel_only));
255 255 return (ENXIO);
256 256 }
257 257 instance = DEV2INST(dev);
258 258 sc = GETSOFTC(instance);
259 259
260 260 if (sc == NULL)
261 261 return (ENXIO);
262 262 mutex_enter(&sc->gsoft_lock);
263 263
264 264 switch (cmd) {
265 265 case AMD64_GET_INFO:
266 266 {
267 267 amdgart_info_t info;
268 268
269 269 info.cgart_aperbase = amd64_get_aperbase(sc);
270 270 info.cgart_apersize = amd64_get_apersize(sc);
271 271
272 272 if (ddi_copyout(&info, (void *)data,
273 273 sizeof (amdgart_info_t), mode)) {
274 274 mutex_exit(&sc->gsoft_lock);
275 275 return (EFAULT);
276 276 }
277 277 break;
278 278 }
279 279 case AMD64_SET_GART_ADDR:
280 280 {
281 281 uint32_t addr;
282 282
283 283 if (ddi_copyin((void *)data, &addr, sizeof (uint32_t), mode)) {
284 284 mutex_exit(&sc->gsoft_lock);
285 285 return (EFAULT);
286 286 }
287 287
288 288 pci_config_put32(sc->gsoft_pcihdl, AMD64_GART_BASE, addr);
289 289 amd64_enable_gart(sc, 1);
290 290
291 291 break;
292 292 }
293 293 case AMD64_FLUSH_GTLB:
294 294 {
295 295 amd64_invalidate_gtlb(sc);
296 296
297 297 break;
298 298 }
299 299 case AMD64_CONFIGURE:
300 300 {
301 301 /* reserved */
302 302 break;
303 303 }
304 304 case AMD64_UNCONFIG:
305 305 {
306 306 amd64_enable_gart(sc, 0);
307 307 pci_config_put32(sc->gsoft_pcihdl, AMD64_GART_BASE, 0x00000000);
308 308
309 309 break;
310 310 }
311 311 default:
312 312 mutex_exit(&sc->gsoft_lock);
313 313 return (ENXIO);
314 314
315 315 }
316 316
317 317 mutex_exit(&sc->gsoft_lock);
318 318
319 319 return (0);
320 320 }
321 321
322 322 /*ARGSUSED*/
323 323 static int
324 324 amd64_gart_open(dev_t *dev, int flag, int otyp, cred_t *cred)
325 325 {
326 326 int instance;
327 327 amd64_gart_softstate_t *sc;
328 328
329 329 if (!(flag & FKLYR))
330 330 return (ENXIO);
331 331
332 332 instance = DEV2INST(*dev);
333 333 sc = GETSOFTC(instance);
334 334
335 335 if (sc == NULL)
336 336 return (ENXIO);
337 337
338 338 return (0);
339 339 }
340 340
341 341 /*ARGSUSED*/
342 342 static int
343 343 amd64_gart_close(dev_t dev, int flag, int otyp, cred_t *cred)
344 344 {
345 345 int instance;
346 346 amd64_gart_softstate_t *sc;
347 347
348 348 instance = DEV2INST(dev);
349 349 sc = GETSOFTC(instance);
350 350
351 351 if (sc == NULL)
352 352 return (ENXIO);
353 353
354 354 return (0);
355 355 }
356 356
357 357 static struct cb_ops amd64_gart_cb_ops = {
358 358 amd64_gart_open, /* cb_open() */
359 359 amd64_gart_close, /* cb_close() */
360 360 nodev, /* cb_strategy() */
361 361 nodev, /* cb_print */
362 362 nodev, /* cb_dump */
363 363 nodev, /* cb_read() */
364 364 nodev, /* cb_write() */
365 365 amd64_gart_ioctl, /* cb_ioctl */
366 366 nodev, /* cb_devmap */
367 367 nodev, /* cb_mmap */
368 368 nodev, /* cb_segmap */
369 369 nochpoll, /* cb_chpoll */
370 370 ddi_prop_op, /* cb_prop_op */
371 371 0, /* cb_stream */
372 372 D_NEW | D_MP, /* cb_flag */
373 373 CB_REV, /* cb_ops version? */
374 374 nodev, /* cb_aread() */
375 375 nodev, /* cb_awrite() */
376 376 };
377 377
378 378 /* device operations */
379 379 static struct dev_ops amd64_gart_ops = {
380 380 DEVO_REV, /* devo_rev */
381 381 0, /* devo_refcnt */
382 382 amd64_gart_getinfo, /* devo_getinfo */
383 383 nulldev, /* devo_identify */
384 384 nulldev, /* devo_probe */
385 385 amd64_gart_attach, /* devo_attach */
386 386 amd64_gart_detach, /* devo_detach */
387 387 nodev, /* devo_reset */
388 388 &amd64_gart_cb_ops, /* devo_cb_ops */
389 389 0, /* devo_bus_ops */
390 390 0, /* devo_power */
391 391 ddi_quiesce_not_needed, /* devo_quiesce */
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392 392 };
393 393
394 394 static struct modldrv modldrv = {
395 395 &mod_driverops,
396 396 "AGP AMD gart driver",
397 397 &amd64_gart_ops,
398 398 };
399 399
400 400 static struct modlinkage modlinkage = {
401 401 MODREV_1, /* MODREV_1 is indicated by manual */
402 - &modldrv,
403 - NULL
402 + { &modldrv, NULL }
404 403 };
405 404
406 405
407 406 int
408 407 _init(void)
409 408 {
410 409 int ret = DDI_SUCCESS;
411 410
412 411 ret = ddi_soft_state_init(&amd64_gart_glob_soft_handle,
413 412 sizeof (amd64_gart_softstate_t),
414 413 MAX_GART_INSTS);
415 414
416 415 if (ret)
417 416 return (ret);
418 417 if ((ret = mod_install(&modlinkage)) != 0) {
419 418 ddi_soft_state_fini(&amd64_gart_glob_soft_handle);
420 419 return (ret);
421 420 }
422 421 return (DDI_SUCCESS);
423 422 }
424 423
425 424 int
426 425 _info(struct modinfo *modinfop)
427 426 {
428 427 return (mod_info(&modlinkage, modinfop));
429 428 }
430 429
431 430 int
432 431 _fini(void)
433 432 {
434 433 int ret;
435 434 if ((ret = mod_remove(&modlinkage)) == 0) {
436 435 ddi_soft_state_fini(&amd64_gart_glob_soft_handle);
437 436 }
438 437 return (ret);
439 438 }
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