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update to acpica-unix2-20131218
acpica-unix2-20130823
PANKOVs restructure

@@ -3,11 +3,11 @@
  * Name: actbl.h - Basic ACPI Table Definitions
  *
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2011, Intel Corp.
+ * Copyright (C) 2000 - 2013, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:

@@ -80,13 +80,19 @@
  * specification, since the tables are provided by the system BIOS
  */
 #pragma pack(1)
 
 /*
- * Note about bitfields: The UINT8 type is used for bitfields in ACPI tables.
- * This is the only type that is even remotely portable. Anything else is not
- * portable, so do not use any other bitfield types.
+ * Note: C bitfields are not used for this reason:
+ *
+ * "Bitfields are great and easy to read, but unfortunately the C language
+ * does not specify the layout of bitfields in memory, which means they are
+ * essentially useless for dealing with packed data in on-disk formats or
+ * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
+ * this decision was a design error in C. Ritchie could have picked an order
+ * and stuck with it." Norman Ramsey.
+ * See http://stackoverflow.com/a/1053662/41661
  */
 
 
 /*******************************************************************************
  *

@@ -97,11 +103,11 @@
 
 typedef struct acpi_table_header
 {
     char                    Signature[ACPI_NAME_SIZE];          /* ASCII table signature */
     UINT32                  Length;                             /* Length of table in bytes, including this header */
-    UINT8                   Revision;                           /* ACPI Specification minor version # */
+    UINT8                   Revision;                           /* ACPI Specification minor version number */
     UINT8                   Checksum;                           /* To make sum of entire table == 0 */
     char                    OemId[ACPI_OEM_ID_SIZE];            /* ASCII OEM identification */
     char                    OemTableId[ACPI_OEM_TABLE_ID_SIZE]; /* ASCII OEM table identification */
     UINT32                  OemRevision;                        /* OEM revision number */
     char                    AslCompilerId[ACPI_NAME_SIZE];      /* ASCII ASL compiler vendor ID */

@@ -113,11 +119,11 @@
 /*******************************************************************************
  *
  * GAS - Generic Address Structure (ACPI 2.0+)
  *
  * Note: Since this structure is used in the ACPI tables, it is byte aligned.
- * If misaliged access is not supported by the hardware, accesses to the
+ * If misaligned access is not supported by the hardware, accesses to the
  * 64-bit Address field must be performed with care.
  *
  ******************************************************************************/
 
 typedef struct acpi_generic_address

@@ -195,11 +201,14 @@
     ACPI_TABLE_HEADER       Header;                 /* Common ACPI table header */
     UINT64                  TableOffsetEntry[1];    /* Array of pointers to ACPI tables */
 
 } ACPI_TABLE_XSDT;
 
+#define ACPI_RSDT_ENTRY_SIZE        (sizeof (UINT32))
+#define ACPI_XSDT_ENTRY_SIZE        (sizeof (UINT64))
 
+
 /*******************************************************************************
  *
  * FACS - Firmware ACPI Control Structure (FACS)
  *
  ******************************************************************************/

@@ -251,35 +260,35 @@
     UINT32                  Dsdt;               /* 32-bit physical address of DSDT */
     UINT8                   Model;              /* System Interrupt Model (ACPI 1.0) - not used in ACPI 2.0+ */
     UINT8                   PreferredProfile;   /* Conveys preferred power management profile to OSPM. */
     UINT16                  SciInterrupt;       /* System vector of SCI interrupt */
     UINT32                  SmiCommand;         /* 32-bit Port address of SMI command port */
-    UINT8                   AcpiEnable;         /* Value to write to smi_cmd to enable ACPI */
-    UINT8                   AcpiDisable;        /* Value to write to smi_cmd to disable ACPI */
-    UINT8                   S4BiosRequest;      /* Value to write to SMI CMD to enter S4BIOS state */
+    UINT8                   AcpiEnable;         /* Value to write to SMI_CMD to enable ACPI */
+    UINT8                   AcpiDisable;        /* Value to write to SMI_CMD to disable ACPI */
+    UINT8                   S4BiosRequest;      /* Value to write to SMI_CMD to enter S4BIOS state */
     UINT8                   PstateControl;      /* Processor performance state control*/
-    UINT32                  Pm1aEventBlock;     /* 32-bit Port address of Power Mgt 1a Event Reg Blk */
-    UINT32                  Pm1bEventBlock;     /* 32-bit Port address of Power Mgt 1b Event Reg Blk */
-    UINT32                  Pm1aControlBlock;   /* 32-bit Port address of Power Mgt 1a Control Reg Blk */
-    UINT32                  Pm1bControlBlock;   /* 32-bit Port address of Power Mgt 1b Control Reg Blk */
-    UINT32                  Pm2ControlBlock;    /* 32-bit Port address of Power Mgt 2 Control Reg Blk */
-    UINT32                  PmTimerBlock;       /* 32-bit Port address of Power Mgt Timer Ctrl Reg Blk */
-    UINT32                  Gpe0Block;          /* 32-bit Port address of General Purpose Event 0 Reg Blk */
-    UINT32                  Gpe1Block;          /* 32-bit Port address of General Purpose Event 1 Reg Blk */
+    UINT32                  Pm1aEventBlock;     /* 32-bit port address of Power Mgt 1a Event Reg Blk */
+    UINT32                  Pm1bEventBlock;     /* 32-bit port address of Power Mgt 1b Event Reg Blk */
+    UINT32                  Pm1aControlBlock;   /* 32-bit port address of Power Mgt 1a Control Reg Blk */
+    UINT32                  Pm1bControlBlock;   /* 32-bit port address of Power Mgt 1b Control Reg Blk */
+    UINT32                  Pm2ControlBlock;    /* 32-bit port address of Power Mgt 2 Control Reg Blk */
+    UINT32                  PmTimerBlock;       /* 32-bit port address of Power Mgt Timer Ctrl Reg Blk */
+    UINT32                  Gpe0Block;          /* 32-bit port address of General Purpose Event 0 Reg Blk */
+    UINT32                  Gpe1Block;          /* 32-bit port address of General Purpose Event 1 Reg Blk */
     UINT8                   Pm1EventLength;     /* Byte Length of ports at Pm1xEventBlock */
     UINT8                   Pm1ControlLength;   /* Byte Length of ports at Pm1xControlBlock */
     UINT8                   Pm2ControlLength;   /* Byte Length of ports at Pm2ControlBlock */
     UINT8                   PmTimerLength;      /* Byte Length of ports at PmTimerBlock */
     UINT8                   Gpe0BlockLength;    /* Byte Length of ports at Gpe0Block */
     UINT8                   Gpe1BlockLength;    /* Byte Length of ports at Gpe1Block */
     UINT8                   Gpe1Base;           /* Offset in GPE number space where GPE1 events start */
-    UINT8                   CstControl;         /* Support for the _CST object and C States change notification */
+    UINT8                   CstControl;         /* Support for the _CST object and C-States change notification */
     UINT16                  C2Latency;          /* Worst case HW latency to enter/exit C2 state */
     UINT16                  C3Latency;          /* Worst case HW latency to enter/exit C3 state */
-    UINT16                  FlushSize;          /* Processor's memory cache line width, in bytes */
+    UINT16                  FlushSize;          /* Processor memory cache line width, in bytes */
     UINT16                  FlushStride;        /* Number of flush strides that need to be read */
-    UINT8                   DutyOffset;         /* Processor duty cycle index in processor's P_CNT reg */
+    UINT8                   DutyOffset;         /* Processor duty cycle index in processor P_CNT reg */
     UINT8                   DutyWidth;          /* Processor duty cycle value bit width in P_CNT register */
     UINT8                   DayAlarm;           /* Index to day-of-month alarm in RTC CMOS RAM */
     UINT8                   MonthAlarm;         /* Index to month-of-year alarm in RTC CMOS RAM */
     UINT8                   Century;            /* Index to century in RTC CMOS RAM */
     UINT16                  BootFlags;          /* IA-PC Boot Architecture Flags (see below for individual flags) */

@@ -296,31 +305,34 @@
     ACPI_GENERIC_ADDRESS    XPm1bControlBlock;  /* 64-bit Extended Power Mgt 1b Control Reg Blk address */
     ACPI_GENERIC_ADDRESS    XPm2ControlBlock;   /* 64-bit Extended Power Mgt 2 Control Reg Blk address */
     ACPI_GENERIC_ADDRESS    XPmTimerBlock;      /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
     ACPI_GENERIC_ADDRESS    XGpe0Block;         /* 64-bit Extended General Purpose Event 0 Reg Blk address */
     ACPI_GENERIC_ADDRESS    XGpe1Block;         /* 64-bit Extended General Purpose Event 1 Reg Blk address */
+    ACPI_GENERIC_ADDRESS    SleepControl;       /* 64-bit Sleep Control register (ACPI 5.0) */
+    ACPI_GENERIC_ADDRESS    SleepStatus;        /* 64-bit Sleep Status register (ACPI 5.0) */
 
 } ACPI_TABLE_FADT;
 
 
-/* Masks for FADT Boot Architecture Flags (BootFlags) */
+/* Masks for FADT Boot Architecture Flags (BootFlags) [Vx]=Introduced in this FADT revision */
 
 #define ACPI_FADT_LEGACY_DEVICES    (1)         /* 00: [V2] System has LPC or ISA bus devices */
 #define ACPI_FADT_8042              (1<<1)      /* 01: [V3] System has an 8042 controller on port 60/64 */
 #define ACPI_FADT_NO_VGA            (1<<2)      /* 02: [V4] It is not safe to probe for VGA hardware */
 #define ACPI_FADT_NO_MSI            (1<<3)      /* 03: [V4] Message Signaled Interrupts (MSI) must not be enabled */
 #define ACPI_FADT_NO_ASPM           (1<<4)      /* 04: [V4] PCIe ASPM control must not be enabled */
+#define ACPI_FADT_NO_CMOS_RTC       (1<<5)      /* 05: [V5] No CMOS real-time clock present */
 
 /* Masks for FADT flags */
 
-#define ACPI_FADT_WBINVD            (1)         /* 00: [V1] The wbinvd instruction works properly */
-#define ACPI_FADT_WBINVD_FLUSH      (1<<1)      /* 01: [V1] wbinvd flushes but does not invalidate caches */
+#define ACPI_FADT_WBINVD            (1)         /* 00: [V1] The WBINVD instruction works properly */
+#define ACPI_FADT_WBINVD_FLUSH      (1<<1)      /* 01: [V1] WBINVD flushes but does not invalidate caches */
 #define ACPI_FADT_C1_SUPPORTED      (1<<2)      /* 02: [V1] All processors support C1 state */
 #define ACPI_FADT_C2_MP_SUPPORTED   (1<<3)      /* 03: [V1] C2 state works on MP system */
 #define ACPI_FADT_POWER_BUTTON      (1<<4)      /* 04: [V1] Power button is handled as a control method device */
 #define ACPI_FADT_SLEEP_BUTTON      (1<<5)      /* 05: [V1] Sleep button is handled as a control method device */
-#define ACPI_FADT_FIXED_RTC         (1<<6)      /* 06: [V1] RTC wakeup status not in fixed register space */
+#define ACPI_FADT_FIXED_RTC         (1<<6)      /* 06: [V1] RTC wakeup status is not in fixed register space */
 #define ACPI_FADT_S4_RTC_WAKE       (1<<7)      /* 07: [V1] RTC alarm can wake system from S4 */
 #define ACPI_FADT_32BIT_TIMER       (1<<8)      /* 08: [V1] ACPI timer width is 32-bit (0=24-bit) */
 #define ACPI_FADT_DOCKING_SUPPORTED (1<<9)      /* 09: [V1] Docking supported */
 #define ACPI_FADT_RESET_REGISTER    (1<<10)     /* 10: [V2] System reset via the FADT RESET_REG supported */
 #define ACPI_FADT_SEALED_CASE       (1<<11)     /* 11: [V3] No internal expansion capabilities and case is sealed */

@@ -330,26 +342,37 @@
 #define ACPI_FADT_PLATFORM_CLOCK    (1<<15)     /* 15: [V4] OSPM should use platform-provided timer (ACPI 3.0) */
 #define ACPI_FADT_S4_RTC_VALID      (1<<16)     /* 16: [V4] Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
 #define ACPI_FADT_REMOTE_POWER_ON   (1<<17)     /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */
 #define ACPI_FADT_APIC_CLUSTER      (1<<18)     /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */
 #define ACPI_FADT_APIC_PHYSICAL     (1<<19)     /* 19: [V4] All local xAPICs must use physical dest mode (ACPI 3.0) */
+#define ACPI_FADT_HW_REDUCED        (1<<20)     /* 20: [V5] ACPI hardware is not implemented (ACPI 5.0) */
+#define ACPI_FADT_LOW_POWER_S0      (1<<21)     /* 21: [V5] S0 power savings are equal or better than S3 (ACPI 5.0) */
 
 
-/* Values for PreferredProfile (Prefered Power Management Profiles) */
+/* Values for PreferredProfile (Preferred Power Management Profiles) */
 
-enum AcpiPreferedPmProfiles
+enum AcpiPreferredPmProfiles
 {
     PM_UNSPECIFIED          = 0,
     PM_DESKTOP              = 1,
     PM_MOBILE               = 2,
     PM_WORKSTATION          = 3,
     PM_ENTERPRISE_SERVER    = 4,
     PM_SOHO_SERVER          = 5,
-    PM_APPLIANCE_PC         = 6
+    PM_APPLIANCE_PC         = 6,
+    PM_PERFORMANCE_SERVER   = 7,
+    PM_TABLET               = 8
 };
 
+/* Values for SleepStatus and SleepControl registers (V5 FADT) */
 
+#define ACPI_X_WAKE_STATUS          0x80
+#define ACPI_X_SLEEP_TYPE_MASK      0x1C
+#define ACPI_X_SLEEP_TYPE_POSITION  0x02
+#define ACPI_X_SLEEP_ENABLE         0x20
+
+
 /* Reset to default packing */
 
 #pragma pack()
 
 

@@ -368,11 +391,11 @@
 
 typedef struct acpi_table_desc
 {
     ACPI_PHYSICAL_ADDRESS           Address;
     ACPI_TABLE_HEADER               *Pointer;
-    UINT32                          Length;     /* Length fixed at 32 bits */
+    UINT32                          Length;     /* Length fixed at 32 bits (fixed in table header) */
     ACPI_NAME_UNION                 Signature;
     ACPI_OWNER_ID                   OwnerId;
     UINT8                           Flags;
 
 } ACPI_TABLE_DESC;

@@ -390,27 +413,31 @@
 /*
  * Get the remaining ACPI tables
  */
 #include "actbl1.h"
 #include "actbl2.h"
+#include "actbl3.h"
 
 /* Macros used to generate offsets to specific table fields */
 
-#define ACPI_FADT_OFFSET(f)             (UINT8) ACPI_OFFSET (ACPI_TABLE_FADT, f)
+#define ACPI_FADT_OFFSET(f)             (UINT16) ACPI_OFFSET (ACPI_TABLE_FADT, f)
 
 /*
  * Sizes of the various flavors of FADT. We need to look closely
  * at the FADT length because the version number essentially tells
  * us nothing because of many BIOS bugs where the version does not
  * match the expected length. In other words, the length of the
  * FADT is the bottom line as to what the version really is.
  *
  * For reference, the values below are as follows:
- *     FADT V1  size: 0x74
- *     FADT V2  size: 0x84
- *     FADT V3+ size: 0xF4
+ *     FADT V1  size: 0x074
+ *     FADT V2  size: 0x084
+ *     FADT V3  size: 0x0F4
+ *     FADT V4  size: 0x0F4
+ *     FADT V5  size: 0x10C
  */
 #define ACPI_FADT_V1_SIZE       (UINT32) (ACPI_FADT_OFFSET (Flags) + 4)
 #define ACPI_FADT_V2_SIZE       (UINT32) (ACPI_FADT_OFFSET (Reserved4[0]) + 3)
-#define ACPI_FADT_V3_SIZE       (UINT32) (sizeof (ACPI_TABLE_FADT))
+#define ACPI_FADT_V3_SIZE       (UINT32) (ACPI_FADT_OFFSET (SleepControl))
+#define ACPI_FADT_V5_SIZE       (UINT32) (sizeof (ACPI_TABLE_FADT))
 
 #endif /* __ACTBL_H__ */