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6648 illumos build should be explicit about C standards
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--- old/usr/src/lib/libm/sparc/src/libm_inlines.h
+++ new/usr/src/lib/libm/sparc/src/libm_inlines.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 27 /*
28 28 * Copyright 2011, Richard Lowe.
29 29 */
30 30
31 31 /* Functions in this file are duplicated in locallibm.il. Keep them in sync */
32 32
33 33 #ifndef _LIBM_INLINES_H
34 34 #define _LIBM_INLINES_H
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35 35
36 36 #ifdef __GNUC__
37 37
38 38 #include <sys/types.h>
39 39 #include <sys/ieeefp.h>
40 40
41 41 #ifdef __cplusplus
42 42 extern "C" {
43 43 #endif
44 44
45 -extern __inline__ double
45 +extern __GNU_INLINE double
46 46 __inline_sqrt(double d)
47 47 {
48 48 double ret;
49 49
50 50 __asm__ __volatile__("fsqrtd %1,%0\n\t" : "=e" (ret) : "e" (d));
51 51 return (ret);
52 52 }
53 53
54 -extern __inline__ float
54 +extern __GNU_INLINE float
55 55 __inline_sqrtf(float f)
56 56 {
57 57 float ret;
58 58
59 59 __asm__ __volatile__("fsqrts %1,%0\n\t" : "=f" (ret) : "f" (f));
60 60 return (ret);
61 61 }
62 62
63 -extern __inline__ enum fp_class_type
63 +extern __GNU_INLINE enum fp_class_type
64 64 fp_classf(float f)
65 65 {
66 66 enum fp_class_type ret;
67 67 uint32_t tmp;
68 68
69 69 /* XXX: Separate input and output */
70 70 __asm__ __volatile__(
71 71 "sethi %%hi(0x80000000),%1\n\t"
72 72 "andncc %2,%1,%0\n\t"
73 73 "bne 1f\n\t"
74 74 "nop\n\t"
75 75 "mov 0,%0\n\t"
76 76 "ba 2f\n\t" /* x is 0 */
77 77 "nop\n\t"
78 78 "1:\n\t"
79 79 "sethi %%hi(0x7f800000),%1\n\t"
80 80 "andcc %0,%1,%%g0\n\t"
81 81 "bne 1f\n\t"
82 82 "nop\n\t"
83 83 "mov 1,%0\n\t"
84 84 "ba 2f\n\t" /* x is subnormal */
85 85 "nop\n\t"
86 86 "1:\n\t"
87 87 "cmp %0,%1\n\t"
88 88 "bge 1f\n\t"
89 89 "nop\n\t"
90 90 "mov 2,%0\n\t"
91 91 "ba 2f\n\t" /* x is normal */
92 92 "nop\n\t"
93 93 "1:\n\t"
94 94 "bg 1f\n\t"
95 95 "nop\n\t"
96 96 "mov 3,%0\n\t"
97 97 "ba 2f\n\t" /* x is __infinity */
98 98 "nop\n\t"
99 99 "1:\n\t"
100 100 "sethi %%hi(0x00400000),%1\n\t"
101 101 "andcc %0,%1,%%g0\n\t"
102 102 "mov 4,%0\n\t" /* x is quiet NaN */
103 103 "bne 2f\n\t"
104 104 "nop\n\t"
105 105 "mov 5,%0\n\t" /* x is signaling NaN */
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106 106 "2:\n\t"
107 107 : "=r" (ret), "=&r" (tmp)
108 108 : "r" (f)
109 109 : "cc");
110 110 return (ret);
111 111 }
112 112
113 113 #define _HI_WORD(x) ((uint32_t *)&x)[0]
114 114 #define _LO_WORD(x) ((uint32_t *)&x)[1]
115 115
116 -extern __inline__ enum fp_class_type
116 +extern __GNU_INLINE enum fp_class_type
117 117 fp_class(double d)
118 118 {
119 119 enum fp_class_type ret;
120 120 uint32_t tmp;
121 121
122 122 __asm__ __volatile__(
123 123 "sethi %%hi(0x80000000),%1\n\t" /* %1 gets 80000000 */
124 124 "andn %2,%1,%0\n\t" /* %2-%0 gets abs(x) */
125 125 "orcc %0,%3,%%g0\n\t" /* set cc as x is zero/nonzero */
126 126 "bne 1f\n\t" /* branch if x is nonzero */
127 127 "nop\n\t"
128 128 "mov 0,%0\n\t"
129 129 "ba 2f\n\t" /* x is 0 */
130 130 "nop\n\t"
131 131 "1:\n\t"
132 132 "sethi %%hi(0x7ff00000),%1\n\t" /* %1 gets 7ff00000 */
133 133 "andcc %0,%1,%%g0\n\t" /* cc set by __exp field of x */
134 134 "bne 1f\n\t" /* branch if normal or max __exp */
135 135 "nop\n\t"
136 136 "mov 1,%0\n\t"
137 137 "ba 2f\n\t" /* x is subnormal */
138 138 "nop\n\t"
139 139 "1:\n\t"
140 140 "cmp %0,%1\n\t"
141 141 "bge 1f\n\t" /* branch if x is max __exp */
142 142 "nop\n\t"
143 143 "mov 2,%0\n\t"
144 144 "ba 2f\n\t" /* x is normal */
145 145 "nop\n\t"
146 146 "1:\n\t"
147 147 "andn %0,%1,%0\n\t" /* o0 gets msw __significand field */
148 148 "orcc %0,%3,%%g0\n\t" /* set cc by OR __significand */
149 149 "bne 1f\n\t" /* Branch if __nan */
150 150 "nop\n\t"
151 151 "mov 3,%0\n\t"
152 152 "ba 2f\n\t" /* x is __infinity */
153 153 "nop\n\t"
154 154 "1:\n\t"
155 155 "sethi %%hi(0x00080000),%1\n\t"
156 156 "andcc %0,%1,%%g0\n\t" /* set cc by quiet/sig bit */
157 157 "be 1f\n\t" /* Branch if signaling */
158 158 "nop\n\t"
159 159 "mov 4,%0\n\t" /* x is quiet NaN */
160 160 "ba 2f\n\t"
161 161 "nop\n\t"
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162 162 "1:\n\t"
163 163 "mov 5,%0\n\t" /* x is signaling NaN */
164 164 "2:\n\t"
165 165 : "=&r" (ret), "=&r" (tmp)
166 166 : "r" (_HI_WORD(d)), "r" (_LO_WORD(d))
167 167 : "cc");
168 168
169 169 return (ret);
170 170 }
171 171
172 -extern __inline__ int
172 +extern __GNU_INLINE int
173 173 __swapEX(int i)
174 174 {
175 175 int ret;
176 176 uint32_t fsr;
177 177 uint32_t tmp1, tmp2;
178 178
179 179 __asm__ __volatile__(
180 180 "and %4,0x1f,%2\n\t" /* tmp1 = %2 = %o1 */
181 181 "sll %2,5,%2\n\t" /* shift input to aexc bit location */
182 182 ".volatile\n\t"
183 183 "st %%fsr,%1\n\t"
184 184 "ld %1,%0\n\t" /* %0 = fsr */
185 185 "andn %0,0x3e0,%3\n\t" /* tmp2 = %3 = %o2 */
186 186 "or %2,%3,%2\n\t" /* %2 = new fsr */
187 187 "st %2,%1\n\t"
188 188 "ld %1,%%fsr\n\t"
189 189 "srl %0,5,%0\n\t"
190 190 "and %0,0x1f,%0\n\t" /* %0 = ret = %o0 */
191 191 ".nonvolatile\n\t"
192 192 : "=r" (ret), "=m" (fsr), "=r" (tmp1), "=r" (tmp2)
193 193 : "r" (i)
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194 194 : "cc");
195 195
196 196 return (ret);
197 197 }
198 198
199 199 /*
200 200 * On the SPARC, __swapRP is a no-op; always return 0 for backward
201 201 * compatibility
202 202 */
203 203 /* ARGSUSED */
204 -extern __inline__ enum fp_precision_type
204 +extern __GNU_INLINE enum fp_precision_type
205 205 __swapRP(enum fp_precision_type i)
206 206 {
207 207 return (0);
208 208 }
209 209
210 -extern __inline__ enum fp_direction_type
210 +extern __GNU_INLINE enum fp_direction_type
211 211 __swapRD(enum fp_direction_type d)
212 212 {
213 213 enum fp_direction_type ret;
214 214 uint32_t fsr;
215 215 uint32_t tmp1, tmp2, tmp3;
216 216
217 217 __asm__ __volatile__(
218 218 "and %5,0x3,%0\n\t"
219 219 "sll %0,30,%2\n\t" /* shift input to RD bit location */
220 220 ".volatile\n\t"
221 221 "st %%fsr,%1\n\t"
222 222 "ld %1,%0\n\t" /* %0 = fsr */
223 223 "set 0xc0000000,%4\n\t" /* mask of rounding direction bits */
224 224 "andn %0,%4,%3\n\t"
225 225 "or %2,%3,%2\n\t" /* %2 = new fsr */
226 226 "st %2,%1\n\t"
227 227 "ld %1,%%fsr\n\t"
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228 228 "srl %0,30,%0\n\t"
229 229 "and %0,0x3,%0\n\t"
230 230 ".nonvolatile\n\t"
231 231 : "=r" (ret), "=m" (fsr), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
232 232 : "r" (d)
233 233 : "cc");
234 234
235 235 return (ret);
236 236 }
237 237
238 -extern __inline__ int
238 +extern __GNU_INLINE int
239 239 __swapTE(int i)
240 240 {
241 241 int ret;
242 242 uint32_t fsr, tmp1, tmp2;
243 243
244 244 __asm__ __volatile__(
245 245 "and %4,0x1f,%0\n\t"
246 246 "sll %0,23,%2\n\t" /* shift input to TEM bit location */
247 247 ".volatile\n\t"
248 248 "st %%fsr,%1\n\t"
249 249 "ld %1,%0\n\t" /* %0 = fsr */
250 250 "set 0x0f800000,%3\n\t" /* mask of TEM (Trap Enable Mode bits) */
251 251 "andn %0,%3,%3\n\t"
252 252 "or %2,%3,%2\n\t" /* %2 = new fsr */
253 253 "st %2,%1\n\t"
254 254 "ld %1,%%fsr\n\t"
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255 255 "srl %0,23,%0\n\t"
256 256 "and %0,0x1f,%0\n\t"
257 257 ".nonvolatile\n\t"
258 258 : "=r" (ret), "=m" (fsr), "=r" (tmp1), "=r" (tmp2)
259 259 : "r" (i)
260 260 : "cc");
261 261
262 262 return (ret);
263 263 }
264 264
265 -extern __inline__ double
265 +extern __GNU_INLINE double
266 266 sqrt(double d)
267 267 {
268 268 return (__inline_sqrt(d));
269 269 }
270 270
271 -extern __inline__ float
271 +extern __GNU_INLINE float
272 272 sqrtf(float f)
273 273 {
274 274 return (__inline_sqrtf(f));
275 275 }
276 276
277 -extern __inline__ double
277 +extern __GNU_INLINE double
278 278 fabs(double d)
279 279 {
280 280 double ret;
281 281
282 282 __asm__ __volatile__("fabsd %1,%0\n\t" : "=e" (ret) : "e" (d));
283 283 return (ret);
284 284 }
285 285
286 -extern __inline__ float
286 +extern __GNU_INLINE float
287 287 fabsf(float f)
288 288 {
289 289 float ret;
290 290
291 291 __asm__ __volatile__("fabss %1,%0\n\t" : "=f" (ret) : "f" (f));
292 292 return (ret);
293 293 }
294 294
295 295 #ifdef __cplusplus
296 296 }
297 297 #endif
298 298
299 299 #endif /* __GNUC */
300 300
301 301 #endif /* _LIBM_INLINES_H */
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