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8956 Implement KPTI
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
9210 remove KMDB branch debugging support
9211 ::crregs could do with cr2/cr3 support
9209 ::ttrace should be able to filter by thread
Reviewed by: Patrick Mooney <patrick.mooney@joyent.com>
Reviewed by: Yuri Pankov <yuripv@yuripv.net>

@@ -18,11 +18,11 @@
  *
  * CDDL HEADER END
  */
 /*
  * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2015, Joyent, Inc.
+ * Copyright 2018, Joyent, Inc.
  */
 
 #ifndef _SYS_CONTROLREGS_H
 #define _SYS_CONTROLREGS_H
 

@@ -86,13 +86,19 @@
 
 /* CR3 Register */
 
 #define CR3_PCD 0x00000010              /* cache disable                */
 #define CR3_PWT 0x00000008              /* write through                */
+#if defined(_ASM)
+#define CR3_NOINVL_BIT  0x8000000000000000
+#else
+#define CR3_NOINVL_BIT  0x8000000000000000ULL /* no invalidation        */
+#endif
+#define PCID_NONE       0x000           /* generic PCID                 */
+#define PCID_KERNEL     0x000           /* kernel's PCID                */
+#define PCID_USER       0x001           /* user-space PCID              */
 
-#define FMT_CR3 "\20\5pcd\4pwt"
-
 /* CR4 Register */
 
 #define CR4_VME         0x0001          /* virtual-8086 mode extensions */
 #define CR4_PVI         0x0002          /* protected-mode virtual interrupts */
 #define CR4_TSD         0x0004          /* time stamp disable           */

@@ -106,16 +112,17 @@
 #define CR4_OSXMMEXCPT  0x0400          /* OS unmasked exception support */
                                         /* 0x0800 reserved */
                                         /* 0x1000 reserved */
 #define CR4_VMXE        0x2000
 #define CR4_SMXE        0x4000
+#define CR4_PCIDE       0x20000         /* PCID enable */
 #define CR4_OSXSAVE     0x40000         /* OS xsave/xrestore support    */
 #define CR4_SMEP        0x100000        /* NX for user pages in kernel */
 #define CR4_SMAP        0x200000        /* kernel can't access user pages */
 
 #define FMT_CR4                                         \
-        "\20\26smap\25smep\23osxsav"                    \
+        "\20\26smap\25smep\23osxsav\22pcide"            \
         "\17smxe\16vmxe\13xmme\12fxsr\11pce\10pge"      \
         "\7mce\6pae\5pse\4de\3tsd\2pvi\1vme"
 
 /*
  * Enable the SSE-related control bits to explain to the processor that