Print this page
10886 smatch debug macro cleanup in usr/src/uts
| Split |
Close |
| Expand all |
| Collapse all |
--- old/usr/src/uts/common/io/rtw/rtwvar.h
+++ new/usr/src/uts/common/io/rtw/rtwvar.h
1 1 /*
2 2 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
3 3 * Use is subject to license terms.
4 + *
5 + * Copyright 2019 Joyent, Inc.
4 6 */
5 7 /*
6 8 * Copyright (c) 2004, 2005 David Young. All rights reserved.
7 9 *
8 10 * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young.
9 11 *
10 12 * Redistribution and use in source and binary forms, with or without
11 13 * modification, are permitted provided that the following conditions
12 14 * are met:
13 15 * 1. Redistributions of source code must retain the above copyright
14 16 * notice, this list of conditions and the following disclaimer.
15 17 * 2. Redistributions in binary form must reproduce the above copyright
16 18 * notice, this list of conditions and the following disclaimer in the
17 19 * documentation and/or other materials provided with the distribution.
18 20 * 3. The name of David Young may not be used to endorse or promote
19 21 * products derived from this software without specific prior
20 22 * written permission.
21 23 *
22 24 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
23 25 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
24 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
25 27 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
26 28 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
27 29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
28 30 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 32 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
33 35 * OF SUCH DAMAGE.
34 36 */
35 37 #ifndef _RTWVAR_H_
36 38 #define _RTWVAR_H_
37 39
38 40 #ifdef __cplusplus
39 41 extern "C" {
40 42 #endif
41 43
42 44 #include <sys/list.h>
43 45 #include <sys/net80211.h>
44 46
45 47 #ifndef __func__
46 48 #define __func__ ""
47 49 #endif
48 50
49 51 extern void rtw_dbg(uint32_t dbg_flags, const int8_t *fmt, ...);
50 52
51 53 #define RTW_DEBUG_TUNE 0x000001
52 54 #define RTW_DEBUG_PKTFILT 0x000002
53 55 #define RTW_DEBUG_XMIT 0x000004
54 56 #define RTW_DEBUG_DMA 0x000008
55 57 #define RTW_DEBUG_NODE 0x000010
56 58 #define RTW_DEBUG_PWR 0x000020
57 59 #define RTW_DEBUG_ATTACH 0x000040
58 60 #define RTW_DEBUG_REGDUMP 0x000080
59 61 #define RTW_DEBUG_ACCESS 0x000100
60 62 #define RTW_DEBUG_RESET 0x000200
61 63 #define RTW_DEBUG_INIT 0x000400
62 64 #define RTW_DEBUG_PKTDUMP 0x000800
63 65 #define RTW_DEBUG_RECV 0x001000
64 66 #define RTW_DEBUG_RECV_DESC 0x002000
65 67 #define RTW_DEBUG_IOSTATE 0x004000
66 68 #define RTW_DEBUG_INTR 0x008000
67 69 #define RTW_DEBUG_PHY 0x010000
68 70 #define RTW_DEBUG_PHYIO 0x020000
69 71 #define RTW_DEBUG_PHYBITIO 0x040000
70 72 #define RTW_DEBUG_TIMEOUT 0x080000
|
↓ open down ↓ |
57 lines elided |
↑ open up ↑ |
71 73 #define RTW_DEBUG_BUGS 0x100000
72 74 #define RTW_DEBUG_BEACON 0x200000
73 75 #define RTW_DEBUG_WIFICFG 0x400000
74 76 #define RTW_DEBUG_80211 0x800000
75 77 #define RTW_DEBUG_MAX 0xffffff
76 78
77 79 #ifdef DEBUG
78 80 #define RTW_DPRINTF \
79 81 rtw_dbg
80 82 #else /* DEBUG */
81 -#define RTW_DPRINTF
83 +#define RTW_DPRINTF(...) (void)(0)
82 84 #endif /* DEBUG */
83 85
84 86 enum rtw_locale {
85 87 RTW_LOCALE_USA = 0,
86 88 RTW_LOCALE_EUROPE,
87 89 RTW_LOCALE_JAPAN,
88 90 RTW_LOCALE_UNKNOWN
89 91 };
90 92
91 93 enum rtw_rfchipid {
92 94 RTW_RFCHIPID_RESERVED = 0,
93 95 RTW_RFCHIPID_INTERSIL = 1,
94 96 RTW_RFCHIPID_RFMD = 2,
95 97 RTW_RFCHIPID_PHILIPS = 3,
96 98 RTW_RFCHIPID_MAXIM = 4,
97 99 RTW_RFCHIPID_GCT = 5
98 100 };
99 101
100 102 /*
101 103 * sc_flags
102 104 */
103 105 #define RTW_F_ENABLED 0x00000001 /* chip is enabled */
104 106 #define RTW_F_DIGPHY 0x00000002 /* digital PHY */
105 107 #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */
106 108 #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */
107 109 #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */
108 110 #define RTW_F_SLEEP 0x00000040 /* chip is asleep */
109 111 #define RTW_F_INVALID 0x00000080 /* chip is absent */
110 112 #define RTW_F_SUSPEND 0x00000100 /* driver is suspended */
111 113 #define RTW_F_PLUMBED 0x00000200 /* driver is plumbed */
112 114 #define RTW_F_ATTACHED 0x01000000 /* driver is attached */
113 115 /*
114 116 * all PHY flags
115 117 */
116 118 #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV)
117 119
118 120 enum rtw_access {RTW_ACCESS_NONE = 0,
119 121 RTW_ACCESS_CONFIG = 1,
120 122 RTW_ACCESS_ANAPARM = 2};
121 123
122 124 struct rtw_regs {
123 125 ddi_acc_handle_t r_handle;
124 126 caddr_t r_base;
125 127 enum rtw_access r_access;
126 128 };
127 129
128 130 #define RTW_SR_GET(sr, ofs) \
129 131 (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff)
130 132
131 133 #define RTW_SR_GET16(sr, ofs) \
132 134 (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8))
133 135
134 136 struct rtw_srom {
135 137 uint16_t *sr_content;
136 138 uint16_t sr_size;
137 139 };
138 140
139 141
140 142 #define RTW_NTXPRI 4 /* number of Tx priorities */
141 143 #define RTW_TXPRILO 0
142 144 #define RTW_TXPRIMD 1
143 145 #define RTW_TXPRIHI 2
144 146 #define RTW_TXPRIBCN 3 /* beacon priority */
145 147
146 148 #define RTW_MAXPKTSEGS 64 /* Max 64 segments per Tx packet */
147 149
148 150 /*
149 151 * Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT
150 152 * boundaries. I allocate them consecutively from one buffer, so
151 153 * just round up.
152 154 */
153 155 #define RTW_TXQLENLO 64 /* low-priority queue length */
154 156 #define RTW_TXQLENMD 64 /* medium-priority */
155 157 #define RTW_TXQLENHI 64 /* high-priority */
156 158 #define RTW_TXQLENBCN 2 /* beacon */
157 159
158 160 #define RTW_NTXDESCLO RTW_TXQLENLO
159 161 #define RTW_NTXDESCMD RTW_TXQLENMD
160 162 #define RTW_NTXDESCHI RTW_TXQLENHI
161 163 #define RTW_NTXDESCBCN RTW_TXQLENBCN
162 164
163 165 #define RTW_NTXDESCTOTAL (RTW_NTXDESCLO + RTW_NTXDESCMD + \
164 166 RTW_NTXDESCHI + RTW_NTXDESCBCN)
165 167
166 168 #define RTW_RXQLEN 64
167 169 #define RTW_DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl,\
168 170 (area).offset, (area).alength, (flag)))
169 171
170 172 #define RTW_DMA_SYNC_DESC(area, offset, len, flag) \
171 173 ((void) ddi_dma_sync((area).dma_hdl, offset, len, (flag)))
172 174
173 175 #define RTW_MINC(x, y) (x) = ((x + 1) % y)
174 176 #define list_empty(a) ((a)->list_head.list_next == &(a)->list_head)
175 177
176 178 typedef struct dma_area {
177 179 ddi_acc_handle_t acc_hdl; /* handle for memory */
178 180 caddr_t mem_va; /* CPU VA of memory */
179 181 uint32_t nslots; /* number of slots */
180 182 uint32_t size; /* size per slot */
181 183 size_t alength; /* allocated size */
182 184 /* >= product of above */
183 185
184 186 ddi_dma_handle_t dma_hdl; /* DMA handle */
185 187 offset_t offset; /* relative to handle */
186 188 ddi_dma_cookie_t cookie; /* associated cookie */
187 189 uint32_t ncookies; /* must be 1 */
188 190 uint32_t token; /* arbitrary identifier */
189 191 } dma_area_t; /* 0x50 (80) bytes */
190 192
191 193 struct rtw_txbuf {
192 194 struct rtw_txdesc *txdesc; /* virtual addr of desc */
193 195 uint32_t bf_daddr; /* physical addr of desc */
194 196 uint32_t next_bf_daddr; /* physical addr of next desc */
195 197 dma_area_t bf_dma; /* dma area for buf */
196 198 struct ieee80211_node *bf_in; /* pointer to the node */
197 199 list_node_t bf_node;
198 200 uint32_t order;
199 201 };
200 202
201 203 struct rtw_rxbuf {
202 204 struct rtw_rxdesc *rxdesc; /* virtual addr of desc */
203 205 uint32_t bf_daddr; /* physical addr of desc */
204 206 dma_area_t bf_dma; /* dma area for buf */
205 207 };
206 208
207 209 struct rtw_txq {
208 210 struct rtw_txdesc *txdesc_h;
209 211 struct rtw_txbuf *txbuf_h;
210 212 uint32_t tx_prod;
211 213 uint32_t tx_cons;
212 214 uint32_t tx_nfree;
213 215 kmutex_t txbuf_lock;
214 216 list_t tx_free_list;
215 217 list_t tx_dirty_list;
216 218 };
217 219
218 220 struct rtw_descs {
219 221 struct rtw_txdesc hd_txlo[RTW_NTXDESCLO];
220 222 struct rtw_txdesc hd_txmd[RTW_NTXDESCMD];
221 223 struct rtw_txdesc hd_txhi[RTW_NTXDESCHI];
222 224 struct rtw_rxdesc hd_rx[RTW_RXQLEN];
223 225 struct rtw_txdesc hd_bcn[RTW_NTXDESCBCN];
224 226 };
225 227 #define RTW_DESC_OFFSET(ring, i) offsetof(struct rtw_descs, ring[i])
226 228 #define RTW_RING_OFFSET(ring) RTW_DESC_OFFSET(ring, 0)
227 229 #define RTW_RING_BASE(baseaddr0, ring) \
228 230 (baseaddr0 + RTW_RING_OFFSET(ring))
229 231
230 232 /*
231 233 * One Time Unit (TU) is 1Kus = 1024 microseconds.
232 234 */
233 235 #define IEEE80211_DUR_TU 1024
234 236
235 237 /*
236 238 * IEEE 802.11b durations for DSSS PHY in microseconds
237 239 */
238 240 #define IEEE80211_DUR_DS_LONG_PREAMBLE 144
239 241 #define IEEE80211_DUR_DS_SHORT_PREAMBLE 72
240 242
241 243 #define IEEE80211_DUR_DS_SLOW_PLCPHDR 48
242 244 #define IEEE80211_DUR_DS_FAST_PLCPHDR 24
243 245 #define IEEE80211_DUR_DS_SLOW_ACK 112
244 246 #define IEEE80211_DUR_DS_FAST_ACK 56
245 247 #define IEEE80211_DUR_DS_SLOW_CTS 112
246 248 #define IEEE80211_DUR_DS_FAST_CTS 56
247 249
248 250 #define IEEE80211_DUR_DS_SLOT 20
249 251 #define IEEE80211_DUR_DS_SIFS 10
250 252 #define IEEE80211_DUR_DS_PIFS (IEEE80211_DUR_DS_SIFS + IEEE80211_DUR_DS_SLOT)
251 253 #define IEEE80211_DUR_DS_DIFS (IEEE80211_DUR_DS_SIFS + \
252 254 2 * IEEE80211_DUR_DS_SLOT)
253 255 #define IEEE80211_DUR_DS_EIFS (IEEE80211_DUR_DS_SIFS + \
254 256 IEEE80211_DUR_DS_SLOW_ACK + \
255 257 IEEE80211_DUR_DS_LONG_PREAMBLE + \
256 258 IEEE80211_DUR_DS_SLOW_PLCPHDR + \
257 259 IEEE80211_DUR_DIFS)
258 260
259 261 /*
260 262 * 802.11 frame duration definitions.
261 263 */
262 264 struct rtw_ieee80211_duration {
263 265 uint16_t d_rts_dur;
264 266 uint16_t d_data_dur;
265 267 uint16_t d_plcp_len;
266 268 uint8_t d_residue; /* unused octets in time slot */
267 269 uint8_t resv;
268 270 };
269 271
270 272
271 273 #ifdef RTW_RADIOTAP
272 274 /*
273 275 * Radio capture format for RTL8180.
274 276 */
275 277
276 278 #define RTW_RX_RADIOTAP_PRESENT \
277 279 ((1 << IEEE80211_RADIOTAP_TSFT) | \
278 280 (1 << IEEE80211_RADIOTAP_FLAGS) | \
279 281 (1 << IEEE80211_RADIOTAP_RATE) | \
280 282 (1 << IEEE80211_RADIOTAP_CHANNEL) | \
281 283 (1 << IEEE80211_RADIOTAP_LOCK_QUALITY) | \
282 284 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \
283 285 0)
284 286
285 287 struct rtw_rx_radiotap_header {
286 288 struct ieee80211_radiotap_header rr_ihdr;
287 289 uint64_t rr_tsft;
288 290 uint8_t rr_flags;
289 291 uint8_t rr_rate;
290 292 uint16_t rr_chan_freq;
291 293 uint16_t rr_chan_flags;
292 294 uint16_t rr_barker_lock;
293 295 uint8_t rr_antsignal;
294 296 } __attribute__((__packed__));
295 297
296 298 #define RTW_TX_RADIOTAP_PRESENT \
297 299 ((1 << IEEE80211_RADIOTAP_FLAGS) | \
298 300 (1 << IEEE80211_RADIOTAP_RATE) | \
299 301 (1 << IEEE80211_RADIOTAP_CHANNEL) | \
300 302 0)
301 303
302 304 struct rtw_tx_radiotap_header {
303 305 struct ieee80211_radiotap_header rt_ihdr;
304 306 uint8_t rt_flags;
305 307 uint8_t rt_rate;
306 308 uint16_t rt_chan_freq;
307 309 uint16_t rt_chan_flags;
308 310 } __attribute__((__packed__));
309 311 #endif
310 312
311 313 enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE,
312 314 FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE,
313 315 FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM,
314 316 FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP,
315 317 FINISH_TXCTLBLK_SETUP, DETACHED};
316 318
317 319 struct rtw_hooks {
318 320 void *rh_shutdown; /* shutdown hook */
319 321 void *rh_power; /* power management hook */
320 322 };
321 323
322 324 enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON };
323 325
324 326 typedef void (*rtw_continuous_tx_cb_t)(void *arg, int);
325 327
326 328 struct rtw_phy {
327 329 struct rtw_rf *p_rf;
328 330 struct rtw_regs *p_regs;
329 331 };
330 332
331 333 struct rtw_bbpset {
332 334 uint_t bb_antatten;
333 335 uint_t bb_chestlim;
334 336 uint_t bb_chsqlim;
335 337 uint_t bb_ifagcdet;
336 338 uint_t bb_ifagcini;
337 339 uint_t bb_ifagclimit;
338 340 uint_t bb_lnadet;
339 341 uint_t bb_sys1;
340 342 uint_t bb_sys2;
341 343 uint_t bb_sys3;
342 344 uint_t bb_trl;
343 345 uint_t bb_txagc;
344 346 };
345 347
346 348 struct rtw_rf {
347 349 void (*rf_destroy)(struct rtw_rf *);
348 350 /*
349 351 * args: frequency, txpower, power state
350 352 */
351 353 int (*rf_init)(struct rtw_rf *, uint_t, uint8_t, enum rtw_pwrstate);
352 354 /*
353 355 * arg: power state
354 356 */
355 357 int (*rf_pwrstate)(struct rtw_rf *, enum rtw_pwrstate);
356 358 /*
357 359 * arg: frequency
358 360 */
359 361 int (*rf_tune)(struct rtw_rf *, uint_t);
360 362 /*
361 363 * arg: txpower
362 364 */
363 365 int (*rf_txpower)(struct rtw_rf *, uint8_t);
364 366 rtw_continuous_tx_cb_t rf_continuous_tx_cb;
365 367 void *rf_continuous_tx_arg;
366 368 struct rtw_bbpset rf_bbpset;
367 369 };
368 370
369 371 typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, uint_t,
370 372 uint32_t);
371 373
372 374 struct rtw_rfbus {
373 375 struct rtw_regs *b_regs;
374 376 rtw_rf_write_t b_write;
375 377 };
376 378
377 379 struct rtw_max2820 {
378 380 struct rtw_rf mx_rf;
379 381 struct rtw_rfbus mx_bus;
380 382 int mx_is_a; /* 1: MAX2820A/MAX2821A */
381 383 };
382 384
383 385 struct rtw_sa2400 {
384 386 struct rtw_rf sa_rf;
385 387 struct rtw_rfbus sa_bus;
386 388 int sa_digphy; /* 1: digital PHY */
387 389 };
388 390
389 391 typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int);
390 392
391 393 union rtw_keys {
392 394 uint8_t rk_keys[4][16];
393 395 uint32_t rk_words[16];
394 396 };
395 397
396 398 #define RTW_LED_SLOW_TICKS MAX(1, hz/2)
397 399 #define RTW_LED_FAST_TICKS MAX(1, hz/10)
398 400
399 401 struct rtw_led_state {
400 402 #define RTW_LED0 0x1
401 403 #define RTW_LED1 0x2
402 404 uint8_t ls_slowblink:2;
403 405 uint8_t ls_actblink:2;
404 406 uint8_t ls_default:2;
405 407 uint8_t ls_state;
406 408 uint8_t ls_event;
407 409 #define RTW_LED_S_RX 0x1
408 410 #define RTW_LED_S_TX 0x2
409 411 #define RTW_LED_S_SLOW 0x4
410 412 };
411 413
412 414 typedef struct rtw_softc {
413 415 ieee80211com_t sc_ic; /* IEEE 802.11 common */
414 416 dev_info_t *sc_dev; /* back pointer to dev_info_t */
415 417 kmutex_t sc_genlock;
416 418 struct rtw_regs sc_regs;
417 419 ddi_acc_handle_t sc_cfg_handle;
418 420 caddr_t sc_cfg_base;
419 421 enum ieee80211_phymode sc_curmode;
420 422 uint32_t sc_flags;
421 423 uint32_t sc_invalid;
422 424 ddi_iblock_cookie_t sc_iblock;
423 425 uint32_t sc_need_reschedule;
424 426 uint16_t sc_cachelsz; /* cache line size */
425 427 uchar_t sc_macaddr[6];
426 428
427 429 enum rtw_rfchipid sc_rfchipid;
428 430 enum rtw_locale sc_locale;
429 431 uint8_t sc_phydelay;
430 432
431 433 uint32_t sc_dmabuf_size;
432 434 dma_area_t sc_desc_dma;
433 435
434 436 struct rtw_txq sc_txq[RTW_NTXPRI];
435 437
436 438 struct rtw_rxdesc *rxdesc_h;
437 439 struct rtw_rxbuf *rxbuf_h;
438 440 uint32_t rx_next;
439 441 kmutex_t rxbuf_lock;
440 442 kmutex_t sc_txlock;
441 443
442 444 struct rtw_srom sc_srom;
443 445 enum rtw_pwrstate sc_pwrstate;
444 446 rtw_pwrstate_t sc_pwrstate_cb;
445 447 struct rtw_rf *sc_rf;
446 448
447 449 uint16_t sc_inten;
448 450
449 451 void (*sc_intr_ack)(struct rtw_regs *);
450 452
451 453 int (*sc_enable)(struct rtw_softc *);
452 454 void (*sc_disable)(struct rtw_softc *);
453 455 void (*sc_power)(struct rtw_softc *, int);
454 456 struct rtw_hooks sc_hooks;
455 457
456 458 uint_t sc_cur_chan;
457 459
458 460 uint32_t sc_tsfth; /* most significant TSFT bits */
459 461 uint32_t sc_rcr; /* RTW_RCR */
460 462 uint8_t sc_csthr; /* carrier-sense threshold */
461 463
462 464 uint8_t sc_rev; /* PCI/Cardbus revision */
463 465
464 466 uint32_t sc_anaparm; /* register RTW_ANAPARM */
465 467 #ifdef RTW_RADIOTAP
466 468 union {
467 469 struct rtw_rx_radiotap_header tap;
468 470 uint8_t pad[64];
469 471 } sc_rxtapu;
470 472 union {
471 473 struct rtw_tx_radiotap_header tap;
472 474 uint8_t pad[64];
473 475 } sc_txtapu;
474 476 #endif
475 477 union rtw_keys sc_keys;
476 478 int sc_txkey;
477 479 struct rtw_led_state sc_led_state;
478 480 int sc_hwverid;
479 481
480 482 int (*sc_newstate)(ieee80211com_t *,
481 483 enum ieee80211_state, int);
482 484
483 485 timeout_id_t sc_scan_id;
484 486 timeout_id_t sc_ratectl_id;
485 487 uint32_t sc_tx_ok;
486 488 uint32_t sc_tx_err;
487 489 uint32_t sc_tx_retr;
488 490 uint32_t sc_xmtretry;
489 491 uint32_t sc_noxmtbuf;
490 492 uint32_t sc_norcvbuf;
491 493 uint32_t sc_bytexmt64;
492 494 uint32_t sc_bytercv64;
493 495 uint32_t sc_pktxmt64;
494 496 uint32_t sc_pktrcv64;
495 497 uint32_t sc_intr;
496 498 uint32_t sc_ioerror;
497 499 uint32_t hw_start;
498 500 uint32_t hw_go;
499 501 } rtw_softc_t;
500 502
501 503 #define RTW_SC(ic) ((rtw_softc_t *)ic)
502 504 #ifdef __cplusplus
503 505 }
504 506 #endif
505 507
506 508 #endif /* _RTWVAR_H_ */
|
↓ open down ↓ |
415 lines elided |
↑ open up ↑ |
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX