1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 /*
28 * Copyright (c) 2000 to 2010, LSI Corporation.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms of all code within
32 * this file that is exclusively owned by LSI, with or without
33 * modification, is permitted provided that, in addition to the CDDL 1.0
34 * License requirements, the following conditions are met:
35 *
36 * Neither the name of the author nor the names of its contributors may be
37 * used to endorse or promote products derived from this software without
38 * specific prior written permission.
39 *
40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
43 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
44 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
46 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
47 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
48 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
50 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
51 * DAMAGE.
52 */
53
54 #ifndef _MPTSAS_IOCTL_H
55 #define _MPTSAS_IOCTL_H
56
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60
61 #include <sys/types.h>
62
63 #define MPTIOCTL ('I' << 8)
64 #define MPTIOCTL_GET_ADAPTER_DATA (MPTIOCTL | 1)
65 #define MPTIOCTL_UPDATE_FLASH (MPTIOCTL | 2)
66 #define MPTIOCTL_RESET_ADAPTER (MPTIOCTL | 3)
67 #define MPTIOCTL_PASS_THRU (MPTIOCTL | 4)
68 #define MPTIOCTL_EVENT_QUERY (MPTIOCTL | 5)
69 #define MPTIOCTL_EVENT_ENABLE (MPTIOCTL | 6)
70 #define MPTIOCTL_EVENT_REPORT (MPTIOCTL | 7)
71 #define MPTIOCTL_GET_PCI_INFO (MPTIOCTL | 8)
72 #define MPTIOCTL_DIAG_ACTION (MPTIOCTL | 9)
73 #define MPTIOCTL_REG_ACCESS (MPTIOCTL | 10)
74
75 /*
76 * The following are our ioctl() return status values. If everything went
77 * well, we return good status. If the buffer length sent to us is too short
78 * we return a status to tell the user.
79 */
80 #define MPTIOCTL_STATUS_GOOD 0
81 #define MPTIOCTL_STATUS_LEN_TOO_SHORT 1
82
83 typedef struct mptsas_pci_bits
84 {
85 union {
86 struct {
87 uint32_t DeviceNumber :5;
88 uint32_t FunctionNumber :3;
89 uint32_t BusNumber :24;
90 } bits;
91 uint32_t AsDWORD;
92 } u;
93 uint32_t PciSegmentId;
94 } mptsas_pci_bits_t;
95 /*
96 * The following is the MPTIOCTL_GET_ADAPTER_DATA data structure. This data
97 * structure is setup so that we hopefully are properly aligned for both
98 * 32-bit and 64-bit mode applications.
99 *
100 * Adapter Type - Value = 4 = SCSI Protocol through SAS-2 adapter
101 *
102 * MPI Port Number - The PCI Function number for this device
103 *
104 * PCI Device HW Id - The PCI device number for this device
105 *
106 */
107 #define MPTIOCTL_ADAPTER_TYPE_SAS2 4
108 typedef struct mptsas_adapter_data
109 {
110 uint32_t StructureLength;
111 uint32_t AdapterType;
112 uint32_t MpiPortNumber;
113 uint32_t PCIDeviceHwId;
114 uint32_t PCIDeviceHwRev;
115 uint32_t SubSystemId;
116 uint32_t SubsystemVendorId;
117 uint32_t Reserved1;
118 uint32_t MpiFirmwareVersion;
119 uint32_t BiosVersion;
120 uint8_t DriverVersion[32];
121 uint8_t Reserved2;
122 uint8_t ScsiId;
123 uint16_t Reserved3;
124 mptsas_pci_bits_t PciInformation;
125 } mptsas_adapter_data_t;
126
127
128 typedef struct mptsas_update_flash
129 {
130 uint64_t PtrBuffer;
131 uint32_t ImageChecksum;
132 uint32_t ImageOffset;
133 uint32_t ImageSize;
134 uint32_t ImageType;
135 } mptsas_update_flash_t;
136
137
138 #define MPTSAS_PASS_THRU_DIRECTION_NONE 0
139 #define MPTSAS_PASS_THRU_DIRECTION_READ 1
140 #define MPTSAS_PASS_THRU_DIRECTION_WRITE 2
141 #define MPTSAS_PASS_THRU_DIRECTION_BOTH 3
142
143 typedef struct mptsas_pass_thru
144 {
145 uint64_t PtrRequest;
146 uint64_t PtrReply;
147 uint64_t PtrData;
148 uint32_t RequestSize;
149 uint32_t ReplySize;
150 uint32_t DataSize;
151 uint32_t DataDirection;
152 uint64_t PtrDataOut;
153 uint32_t DataOutSize;
154 uint32_t Timeout;
155 } mptsas_pass_thru_t;
156
157
158 /*
159 * Event queue defines
160 */
161 #define MPTSAS_EVENT_QUEUE_SIZE (50) /* Max Events stored in driver */
162 #define MPTSAS_MAX_EVENT_DATA_LENGTH (48) /* Size of each event in Dwords */
163
164 typedef struct mptsas_event_query
165 {
166 uint16_t Entries;
167 uint16_t Reserved;
168 uint32_t Types[4];
169 } mptsas_event_query_t;
170
171 typedef struct mptsas_event_enable
172 {
173 uint32_t Types[4];
174 } mptsas_event_enable_t;
175
176 /*
177 * Event record entry for ioctl.
178 */
179 typedef struct mptsas_event_entry
180 {
181 uint32_t Type;
182 uint32_t Number;
183 uint32_t Data[MPTSAS_MAX_EVENT_DATA_LENGTH];
184 } mptsas_event_entry_t;
185
186 typedef struct mptsas_event_report
187 {
188 uint32_t Size;
189 mptsas_event_entry_t Events[1];
190 } mptsas_event_report_t;
191
192
193 typedef struct mptsas_pci_info
194 {
195 uint32_t BusNumber;
196 uint8_t DeviceNumber;
197 uint8_t FunctionNumber;
198 uint16_t InterruptVector;
199 uint8_t PciHeader[256];
200 } mptsas_pci_info_t;
201
202
203 typedef struct mptsas_diag_action
204 {
205 uint32_t Action;
206 uint32_t Length;
207 uint64_t PtrDiagAction;
208 uint32_t ReturnCode;
209 } mptsas_diag_action_t;
210
211 #define MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
212
213 #define MPTSAS_FW_DIAG_NEW (0x806E6577)
214
215 #define MPTSAS_FW_DIAG_TYPE_REGISTER (0x00000001)
216 #define MPTSAS_FW_DIAG_TYPE_UNREGISTER (0x00000002)
217 #define MPTSAS_FW_DIAG_TYPE_QUERY (0x00000003)
218 #define MPTSAS_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
219 #define MPTSAS_FW_DIAG_TYPE_RELEASE (0x00000005)
220
221 #define MPTSAS_FW_DIAG_INVALID_UID (0x00000000)
222
223 #define MPTSAS_FW_DIAG_ERROR_SUCCESS (0x00000000)
224 #define MPTSAS_FW_DIAG_ERROR_FAILURE (0x00000001)
225 #define MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
226 #define MPTSAS_FW_DIAG_ERROR_POST_FAILED (0x00000010)
227 #define MPTSAS_FW_DIAG_ERROR_INVALID_UID (0x00000011)
228 #define MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
229 #define MPTSAS_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
230 #define MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
231
232
233 typedef struct mptsas_fw_diag_register
234 {
235 uint8_t ExtendedType;
236 uint8_t BufferType;
237 uint16_t ApplicationFlags;
238 uint32_t DiagnosticFlags;
239 uint32_t ProductSpecific[23];
240 uint32_t RequestedBufferSize;
241 uint32_t UniqueId;
242 } mptsas_fw_diag_register_t;
243
244 typedef struct mptsas_fw_diag_unregister
245 {
246 uint32_t UniqueId;
247 } mptsas_fw_diag_unregister_t;
248
249 #define MPTSAS_FW_DIAG_FLAG_APP_OWNED (0x0001)
250 #define MPTSAS_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
251 #define MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
252
253 typedef struct mptsas_fw_diag_query
254 {
255 uint8_t ExtendedType;
256 uint8_t BufferType;
257 uint16_t ApplicationFlags;
258 uint32_t DiagnosticFlags;
259 uint32_t ProductSpecific[23];
260 uint32_t TotalBufferSize;
261 uint32_t DriverAddedBufferSize;
262 uint32_t UniqueId;
263 } mptsas_fw_diag_query_t;
264
265 typedef struct mptsas_fw_diag_release
266 {
267 uint32_t UniqueId;
268 } mptsas_fw_diag_release_t;
269
270 #define MPTSAS_FW_DIAG_FLAG_REREGISTER (0x0001)
271 #define MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
272
273 typedef struct mptsas_diag_read_buffer
274 {
275 uint8_t Status;
276 uint8_t Reserved;
277 uint16_t Flags;
278 uint32_t StartingOffset;
279 uint32_t BytesToRead;
280 uint32_t UniqueId;
281 uint32_t DataBuffer[1];
282 } mptsas_diag_read_buffer_t;
283
284 /*
285 * Register Access
286 */
287 #define REG_IO_READ 1
288 #define REG_IO_WRITE 2
289 #define REG_MEM_READ 3
290 #define REG_MEM_WRITE 4
291
292 typedef struct mptsas_reg_access
293 {
294 uint32_t Command;
295 uint32_t RegOffset;
296 uint32_t RegData;
297 } mptsas_reg_access_t;
298
299 #ifdef __cplusplus
300 }
301 #endif
302
303 #endif /* _MPTSAS_IOCTL_H */