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XXXX Nexenta fixes for mpt_sas(7d)
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--- old/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas_impl.c
+++ new/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas_impl.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 24 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
25 25 */
26 26
27 27 /*
28 28 * Copyright (c) 2000 to 2010, LSI Corporation.
29 29 * All rights reserved.
30 30 *
31 31 * Redistribution and use in source and binary forms of all code within
32 32 * this file that is exclusively owned by LSI, with or without
33 33 * modification, is permitted provided that, in addition to the CDDL 1.0
34 34 * License requirements, the following conditions are met:
35 35 *
36 36 * Neither the name of the author nor the names of its contributors may be
37 37 * used to endorse or promote products derived from this software without
38 38 * specific prior written permission.
39 39 *
40 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
41 41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
42 42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
43 43 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
44 44 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
45 45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
46 46 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
47 47 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
48 48 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
49 49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
50 50 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
51 51 * DAMAGE.
52 52 */
53 53
54 54 /*
55 55 * mptsas_impl - This file contains all the basic functions for communicating
56 56 * to MPT based hardware.
57 57 */
58 58
59 59 #if defined(lint) || defined(DEBUG)
60 60 #define MPTSAS_DEBUG
61 61 #endif
62 62
63 63 /*
64 64 * standard header files
65 65 */
66 66 #include <sys/note.h>
67 67 #include <sys/scsi/scsi.h>
68 68 #include <sys/pci.h>
69 69
70 70 #pragma pack(1)
71 71 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h>
72 72 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h>
73 73 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h>
74 74 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h>
75 75 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h>
76 76 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h>
77 77 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h>
78 78 #pragma pack()
79 79
80 80 /*
81 81 * private header files.
82 82 */
83 83 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h>
84 84 #include <sys/scsi/adapters/mpt_sas/mptsas_smhba.h>
85 85
86 86 /*
87 87 * FMA header files.
88 88 */
89 89 #include <sys/fm/io/ddi.h>
90 90
91 91 #if defined(MPTSAS_DEBUG)
92 92 extern uint32_t mptsas_debug_flags;
93 93 #endif
94 94
95 95 /*
96 96 * prototypes
97 97 */
98 98 static void mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd);
99 99 static void mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd);
100 100 static m_event_struct_t *mptsas_ioc_event_find_by_cmd(mptsas_t *mpt,
101 101 struct mptsas_cmd *cmd);
102 102
103 103 /*
104 104 * add ioc evnet cmd into the queue
105 105 */
106 106 static void
107 107 mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd)
108 108 {
109 109 if ((cmd->m_event_linkp = mpt->m_ioc_event_cmdq) == NULL) {
110 110 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp;
111 111 mpt->m_ioc_event_cmdq = cmd;
112 112 } else {
113 113 cmd->m_event_linkp = NULL;
114 114 *(mpt->m_ioc_event_cmdtail) = cmd;
115 115 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp;
116 116 }
117 117 }
118 118
119 119 /*
120 120 * remove specified cmd from the ioc event queue
121 121 */
122 122 static void
123 123 mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd)
124 124 {
125 125 m_event_struct_t *prev = mpt->m_ioc_event_cmdq;
126 126 if (prev == cmd) {
127 127 if ((mpt->m_ioc_event_cmdq = cmd->m_event_linkp) == NULL) {
128 128 mpt->m_ioc_event_cmdtail = &mpt->m_ioc_event_cmdq;
129 129 }
130 130 cmd->m_event_linkp = NULL;
131 131 return;
132 132 }
133 133 while (prev != NULL) {
134 134 if (prev->m_event_linkp == cmd) {
135 135 prev->m_event_linkp = cmd->m_event_linkp;
136 136 if (cmd->m_event_linkp == NULL) {
137 137 mpt->m_ioc_event_cmdtail = &prev->m_event_linkp;
138 138 }
139 139
140 140 cmd->m_event_linkp = NULL;
141 141 return;
142 142 }
143 143 prev = prev->m_event_linkp;
144 144 }
145 145 }
146 146
147 147 static m_event_struct_t *
148 148 mptsas_ioc_event_find_by_cmd(mptsas_t *mpt, struct mptsas_cmd *cmd)
149 149 {
150 150 m_event_struct_t *ioc_cmd = NULL;
151 151
152 152 ioc_cmd = mpt->m_ioc_event_cmdq;
153 153 while (ioc_cmd != NULL) {
154 154 if (&(ioc_cmd->m_event_cmd) == cmd) {
155 155 return (ioc_cmd);
156 156 }
157 157 ioc_cmd = ioc_cmd->m_event_linkp;
158 158 }
159 159 ioc_cmd = NULL;
160 160 return (ioc_cmd);
161 161 }
162 162
163 163 void
164 164 mptsas_destroy_ioc_event_cmd(mptsas_t *mpt)
165 165 {
166 166 m_event_struct_t *ioc_cmd = NULL;
167 167 m_event_struct_t *ioc_cmd_tmp = NULL;
168 168 ioc_cmd = mpt->m_ioc_event_cmdq;
169 169
170 170 /*
171 171 * because the IOC event queue is resource of per instance for driver,
172 172 * it's not only ACK event commands used it, but also some others used
173 173 * it. We need destroy all ACK event commands when IOC reset, but can't
174 174 * disturb others.So we use filter to clear the ACK event cmd in ioc
175 175 * event queue, and other requests should be reserved, and they would
176 176 * be free by its owner.
177 177 */
178 178 while (ioc_cmd != NULL) {
179 179 if (ioc_cmd->m_event_cmd.cmd_flags & CFLAG_CMDACK) {
180 180 NDBG20(("destroy!! remove Ack Flag ioc_cmd\n"));
181 181 if ((mpt->m_ioc_event_cmdq =
182 182 ioc_cmd->m_event_linkp) == NULL)
183 183 mpt->m_ioc_event_cmdtail =
184 184 &mpt->m_ioc_event_cmdq;
185 185 ioc_cmd_tmp = ioc_cmd;
186 186 ioc_cmd = ioc_cmd->m_event_linkp;
187 187 kmem_free(ioc_cmd_tmp, M_EVENT_STRUCT_SIZE);
188 188 } else {
189 189 /*
190 190 * it's not ack cmd, so continue to check next one
191 191 */
192 192
193 193 NDBG20(("destroy!! it's not Ack Flag, continue\n"));
194 194 ioc_cmd = ioc_cmd->m_event_linkp;
195 195 }
196 196
197 197 }
198 198 }
199 199
200 200 void
201 201 mptsas_start_config_page_access(mptsas_t *mpt, mptsas_cmd_t *cmd)
202 202 {
203 203 pMpi2ConfigRequest_t request;
204 204 pMpi2SGESimple64_t sge;
205 205 struct scsi_pkt *pkt = cmd->cmd_pkt;
206 206 mptsas_config_request_t *config = pkt->pkt_ha_private;
207 207 uint8_t direction;
208 208 uint32_t length, flagslength, request_desc_low;
209 209
210 210 ASSERT(mutex_owned(&mpt->m_mutex));
211 211
212 212 /*
213 213 * Point to the correct message and clear it as well as the global
214 214 * config page memory.
215 215 */
216 216 request = (pMpi2ConfigRequest_t)(mpt->m_req_frame +
217 217 (mpt->m_req_frame_size * cmd->cmd_slot));
218 218 bzero(request, mpt->m_req_frame_size);
219 219
220 220 /*
221 221 * Form the request message.
222 222 */
223 223 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Function,
224 224 MPI2_FUNCTION_CONFIG);
225 225 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Action, config->action);
226 226 direction = MPI2_SGE_FLAGS_IOC_TO_HOST;
227 227 length = 0;
228 228 sge = (pMpi2SGESimple64_t)&request->PageBufferSGE;
229 229 if (config->action == MPI2_CONFIG_ACTION_PAGE_HEADER) {
230 230 if (config->page_type > MPI2_CONFIG_PAGETYPE_MASK) {
231 231 ddi_put8(mpt->m_acc_req_frame_hdl,
232 232 &request->Header.PageType,
233 233 MPI2_CONFIG_PAGETYPE_EXTENDED);
234 234 ddi_put8(mpt->m_acc_req_frame_hdl,
235 235 &request->ExtPageType, config->page_type);
236 236 } else {
237 237 ddi_put8(mpt->m_acc_req_frame_hdl,
238 238 &request->Header.PageType, config->page_type);
239 239 }
240 240 } else {
241 241 ddi_put8(mpt->m_acc_req_frame_hdl, &request->ExtPageType,
242 242 config->ext_page_type);
243 243 ddi_put16(mpt->m_acc_req_frame_hdl, &request->ExtPageLength,
244 244 config->ext_page_length);
245 245 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageType,
246 246 config->page_type);
247 247 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageLength,
248 248 config->page_length);
249 249 ddi_put8(mpt->m_acc_req_frame_hdl,
250 250 &request->Header.PageVersion, config->page_version);
251 251 if ((config->page_type & MPI2_CONFIG_PAGETYPE_MASK) ==
252 252 MPI2_CONFIG_PAGETYPE_EXTENDED) {
253 253 length = config->ext_page_length * 4;
254 254 } else {
255 255 length = config->page_length * 4;
256 256 }
257 257
258 258 if (config->action == MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
259 259 direction = MPI2_SGE_FLAGS_HOST_TO_IOC;
260 260 }
261 261 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.Low,
262 262 (uint32_t)cmd->cmd_dma_addr);
263 263 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.High,
264 264 (uint32_t)(cmd->cmd_dma_addr >> 32));
265 265 }
266 266 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageNumber,
267 267 config->page_number);
268 268 ddi_put32(mpt->m_acc_req_frame_hdl, &request->PageAddress,
269 269 config->page_address);
270 270 flagslength = ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
271 271 MPI2_SGE_FLAGS_END_OF_BUFFER |
272 272 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
273 273 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
274 274 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
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275 275 direction |
276 276 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
277 277 flagslength |= length;
278 278 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->FlagsLength, flagslength);
279 279
280 280 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
281 281 DDI_DMA_SYNC_FORDEV);
282 282 request_desc_low = (cmd->cmd_slot << 16) +
283 283 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
284 284 cmd->cmd_rfm = NULL;
285 - mpt->m_active->m_slot[cmd->cmd_slot] = cmd;
286 285 MPTSAS_START_CMD(mpt, request_desc_low, 0);
287 286 if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl) !=
288 287 DDI_SUCCESS) ||
289 288 (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl) !=
290 289 DDI_SUCCESS)) {
291 290 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
292 291 }
293 292 }
294 293
295 294 int
296 295 mptsas_access_config_page(mptsas_t *mpt, uint8_t action, uint8_t page_type,
297 296 uint8_t page_number, uint32_t page_address, int (*callback) (mptsas_t *,
298 297 caddr_t, ddi_acc_handle_t, uint16_t, uint32_t, va_list), ...)
299 298 {
300 299 va_list ap;
301 300 ddi_dma_attr_t attrs;
302 301 ddi_dma_cookie_t cookie;
303 302 ddi_acc_handle_t accessp;
304 303 size_t len = 0;
305 304 mptsas_config_request_t config;
306 305 int rval = DDI_SUCCESS, config_flags = 0;
307 306 mptsas_cmd_t *cmd;
308 307 struct scsi_pkt *pkt;
309 308 pMpi2ConfigReply_t reply;
310 309 uint16_t iocstatus = 0;
311 310 uint32_t iocloginfo;
312 311 caddr_t page_memp;
313 312
314 313 va_start(ap, callback);
315 314 ASSERT(mutex_owned(&mpt->m_mutex));
316 315
317 316 /*
318 317 * Get a command from the pool.
319 318 */
320 319 if ((rval = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
321 320 mptsas_log(mpt, CE_NOTE, "command pool is full for config "
322 321 "page request");
323 322 rval = DDI_FAILURE;
324 323 goto page_done;
325 324 }
326 325 config_flags |= MPTSAS_REQUEST_POOL_CMD;
327 326
328 327 bzero((caddr_t)cmd, sizeof (*cmd));
329 328 bzero((caddr_t)pkt, scsi_pkt_size());
330 329 bzero((caddr_t)&config, sizeof (config));
331 330
332 331 /*
333 332 * Save the data for this request to be used in the call to start the
334 333 * config header request.
335 334 */
336 335 config.action = MPI2_CONFIG_ACTION_PAGE_HEADER;
337 336 config.page_type = page_type;
338 337 config.page_number = page_number;
339 338 config.page_address = page_address;
340 339
341 340 /*
342 341 * Form a blank cmd/pkt to store the acknowledgement message
343 342 */
344 343 pkt->pkt_ha_private = (opaque_t)&config;
345 344 pkt->pkt_flags = FLAG_HEAD;
346 345 pkt->pkt_time = 60;
347 346 cmd->cmd_pkt = pkt;
348 347 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_CONFIG;
349 348
350 349 /*
351 350 * Save the config header request message in a slot.
352 351 */
353 352 if (mptsas_save_cmd(mpt, cmd) == TRUE) {
354 353 cmd->cmd_flags |= CFLAG_PREPARED;
355 354 mptsas_start_config_page_access(mpt, cmd);
356 355 } else {
357 356 mptsas_waitq_add(mpt, cmd);
358 357 }
359 358
360 359 /*
361 360 * If this is a request for a RAID info page, or any page called during
362 361 * the RAID info page request, poll because these config page requests
363 362 * are nested. Poll to avoid data corruption due to one page's data
364 363 * overwriting the outer page request's data. This can happen when
365 364 * the mutex is released in cv_wait.
366 365 */
367 366 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) ||
368 367 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) ||
369 368 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) {
370 369 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000);
371 370 } else {
372 371 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
373 372 cv_wait(&mpt->m_config_cv, &mpt->m_mutex);
374 373 }
375 374 }
376 375
377 376 /*
378 377 * Check if the header request completed without timing out
379 378 */
380 379 if (cmd->cmd_flags & CFLAG_TIMEOUT) {
381 380 mptsas_log(mpt, CE_WARN, "config header request timeout");
382 381 rval = DDI_FAILURE;
383 382 goto page_done;
384 383 }
385 384
386 385 /*
387 386 * cmd_rfm points to the reply message if a reply was given. Check the
388 387 * IOCStatus to make sure everything went OK with the header request.
389 388 */
390 389 if (cmd->cmd_rfm) {
391 390 config_flags |= MPTSAS_ADDRESS_REPLY;
392 391 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
393 392 DDI_DMA_SYNC_FORCPU);
394 393 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm
395 394 - mpt->m_reply_frame_dma_addr));
396 395 config.page_type = ddi_get8(mpt->m_acc_reply_frame_hdl,
397 396 &reply->Header.PageType);
398 397 config.page_number = ddi_get8(mpt->m_acc_reply_frame_hdl,
399 398 &reply->Header.PageNumber);
400 399 config.page_length = ddi_get8(mpt->m_acc_reply_frame_hdl,
401 400 &reply->Header.PageLength);
402 401 config.page_version = ddi_get8(mpt->m_acc_reply_frame_hdl,
403 402 &reply->Header.PageVersion);
404 403 config.ext_page_type = ddi_get8(mpt->m_acc_reply_frame_hdl,
405 404 &reply->ExtPageType);
406 405 config.ext_page_length = ddi_get16(mpt->m_acc_reply_frame_hdl,
407 406 &reply->ExtPageLength);
408 407
409 408 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
410 409 &reply->IOCStatus);
411 410 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
412 411 &reply->IOCLogInfo);
413 412
414 413 if (iocstatus) {
415 414 NDBG13(("mptsas_access_config_page header: "
416 415 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
417 416 iocloginfo));
418 417 rval = DDI_FAILURE;
419 418 goto page_done;
420 419 }
421 420
422 421 if ((config.page_type & MPI2_CONFIG_PAGETYPE_MASK) ==
423 422 MPI2_CONFIG_PAGETYPE_EXTENDED)
424 423 len = (config.ext_page_length * 4);
425 424 else
426 425 len = (config.page_length * 4);
427 426
428 427 }
429 428
430 429 if (pkt->pkt_reason == CMD_RESET) {
431 430 mptsas_log(mpt, CE_WARN, "ioc reset abort config header "
432 431 "request");
433 432 rval = DDI_FAILURE;
434 433 goto page_done;
435 434 }
436 435
437 436 /*
438 437 * Put the reply frame back on the free queue, increment the free
439 438 * index, and write the new index to the free index register. But only
440 439 * if this reply is an ADDRESS reply.
441 440 */
442 441 if (config_flags & MPTSAS_ADDRESS_REPLY) {
443 442 ddi_put32(mpt->m_acc_free_queue_hdl,
444 443 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
445 444 cmd->cmd_rfm);
446 445 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
447 446 DDI_DMA_SYNC_FORDEV);
448 447 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
449 448 mpt->m_free_index = 0;
450 449 }
451 450 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
452 451 mpt->m_free_index);
453 452 config_flags &= (~MPTSAS_ADDRESS_REPLY);
454 453 }
455 454
456 455 /*
457 456 * Allocate DMA buffer here. Store the info regarding this buffer in
458 457 * the cmd struct so that it can be used for this specific command and
459 458 * de-allocated after the command completes. The size of the reply
460 459 * will not be larger than the reply frame size.
461 460 */
462 461 attrs = mpt->m_msg_dma_attr;
463 462 attrs.dma_attr_sgllen = 1;
464 463 attrs.dma_attr_granular = (uint32_t)len;
465 464
466 465 if (mptsas_dma_addr_create(mpt, attrs,
467 466 &cmd->cmd_dmahandle, &accessp, &page_memp,
468 467 len, &cookie) == FALSE) {
469 468 goto page_done;
470 469 }
471 470 cmd->cmd_dma_addr = cookie.dmac_laddress;
472 471 bzero(page_memp, len);
473 472
474 473 /*
475 474 * Save the data for this request to be used in the call to start the
476 475 * config page read
477 476 */
478 477 config.action = action;
479 478 config.page_address = page_address;
480 479
481 480 /*
482 481 * Re-use the cmd that was used to get the header. Reset some of the
483 482 * values.
484 483 */
485 484 bzero((caddr_t)pkt, scsi_pkt_size());
486 485 pkt->pkt_ha_private = (opaque_t)&config;
487 486 pkt->pkt_flags = FLAG_HEAD;
488 487 pkt->pkt_time = 60;
489 488 cmd->cmd_flags = CFLAG_PREPARED | CFLAG_CMDIOC | CFLAG_CONFIG;
490 489
491 490 /*
492 491 * Send the config page request. cmd is re-used from header request.
493 492 */
494 493 mptsas_start_config_page_access(mpt, cmd);
495 494
496 495 /*
497 496 * If this is a request for a RAID info page, or any page called during
498 497 * the RAID info page request, poll because these config page requests
499 498 * are nested. Poll to avoid data corruption due to one page's data
500 499 * overwriting the outer page request's data. This can happen when
501 500 * the mutex is released in cv_wait.
502 501 */
503 502 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) ||
504 503 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) ||
505 504 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) {
506 505 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000);
507 506 } else {
508 507 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
509 508 cv_wait(&mpt->m_config_cv, &mpt->m_mutex);
510 509 }
511 510 }
512 511
513 512 /*
514 513 * Check if the request completed without timing out
515 514 */
516 515 if (cmd->cmd_flags & CFLAG_TIMEOUT) {
517 516 mptsas_log(mpt, CE_WARN, "config page request timeout");
518 517 rval = DDI_FAILURE;
519 518 goto page_done;
520 519 }
521 520
522 521 /*
523 522 * cmd_rfm points to the reply message if a reply was given. The reply
524 523 * frame and the config page are returned from this function in the
525 524 * param list.
526 525 */
527 526 if (cmd->cmd_rfm) {
528 527 config_flags |= MPTSAS_ADDRESS_REPLY;
529 528 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
530 529 DDI_DMA_SYNC_FORCPU);
531 530 (void) ddi_dma_sync(cmd->cmd_dmahandle, 0, 0,
532 531 DDI_DMA_SYNC_FORCPU);
533 532 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm
534 533 - mpt->m_reply_frame_dma_addr));
535 534 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
536 535 &reply->IOCStatus);
537 536 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
538 537 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
539 538 &reply->IOCLogInfo);
540 539 }
541 540
542 541 if (callback(mpt, page_memp, accessp, iocstatus, iocloginfo, ap)) {
543 542 rval = DDI_FAILURE;
544 543 goto page_done;
545 544 }
546 545
547 546 mptsas_fma_check(mpt, cmd);
548 547 /*
549 548 * Check the DMA/ACC handles and then free the DMA buffer.
550 549 */
551 550 if ((mptsas_check_dma_handle(cmd->cmd_dmahandle) != DDI_SUCCESS) ||
552 551 (mptsas_check_acc_handle(accessp) != DDI_SUCCESS)) {
553 552 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
554 553 rval = DDI_FAILURE;
555 554 }
556 555
557 556 if (pkt->pkt_reason == CMD_TRAN_ERR) {
558 557 mptsas_log(mpt, CE_WARN, "config fma error");
559 558 rval = DDI_FAILURE;
560 559 goto page_done;
561 560 }
562 561 if (pkt->pkt_reason == CMD_RESET) {
563 562 mptsas_log(mpt, CE_WARN, "ioc reset abort config request");
564 563 rval = DDI_FAILURE;
565 564 goto page_done;
566 565 }
567 566
568 567 page_done:
569 568 va_end(ap);
570 569 /*
571 570 * Put the reply frame back on the free queue, increment the free
572 571 * index, and write the new index to the free index register. But only
573 572 * if this reply is an ADDRESS reply.
574 573 */
575 574 if (config_flags & MPTSAS_ADDRESS_REPLY) {
576 575 ddi_put32(mpt->m_acc_free_queue_hdl,
577 576 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
578 577 cmd->cmd_rfm);
579 578 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
580 579 DDI_DMA_SYNC_FORDEV);
581 580 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
582 581 mpt->m_free_index = 0;
583 582 }
584 583 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
585 584 mpt->m_free_index);
586 585 }
587 586
588 587 mptsas_dma_addr_destroy(&cmd->cmd_dmahandle, &accessp);
589 588
590 589 if (cmd && (cmd->cmd_flags & CFLAG_PREPARED)) {
591 590 mptsas_remove_cmd(mpt, cmd);
592 591 config_flags &= (~MPTSAS_REQUEST_POOL_CMD);
593 592 }
594 593 if (config_flags & MPTSAS_REQUEST_POOL_CMD)
595 594 mptsas_return_to_pool(mpt, cmd);
596 595
597 596 if (config_flags & MPTSAS_CMD_TIMEOUT) {
598 597 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
599 598 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
600 599 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
601 600 }
602 601 }
603 602
604 603 return (rval);
605 604 }
606 605
607 606 int
608 607 mptsas_send_config_request_msg(mptsas_t *mpt, uint8_t action, uint8_t pagetype,
609 608 uint32_t pageaddress, uint8_t pagenumber, uint8_t pageversion,
610 609 uint8_t pagelength, uint32_t SGEflagslength, uint32_t SGEaddress32)
611 610 {
612 611 pMpi2ConfigRequest_t config;
613 612 int send_numbytes;
614 613
615 614 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST));
616 615 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp;
617 616 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG);
618 617 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action);
619 618 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber);
620 619 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType, pagetype);
621 620 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress);
622 621 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion);
623 622 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageLength, pagelength);
624 623 ddi_put32(mpt->m_hshk_acc_hdl,
625 624 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength);
626 625 ddi_put32(mpt->m_hshk_acc_hdl,
627 626 &config->PageBufferSGE.MpiSimple.u.Address32, SGEaddress32);
628 627 send_numbytes = sizeof (MPI2_CONFIG_REQUEST);
629 628
630 629 /*
631 630 * Post message via handshake
632 631 */
633 632 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes,
634 633 mpt->m_hshk_acc_hdl)) {
635 634 return (-1);
636 635 }
637 636 return (0);
638 637 }
639 638
640 639 int
641 640 mptsas_send_extended_config_request_msg(mptsas_t *mpt, uint8_t action,
642 641 uint8_t extpagetype, uint32_t pageaddress, uint8_t pagenumber,
643 642 uint8_t pageversion, uint16_t extpagelength,
644 643 uint32_t SGEflagslength, uint32_t SGEaddress32)
645 644 {
646 645 pMpi2ConfigRequest_t config;
647 646 int send_numbytes;
648 647
649 648 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST));
650 649 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp;
651 650 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG);
652 651 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action);
653 652 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber);
654 653 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType,
655 654 MPI2_CONFIG_PAGETYPE_EXTENDED);
656 655 ddi_put8(mpt->m_hshk_acc_hdl, &config->ExtPageType, extpagetype);
657 656 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress);
658 657 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion);
659 658 ddi_put16(mpt->m_hshk_acc_hdl, &config->ExtPageLength, extpagelength);
660 659 ddi_put32(mpt->m_hshk_acc_hdl,
661 660 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength);
662 661 ddi_put32(mpt->m_hshk_acc_hdl,
663 662 &config->PageBufferSGE.MpiSimple.u.Address32, SGEaddress32);
664 663 send_numbytes = sizeof (MPI2_CONFIG_REQUEST);
665 664
666 665 /*
667 666 * Post message via handshake
668 667 */
669 668 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes,
670 669 mpt->m_hshk_acc_hdl)) {
671 670 return (-1);
672 671 }
673 672 return (0);
674 673 }
675 674
676 675 int
677 676 mptsas_ioc_wait_for_response(mptsas_t *mpt)
678 677 {
679 678 int polls = 0;
680 679
681 680 while ((ddi_get32(mpt->m_datap,
682 681 &mpt->m_reg->HostInterruptStatus) & MPI2_HIS_IOP_DOORBELL_STATUS)) {
683 682 drv_usecwait(1000);
684 683 if (polls++ > 60000) {
685 684 return (-1);
686 685 }
687 686 }
688 687 return (0);
689 688 }
690 689
691 690 int
692 691 mptsas_ioc_wait_for_doorbell(mptsas_t *mpt)
693 692 {
694 693 int polls = 0;
695 694
696 695 while ((ddi_get32(mpt->m_datap,
697 696 &mpt->m_reg->HostInterruptStatus) & MPI2_HIM_DIM) == 0) {
698 697 drv_usecwait(1000);
699 698 if (polls++ > 300000) {
700 699 return (-1);
701 700 }
702 701 }
703 702 return (0);
704 703 }
705 704
706 705 int
707 706 mptsas_send_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes,
708 707 ddi_acc_handle_t accessp)
709 708 {
710 709 int i;
711 710
712 711 /*
713 712 * clean pending doorbells
714 713 */
715 714 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
716 715 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
717 716 ((MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
718 717 ((numbytes / 4) << MPI2_DOORBELL_ADD_DWORDS_SHIFT)));
719 718
720 719 if (mptsas_ioc_wait_for_doorbell(mpt)) {
721 720 NDBG19(("mptsas_send_handshake failed. Doorbell not ready\n"));
722 721 return (-1);
723 722 }
724 723
725 724 /*
726 725 * clean pending doorbells again
727 726 */
728 727 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
729 728
730 729 if (mptsas_ioc_wait_for_response(mpt)) {
731 730 NDBG19(("mptsas_send_handshake failed. Doorbell not "
732 731 "cleared\n"));
733 732 return (-1);
734 733 }
735 734
736 735 /*
737 736 * post handshake message
738 737 */
739 738 for (i = 0; (i < numbytes / 4); i++, memp += 4) {
740 739 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
741 740 ddi_get32(accessp, (uint32_t *)((void *)(memp))));
742 741 if (mptsas_ioc_wait_for_response(mpt)) {
743 742 NDBG19(("mptsas_send_handshake failed posting "
744 743 "message\n"));
745 744 return (-1);
746 745 }
747 746 }
748 747
749 748 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) {
750 749 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
751 750 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0);
752 751 return (-1);
753 752 }
754 753
755 754 return (0);
756 755 }
757 756
758 757 int
759 758 mptsas_get_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes,
760 759 ddi_acc_handle_t accessp)
761 760 {
762 761 int i, totalbytes, bytesleft;
763 762 uint16_t val;
764 763
765 764 /*
766 765 * wait for doorbell
767 766 */
768 767 if (mptsas_ioc_wait_for_doorbell(mpt)) {
769 768 NDBG19(("mptsas_get_handshake failed. Doorbell not ready\n"));
770 769 return (-1);
771 770 }
772 771
773 772 /*
774 773 * get first 2 bytes of handshake message to determine how much
775 774 * data we will be getting
776 775 */
777 776 for (i = 0; i < 2; i++, memp += 2) {
778 777 val = (ddi_get32(mpt->m_datap,
779 778 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK);
780 779 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
781 780 if (mptsas_ioc_wait_for_doorbell(mpt)) {
782 781 NDBG19(("mptsas_get_handshake failure getting initial"
783 782 " data\n"));
784 783 return (-1);
785 784 }
786 785 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val);
787 786 if (i == 1) {
788 787 totalbytes = (val & 0xFF) * 2;
789 788 }
790 789 }
791 790
792 791 /*
793 792 * If we are expecting less bytes than the message wants to send
794 793 * we simply save as much as we expected and then throw out the rest
795 794 * later
796 795 */
797 796 if (totalbytes > (numbytes / 2)) {
798 797 bytesleft = ((numbytes / 2) - 2);
799 798 } else {
800 799 bytesleft = (totalbytes - 2);
801 800 }
802 801
803 802 /*
804 803 * Get the rest of the data
805 804 */
806 805 for (i = 0; i < bytesleft; i++, memp += 2) {
807 806 val = (ddi_get32(mpt->m_datap,
808 807 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK);
809 808 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
810 809 if (mptsas_ioc_wait_for_doorbell(mpt)) {
811 810 NDBG19(("mptsas_get_handshake failure getting"
812 811 " main data\n"));
813 812 return (-1);
814 813 }
815 814 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val);
816 815 }
817 816
818 817 /*
819 818 * Sometimes the device will send more data than is expected
820 819 * This data is not used by us but needs to be cleared from
821 820 * ioc doorbell. So we just read the values and throw
822 821 * them out.
823 822 */
824 823 if (totalbytes > (numbytes / 2)) {
825 824 for (i = (numbytes / 2); i < totalbytes; i++) {
826 825 val = (ddi_get32(mpt->m_datap,
827 826 &mpt->m_reg->Doorbell) &
828 827 MPI2_DOORBELL_DATA_MASK);
829 828 ddi_put32(mpt->m_datap,
830 829 &mpt->m_reg->HostInterruptStatus, 0);
831 830 if (mptsas_ioc_wait_for_doorbell(mpt)) {
832 831 NDBG19(("mptsas_get_handshake failure getting "
833 832 "extra garbage data\n"));
834 833 return (-1);
835 834 }
836 835 }
837 836 }
838 837
839 838 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
840 839
841 840 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) {
842 841 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
843 842 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0);
844 843 return (-1);
845 844 }
846 845
847 846 return (0);
848 847 }
849 848
850 849 int
851 850 mptsas_kick_start(mptsas_t *mpt)
852 851 {
853 852 int polls = 0;
854 853 uint32_t diag_reg, ioc_state, saved_HCB_size;
855 854
856 855 /*
857 856 * Start a hard reset. Write magic number and wait 500 mSeconds.
858 857 */
859 858 MPTSAS_ENABLE_DRWE(mpt);
860 859 drv_usecwait(500000);
861 860
862 861 /*
863 862 * Read the current Diag Reg and save the Host Controlled Boot size.
864 863 */
865 864 diag_reg = ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic);
866 865 saved_HCB_size = ddi_get32(mpt->m_datap, &mpt->m_reg->HCBSize);
867 866
868 867 /*
869 868 * Set Reset Adapter bit and wait 50 mSeconds.
870 869 */
871 870 diag_reg |= MPI2_DIAG_RESET_ADAPTER;
872 871 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
873 872 drv_usecwait(50000);
874 873
875 874 /*
876 875 * Poll, waiting for Reset Adapter bit to clear. 300 Seconds max
877 876 * (600000 * 500 = 300,000,000 uSeconds, 300 seconds).
878 877 * If no more adapter (all FF's), just return failure.
879 878 */
880 879 for (polls = 0; polls < 600000; polls++) {
881 880 diag_reg = ddi_get32(mpt->m_datap,
882 881 &mpt->m_reg->HostDiagnostic);
883 882 if (diag_reg == 0xFFFFFFFF) {
884 883 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
885 884 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
886 885 return (DDI_FAILURE);
887 886 }
888 887 if (!(diag_reg & MPI2_DIAG_RESET_ADAPTER)) {
889 888 break;
890 889 }
891 890 drv_usecwait(500);
892 891 }
893 892 if (polls == 600000) {
894 893 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
895 894 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
896 895 return (DDI_FAILURE);
897 896 }
898 897
899 898 /*
900 899 * Check if adapter is in Host Boot Mode. If so, restart adapter
901 900 * assuming the HCB points to good FW.
902 901 * Set BootDeviceSel to HCDW (Host Code and Data Window).
903 902 */
904 903 if (diag_reg & MPI2_DIAG_HCB_MODE) {
905 904 diag_reg &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
906 905 diag_reg |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
907 906 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
908 907
909 908 /*
910 909 * Re-enable the HCDW.
911 910 */
912 911 ddi_put32(mpt->m_datap, &mpt->m_reg->HCBSize,
913 912 (saved_HCB_size | MPI2_HCB_SIZE_HCB_ENABLE));
914 913 }
915 914
916 915 /*
917 916 * Restart the adapter.
918 917 */
919 918 diag_reg &= ~MPI2_DIAG_HOLD_IOC_RESET;
920 919 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
921 920
922 921 /*
923 922 * Disable writes to the Host Diag register.
924 923 */
925 924 ddi_put32(mpt->m_datap, &mpt->m_reg->WriteSequence,
926 925 MPI2_WRSEQ_FLUSH_KEY_VALUE);
927 926
928 927 /*
929 928 * Wait 60 seconds max for FW to come to ready state.
930 929 */
931 930 for (polls = 0; polls < 60000; polls++) {
932 931 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell);
933 932 if (ioc_state == 0xFFFFFFFF) {
934 933 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
935 934 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
936 935 return (DDI_FAILURE);
937 936 }
938 937 if ((ioc_state & MPI2_IOC_STATE_MASK) ==
939 938 MPI2_IOC_STATE_READY) {
940 939 break;
941 940 }
942 941 drv_usecwait(1000);
943 942 }
944 943 if (polls == 60000) {
945 944 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
946 945 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
947 946 return (DDI_FAILURE);
948 947 }
949 948
950 949 /*
951 950 * Clear the ioc ack events queue.
952 951 */
953 952 mptsas_destroy_ioc_event_cmd(mpt);
954 953
955 954 return (DDI_SUCCESS);
956 955 }
957 956
958 957 int
959 958 mptsas_ioc_reset(mptsas_t *mpt, int first_time)
960 959 {
961 960 int polls = 0;
962 961 uint32_t reset_msg;
963 962 uint32_t ioc_state;
964 963
965 964 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell);
966 965 /*
967 966 * If chip is already in ready state then there is nothing to do.
968 967 */
969 968 if (ioc_state == MPI2_IOC_STATE_READY) {
970 969 return (MPTSAS_NO_RESET);
971 970 }
972 971 /*
973 972 * If the chip is already operational, we just need to send
974 973 * it a message unit reset to put it back in the ready state
975 974 */
976 975 if (ioc_state & MPI2_IOC_STATE_OPERATIONAL) {
977 976 /*
978 977 * If the first time, try MUR anyway, because we haven't even
979 978 * queried the card for m_event_replay and other capabilities.
980 979 * Other platforms do it this way, we can still do a hard
981 980 * reset if we need to, MUR takes less time than a full
982 981 * adapter reset, and there are reports that some HW
983 982 * combinations will lock up when receiving a hard reset.
984 983 */
985 984 if ((first_time || mpt->m_event_replay) &&
986 985 (mpt->m_softstate & MPTSAS_SS_MSG_UNIT_RESET)) {
987 986 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
988 987 reset_msg = MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET;
989 988 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
990 989 (reset_msg << MPI2_DOORBELL_FUNCTION_SHIFT));
991 990 if (mptsas_ioc_wait_for_response(mpt)) {
992 991 NDBG19(("mptsas_ioc_reset failure sending "
993 992 "message_unit_reset\n"));
994 993 goto hard_reset;
995 994 }
996 995
997 996 /*
998 997 * Wait no more than 60 seconds for chip to become
999 998 * ready.
1000 999 */
1001 1000 while ((ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell) &
1002 1001 MPI2_IOC_STATE_READY) == 0x0) {
1003 1002 drv_usecwait(1000);
1004 1003 if (polls++ > 60000) {
1005 1004 goto hard_reset;
1006 1005 }
1007 1006 }
1008 1007
1009 1008 /*
1010 1009 * Save the last reset mode done on IOC which will be
1011 1010 * helpful while resuming from suspension.
1012 1011 */
1013 1012 mpt->m_softstate |= MPTSAS_DID_MSG_UNIT_RESET;
1014 1013
1015 1014 /*
1016 1015 * the message unit reset would do reset operations
1017 1016 * clear reply and request queue, so we should clear
1018 1017 * ACK event cmd.
1019 1018 */
1020 1019 mptsas_destroy_ioc_event_cmd(mpt);
1021 1020 return (MPTSAS_SUCCESS_MUR);
1022 1021 }
1023 1022 }
1024 1023 hard_reset:
1025 1024 mpt->m_softstate &= ~MPTSAS_DID_MSG_UNIT_RESET;
1026 1025 if (mptsas_kick_start(mpt) == DDI_FAILURE) {
1027 1026 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
1028 1027 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
1029 1028 return (MPTSAS_RESET_FAIL);
1030 1029 }
1031 1030 return (MPTSAS_SUCCESS_HARDRESET);
1032 1031 }
1033 1032
1034 1033
1035 1034 int
1036 1035 mptsas_request_from_pool(mptsas_t *mpt, mptsas_cmd_t **cmd,
1037 1036 struct scsi_pkt **pkt)
1038 1037 {
1039 1038 m_event_struct_t *ioc_cmd = NULL;
1040 1039
1041 1040 ioc_cmd = kmem_zalloc(M_EVENT_STRUCT_SIZE, KM_SLEEP);
1042 1041 if (ioc_cmd == NULL) {
1043 1042 return (DDI_FAILURE);
1044 1043 }
1045 1044 ioc_cmd->m_event_linkp = NULL;
1046 1045 mptsas_ioc_event_cmdq_add(mpt, ioc_cmd);
1047 1046 *cmd = &(ioc_cmd->m_event_cmd);
1048 1047 *pkt = &(ioc_cmd->m_event_pkt);
1049 1048
1050 1049 return (DDI_SUCCESS);
1051 1050 }
1052 1051
1053 1052 void
1054 1053 mptsas_return_to_pool(mptsas_t *mpt, mptsas_cmd_t *cmd)
1055 1054 {
1056 1055 m_event_struct_t *ioc_cmd = NULL;
1057 1056
1058 1057 ioc_cmd = mptsas_ioc_event_find_by_cmd(mpt, cmd);
1059 1058 if (ioc_cmd == NULL) {
1060 1059 return;
1061 1060 }
1062 1061
1063 1062 mptsas_ioc_event_cmdq_delete(mpt, ioc_cmd);
1064 1063 kmem_free(ioc_cmd, M_EVENT_STRUCT_SIZE);
1065 1064 ioc_cmd = NULL;
1066 1065 }
1067 1066
1068 1067 /*
1069 1068 * NOTE: We should be able to queue TM requests in the controller to make this
1070 1069 * a lot faster. If resetting all targets, for example, we can load the hi
1071 1070 * priority queue with its limit and the controller will reply as they are
1072 1071 * completed. This way, we don't have to poll for one reply at a time.
1073 1072 * Think about enhancing this later.
1074 1073 */
1075 1074 int
1076 1075 mptsas_ioc_task_management(mptsas_t *mpt, int task_type, uint16_t dev_handle,
1077 1076 int lun, uint8_t *reply, uint32_t reply_size, int mode)
1078 1077 {
1079 1078 /*
1080 1079 * In order to avoid allocating variables on the stack,
1081 1080 * we make use of the pre-existing mptsas_cmd_t and
1082 1081 * scsi_pkt which are included in the mptsas_t which
1083 1082 * is passed to this routine.
1084 1083 */
1085 1084
1086 1085 pMpi2SCSITaskManagementRequest_t task;
1087 1086 int rval = FALSE;
1088 1087 mptsas_cmd_t *cmd;
1089 1088 struct scsi_pkt *pkt;
1090 1089 mptsas_slots_t *slots = mpt->m_active;
1091 1090 uint32_t request_desc_low, i;
1092 1091 pMPI2DefaultReply_t reply_msg;
1093 1092
1094 1093 /*
1095 1094 * Can't start another task management routine.
1096 1095 */
1097 1096 if (slots->m_slot[MPTSAS_TM_SLOT(mpt)] != NULL) {
1098 1097 mptsas_log(mpt, CE_WARN, "Can only start 1 task management"
1099 1098 " command at a time\n");
1100 1099 return (FALSE);
1101 1100 }
1102 1101
1103 1102 cmd = &(mpt->m_event_task_mgmt.m_event_cmd);
1104 1103 pkt = &(mpt->m_event_task_mgmt.m_event_pkt);
1105 1104
1106 1105 bzero((caddr_t)cmd, sizeof (*cmd));
1107 1106 bzero((caddr_t)pkt, scsi_pkt_size());
1108 1107
1109 1108 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0];
1110 1109 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb;
1111 1110 pkt->pkt_ha_private = (opaque_t)cmd;
1112 1111 pkt->pkt_flags = (FLAG_NOINTR | FLAG_HEAD);
1113 1112 pkt->pkt_time = 60;
1114 1113 pkt->pkt_address.a_target = dev_handle;
1115 1114 pkt->pkt_address.a_lun = (uchar_t)lun;
1116 1115 cmd->cmd_pkt = pkt;
1117 1116 cmd->cmd_scblen = 1;
1118 1117 cmd->cmd_flags = CFLAG_TM_CMD;
1119 1118 cmd->cmd_slot = MPTSAS_TM_SLOT(mpt);
1120 1119
1121 1120 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = cmd;
1122 1121
1123 1122 /*
1124 1123 * Store the TM message in memory location corresponding to the TM slot
1125 1124 * number.
1126 1125 */
1127 1126 task = (pMpi2SCSITaskManagementRequest_t)(mpt->m_req_frame +
1128 1127 (mpt->m_req_frame_size * cmd->cmd_slot));
1129 1128 bzero(task, mpt->m_req_frame_size);
1130 1129
1131 1130 /*
1132 1131 * form message for requested task
1133 1132 */
1134 1133 mptsas_init_std_hdr(mpt->m_acc_req_frame_hdl, task, dev_handle, lun, 0,
1135 1134 MPI2_FUNCTION_SCSI_TASK_MGMT);
1136 1135
1137 1136 /*
1138 1137 * Set the task type
1139 1138 */
1140 1139 ddi_put8(mpt->m_acc_req_frame_hdl, &task->TaskType, task_type);
1141 1140
1142 1141 /*
1143 1142 * Send TM request using High Priority Queue.
1144 1143 */
1145 1144 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
1146 1145 DDI_DMA_SYNC_FORDEV);
1147 1146 request_desc_low = (cmd->cmd_slot << 16) +
1148 1147 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1149 1148 MPTSAS_START_CMD(mpt, request_desc_low, 0);
1150 1149 rval = mptsas_poll(mpt, cmd, MPTSAS_POLL_TIME);
1151 1150
1152 1151 if (pkt->pkt_reason == CMD_INCOMPLETE)
1153 1152 rval = FALSE;
1154 1153
1155 1154 /*
1156 1155 * If a reply frame was used and there is a reply buffer to copy the
1157 1156 * reply data into, copy it. If this fails, log a message, but don't
1158 1157 * fail the TM request.
1159 1158 */
1160 1159 if (cmd->cmd_rfm && reply) {
1161 1160 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
1162 1161 DDI_DMA_SYNC_FORCPU);
1163 1162 reply_msg = (pMPI2DefaultReply_t)
1164 1163 (mpt->m_reply_frame + (cmd->cmd_rfm -
1165 1164 mpt->m_reply_frame_dma_addr));
1166 1165 if (reply_size > sizeof (MPI2_SCSI_TASK_MANAGE_REPLY)) {
1167 1166 reply_size = sizeof (MPI2_SCSI_TASK_MANAGE_REPLY);
1168 1167 }
1169 1168 mutex_exit(&mpt->m_mutex);
1170 1169 for (i = 0; i < reply_size; i++) {
1171 1170 if (ddi_copyout((uint8_t *)reply_msg + i, reply + i, 1,
1172 1171 mode)) {
1173 1172 mptsas_log(mpt, CE_WARN, "failed to copy out "
1174 1173 "reply data for TM request");
1175 1174 break;
1176 1175 }
1177 1176 }
1178 1177 mutex_enter(&mpt->m_mutex);
1179 1178 }
1180 1179
1181 1180 /*
1182 1181 * clear the TM slot before returning
1183 1182 */
1184 1183 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = NULL;
1185 1184
1186 1185 /*
1187 1186 * If we lost our task management command
1188 1187 * we need to reset the ioc
1189 1188 */
1190 1189 if (rval == FALSE) {
1191 1190 mptsas_log(mpt, CE_WARN, "mptsas_ioc_task_management failed "
1192 1191 "try to reset ioc to recovery!");
1193 1192 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1194 1193 if (mptsas_restart_ioc(mpt)) {
1195 1194 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
1196 1195 rval = FAILED;
1197 1196 }
1198 1197 }
1199 1198
1200 1199 return (rval);
1201 1200 }
1202 1201
1203 1202 int
1204 1203 mptsas_update_flash(mptsas_t *mpt, caddr_t ptrbuffer, uint32_t size,
1205 1204 uint8_t type, int mode)
1206 1205 {
1207 1206
1208 1207 /*
1209 1208 * In order to avoid allocating variables on the stack,
1210 1209 * we make use of the pre-existing mptsas_cmd_t and
1211 1210 * scsi_pkt which are included in the mptsas_t which
1212 1211 * is passed to this routine.
1213 1212 */
1214 1213
1215 1214 ddi_dma_attr_t flsh_dma_attrs;
1216 1215 ddi_dma_cookie_t flsh_cookie;
1217 1216 ddi_dma_handle_t flsh_dma_handle;
1218 1217 ddi_acc_handle_t flsh_accessp;
1219 1218 caddr_t memp, flsh_memp;
1220 1219 uint32_t flagslength;
1221 1220 pMpi2FWDownloadRequest fwdownload;
1222 1221 pMpi2FWDownloadTCSGE_t tcsge;
1223 1222 pMpi2SGESimple64_t sge;
1224 1223 mptsas_cmd_t *cmd;
1225 1224 struct scsi_pkt *pkt;
1226 1225 int i;
1227 1226 int rvalue = 0;
1228 1227 uint32_t request_desc_low;
1229 1228
1230 1229 if ((rvalue = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
1231 1230 mptsas_log(mpt, CE_WARN, "mptsas_update_flash(): allocation "
1232 1231 "failed. event ack command pool is full\n");
1233 1232 return (rvalue);
1234 1233 }
1235 1234
1236 1235 bzero((caddr_t)cmd, sizeof (*cmd));
1237 1236 bzero((caddr_t)pkt, scsi_pkt_size());
1238 1237 cmd->ioc_cmd_slot = (uint32_t)rvalue;
1239 1238
1240 1239 /*
1241 1240 * dynamically create a customized dma attribute structure
1242 1241 * that describes the flash file.
1243 1242 */
1244 1243 flsh_dma_attrs = mpt->m_msg_dma_attr;
1245 1244 flsh_dma_attrs.dma_attr_sgllen = 1;
1246 1245
1247 1246 if (mptsas_dma_addr_create(mpt, flsh_dma_attrs, &flsh_dma_handle,
1248 1247 &flsh_accessp, &flsh_memp, size, &flsh_cookie) == FALSE) {
1249 1248 mptsas_log(mpt, CE_WARN,
1250 1249 "(unable to allocate dma resource.");
1251 1250 mptsas_return_to_pool(mpt, cmd);
1252 1251 return (-1);
1253 1252 }
1254 1253
1255 1254 bzero(flsh_memp, size);
1256 1255
1257 1256 for (i = 0; i < size; i++) {
1258 1257 (void) ddi_copyin(ptrbuffer + i, flsh_memp + i, 1, mode);
1259 1258 }
1260 1259 (void) ddi_dma_sync(flsh_dma_handle, 0, 0, DDI_DMA_SYNC_FORDEV);
1261 1260
1262 1261 /*
1263 1262 * form a cmd/pkt to store the fw download message
1264 1263 */
1265 1264 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0];
1266 1265 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb;
1267 1266 pkt->pkt_ha_private = (opaque_t)cmd;
1268 1267 pkt->pkt_flags = FLAG_HEAD;
1269 1268 pkt->pkt_time = 60;
1270 1269 cmd->cmd_pkt = pkt;
1271 1270 cmd->cmd_scblen = 1;
1272 1271 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_FW_CMD;
1273 1272
1274 1273 /*
1275 1274 * Save the command in a slot
1276 1275 */
1277 1276 if (mptsas_save_cmd(mpt, cmd) == FALSE) {
1278 1277 mptsas_dma_addr_destroy(&flsh_dma_handle, &flsh_accessp);
1279 1278 mptsas_return_to_pool(mpt, cmd);
1280 1279 return (-1);
1281 1280 }
1282 1281
1283 1282 /*
1284 1283 * Fill in fw download message
1285 1284 */
1286 1285 ASSERT(cmd->cmd_slot != 0);
1287 1286 memp = mpt->m_req_frame + (mpt->m_req_frame_size * cmd->cmd_slot);
1288 1287 bzero(memp, mpt->m_req_frame_size);
1289 1288 fwdownload = (void *)memp;
1290 1289 ddi_put8(mpt->m_acc_req_frame_hdl, &fwdownload->Function,
1291 1290 MPI2_FUNCTION_FW_DOWNLOAD);
1292 1291 ddi_put8(mpt->m_acc_req_frame_hdl, &fwdownload->ImageType, type);
1293 1292 ddi_put8(mpt->m_acc_req_frame_hdl, &fwdownload->MsgFlags,
1294 1293 MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT);
1295 1294 ddi_put32(mpt->m_acc_req_frame_hdl, &fwdownload->TotalImageSize, size);
1296 1295
1297 1296 tcsge = (pMpi2FWDownloadTCSGE_t)&fwdownload->SGL;
1298 1297 ddi_put8(mpt->m_acc_req_frame_hdl, &tcsge->ContextSize, 0);
1299 1298 ddi_put8(mpt->m_acc_req_frame_hdl, &tcsge->DetailsLength, 12);
1300 1299 ddi_put8(mpt->m_acc_req_frame_hdl, &tcsge->Flags, 0);
1301 1300 ddi_put32(mpt->m_acc_req_frame_hdl, &tcsge->ImageOffset, 0);
1302 1301 ddi_put32(mpt->m_acc_req_frame_hdl, &tcsge->ImageSize, size);
1303 1302
1304 1303 sge = (pMpi2SGESimple64_t)(tcsge + 1);
1305 1304 flagslength = size;
1306 1305 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
1307 1306 MPI2_SGE_FLAGS_END_OF_BUFFER |
1308 1307 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1309 1308 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
1310 1309 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1311 1310 MPI2_SGE_FLAGS_HOST_TO_IOC |
1312 1311 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
1313 1312 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->FlagsLength, flagslength);
1314 1313 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.Low,
1315 1314 flsh_cookie.dmac_address);
1316 1315 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.High,
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1317 1316 (uint32_t)(flsh_cookie.dmac_laddress >> 32));
1318 1317
1319 1318 /*
1320 1319 * Start command
1321 1320 */
1322 1321 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
1323 1322 DDI_DMA_SYNC_FORDEV);
1324 1323 request_desc_low = (cmd->cmd_slot << 16) +
1325 1324 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1326 1325 cmd->cmd_rfm = NULL;
1327 - mpt->m_active->m_slot[cmd->cmd_slot] = cmd;
1328 1326 MPTSAS_START_CMD(mpt, request_desc_low, 0);
1329 1327
1330 1328 rvalue = 0;
1331 1329 (void) cv_reltimedwait(&mpt->m_fw_cv, &mpt->m_mutex,
1332 1330 drv_usectohz(60 * MICROSEC), TR_CLOCK_TICK);
1333 1331 if (!(cmd->cmd_flags & CFLAG_FINISHED)) {
1334 1332 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1335 1333 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
1336 1334 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
1337 1335 }
1338 1336 rvalue = -1;
1339 1337 }
1340 1338 mptsas_remove_cmd(mpt, cmd);
1341 1339 mptsas_dma_addr_destroy(&flsh_dma_handle, &flsh_accessp);
1342 1340
1343 1341 return (rvalue);
1344 1342 }
1345 1343
1346 1344 static int
1347 1345 mptsas_sasdevpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1348 1346 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1349 1347 va_list ap)
1350 1348 {
1351 1349 #ifndef __lock_lint
1352 1350 _NOTE(ARGUNUSED(ap))
1353 1351 #endif
1354 1352 pMpi2SasDevicePage0_t sasdevpage;
1355 1353 int rval = DDI_SUCCESS, i;
1356 1354 uint8_t *sas_addr = NULL;
1357 1355 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1358 1356 uint16_t *devhdl, *bay_num, *enclosure;
1359 1357 uint64_t *sas_wwn;
1360 1358 uint32_t *dev_info;
1361 1359 uint8_t *physport, *phynum;
1362 1360 uint16_t *pdevhdl;
1363 1361 uint32_t page_address;
1364 1362
1365 1363 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1366 1364 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1367 1365 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_device_page0 "
1368 1366 "header: IOCStatus=0x%x, IOCLogInfo=0x%x",
1369 1367 iocstatus, iocloginfo);
1370 1368 rval = DDI_FAILURE;
1371 1369 return (rval);
1372 1370 }
1373 1371 page_address = va_arg(ap, uint32_t);
1374 1372 /*
1375 1373 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
1376 1374 * are no more pages. If everything is OK up to this point but the
1377 1375 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
1378 1376 * signal that device traversal is complete.
1379 1377 */
1380 1378 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
1381 1379 if ((page_address & MPI2_SAS_DEVICE_PGAD_FORM_MASK) ==
1382 1380 MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE) {
1383 1381 mpt->m_done_traverse_dev = 1;
1384 1382 }
1385 1383 rval = DDI_FAILURE;
1386 1384 return (rval);
1387 1385 }
1388 1386 devhdl = va_arg(ap, uint16_t *);
1389 1387 sas_wwn = va_arg(ap, uint64_t *);
1390 1388 dev_info = va_arg(ap, uint32_t *);
1391 1389 physport = va_arg(ap, uint8_t *);
1392 1390 phynum = va_arg(ap, uint8_t *);
1393 1391 pdevhdl = va_arg(ap, uint16_t *);
1394 1392 bay_num = va_arg(ap, uint16_t *);
1395 1393 enclosure = va_arg(ap, uint16_t *);
1396 1394
1397 1395
1398 1396 sasdevpage = (pMpi2SasDevicePage0_t)page_memp;
1399 1397
1400 1398 *dev_info = ddi_get32(accessp, &sasdevpage->DeviceInfo);
1401 1399 *devhdl = ddi_get16(accessp, &sasdevpage->DevHandle);
1402 1400 sas_addr = (uint8_t *)(&sasdevpage->SASAddress);
1403 1401 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1404 1402 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1405 1403 }
1406 1404 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1407 1405 *sas_wwn = LE_64(*sas_wwn);
1408 1406 *physport = ddi_get8(accessp, &sasdevpage->PhysicalPort);
1409 1407 *phynum = ddi_get8(accessp, &sasdevpage->PhyNum);
1410 1408 *pdevhdl = ddi_get16(accessp, &sasdevpage->ParentDevHandle);
1411 1409 *bay_num = ddi_get16(accessp, &sasdevpage->Slot);
1412 1410 *enclosure = ddi_get16(accessp, &sasdevpage->EnclosureHandle);
1413 1411 return (rval);
1414 1412 }
1415 1413
1416 1414 /*
1417 1415 * Request MPI configuration page SAS device page 0 to get DevHandle, device
1418 1416 * info and SAS address.
1419 1417 */
1420 1418 int
1421 1419 mptsas_get_sas_device_page0(mptsas_t *mpt, uint32_t page_address,
1422 1420 uint16_t *dev_handle, uint64_t *sas_wwn, uint32_t *dev_info,
1423 1421 uint8_t *physport, uint8_t *phynum, uint16_t *pdev_handle,
1424 1422 uint16_t *bay_num, uint16_t *enclosure)
1425 1423 {
1426 1424 int rval = DDI_SUCCESS;
1427 1425
1428 1426 ASSERT(mutex_owned(&mpt->m_mutex));
1429 1427
1430 1428 /*
1431 1429 * Get the header and config page. reply contains the reply frame,
1432 1430 * which holds status info for the request.
1433 1431 */
1434 1432 rval = mptsas_access_config_page(mpt,
1435 1433 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1436 1434 MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE, 0, page_address,
1437 1435 mptsas_sasdevpage_0_cb, page_address, dev_handle, sas_wwn,
1438 1436 dev_info, physport, phynum, pdev_handle,
1439 1437 bay_num, enclosure);
1440 1438
1441 1439 return (rval);
1442 1440 }
1443 1441
1444 1442 static int
1445 1443 mptsas_sasexpdpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1446 1444 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1447 1445 va_list ap)
1448 1446 {
1449 1447 #ifndef __lock_lint
1450 1448 _NOTE(ARGUNUSED(ap))
1451 1449 #endif
1452 1450 pMpi2ExpanderPage0_t expddevpage;
1453 1451 int rval = DDI_SUCCESS, i;
1454 1452 uint8_t *sas_addr = NULL;
1455 1453 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1456 1454 uint16_t *devhdl;
1457 1455 uint64_t *sas_wwn;
1458 1456 uint8_t physport;
1459 1457 mptsas_phymask_t *phymask;
1460 1458 uint16_t *pdevhdl;
1461 1459 uint32_t page_address;
1462 1460
1463 1461 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1464 1462 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1465 1463 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page0 "
1466 1464 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1467 1465 iocstatus, iocloginfo);
1468 1466 rval = DDI_FAILURE;
1469 1467 return (rval);
1470 1468 }
1471 1469 page_address = va_arg(ap, uint32_t);
1472 1470 /*
1473 1471 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
1474 1472 * are no more pages. If everything is OK up to this point but the
1475 1473 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
1476 1474 * signal that device traversal is complete.
1477 1475 */
1478 1476 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
1479 1477 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
1480 1478 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
1481 1479 mpt->m_done_traverse_smp = 1;
1482 1480 }
1483 1481 rval = DDI_FAILURE;
1484 1482 return (rval);
1485 1483 }
1486 1484 devhdl = va_arg(ap, uint16_t *);
1487 1485 sas_wwn = va_arg(ap, uint64_t *);
1488 1486 phymask = va_arg(ap, mptsas_phymask_t *);
1489 1487 pdevhdl = va_arg(ap, uint16_t *);
1490 1488
1491 1489 expddevpage = (pMpi2ExpanderPage0_t)page_memp;
1492 1490
1493 1491 *devhdl = ddi_get16(accessp, &expddevpage->DevHandle);
1494 1492 physport = ddi_get8(accessp, &expddevpage->PhysicalPort);
1495 1493 *phymask = mptsas_physport_to_phymask(mpt, physport);
1496 1494 *pdevhdl = ddi_get16(accessp, &expddevpage->ParentDevHandle);
1497 1495 sas_addr = (uint8_t *)(&expddevpage->SASAddress);
1498 1496 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1499 1497 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1500 1498 }
1501 1499 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1502 1500 *sas_wwn = LE_64(*sas_wwn);
1503 1501
1504 1502 return (rval);
1505 1503 }
1506 1504
1507 1505 /*
1508 1506 * Request MPI configuration page SAS device page 0 to get DevHandle, phymask
1509 1507 * and SAS address.
1510 1508 */
1511 1509 int
1512 1510 mptsas_get_sas_expander_page0(mptsas_t *mpt, uint32_t page_address,
1513 1511 mptsas_smp_t *info)
1514 1512 {
1515 1513 int rval = DDI_SUCCESS;
1516 1514
1517 1515 ASSERT(mutex_owned(&mpt->m_mutex));
1518 1516
1519 1517 /*
1520 1518 * Get the header and config page. reply contains the reply frame,
1521 1519 * which holds status info for the request.
1522 1520 */
1523 1521 rval = mptsas_access_config_page(mpt,
1524 1522 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1525 1523 MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER, 0, page_address,
1526 1524 mptsas_sasexpdpage_0_cb, page_address, &info->m_devhdl,
1527 1525 &info->m_sasaddr, &info->m_phymask, &info->m_pdevhdl);
1528 1526
1529 1527 return (rval);
1530 1528 }
1531 1529
1532 1530 static int
1533 1531 mptsas_sasportpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1534 1532 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1535 1533 va_list ap)
1536 1534 {
1537 1535 #ifndef __lock_lint
1538 1536 _NOTE(ARGUNUSED(ap))
1539 1537 #endif
1540 1538 int rval = DDI_SUCCESS, i;
1541 1539 uint8_t *sas_addr = NULL;
1542 1540 uint64_t *sas_wwn;
1543 1541 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1544 1542 uint8_t *portwidth;
1545 1543 pMpi2SasPortPage0_t sasportpage;
1546 1544
1547 1545 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1548 1546 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_port_page0 "
1549 1547 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1550 1548 iocstatus, iocloginfo);
1551 1549 rval = DDI_FAILURE;
1552 1550 return (rval);
1553 1551 }
1554 1552 sas_wwn = va_arg(ap, uint64_t *);
1555 1553 portwidth = va_arg(ap, uint8_t *);
1556 1554
1557 1555 sasportpage = (pMpi2SasPortPage0_t)page_memp;
1558 1556 sas_addr = (uint8_t *)(&sasportpage->SASAddress);
1559 1557 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1560 1558 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1561 1559 }
1562 1560 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1563 1561 *sas_wwn = LE_64(*sas_wwn);
1564 1562 *portwidth = ddi_get8(accessp, &sasportpage->PortWidth);
1565 1563 return (rval);
1566 1564 }
1567 1565
1568 1566 /*
1569 1567 * Request MPI configuration page SAS port page 0 to get initiator SAS address
1570 1568 * and port width.
1571 1569 */
1572 1570 int
1573 1571 mptsas_get_sas_port_page0(mptsas_t *mpt, uint32_t page_address,
1574 1572 uint64_t *sas_wwn, uint8_t *portwidth)
1575 1573 {
1576 1574 int rval = DDI_SUCCESS;
1577 1575
1578 1576 ASSERT(mutex_owned(&mpt->m_mutex));
1579 1577
1580 1578 /*
1581 1579 * Get the header and config page. reply contains the reply frame,
1582 1580 * which holds status info for the request.
1583 1581 */
1584 1582 rval = mptsas_access_config_page(mpt,
1585 1583 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1586 1584 MPI2_CONFIG_EXTPAGETYPE_SAS_PORT, 0, page_address,
1587 1585 mptsas_sasportpage_0_cb, sas_wwn, portwidth);
1588 1586
1589 1587 return (rval);
1590 1588 }
1591 1589
1592 1590 static int
1593 1591 mptsas_sasiou_page_0_cb(mptsas_t *mpt, caddr_t page_memp,
1594 1592 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1595 1593 va_list ap)
1596 1594 {
1597 1595 #ifndef __lock_lint
1598 1596 _NOTE(ARGUNUSED(ap))
1599 1597 #endif
1600 1598 int rval = DDI_SUCCESS;
1601 1599 pMpi2SasIOUnitPage0_t sasioupage0;
1602 1600 int i, num_phys;
1603 1601 uint32_t cpdi[MPTSAS_MAX_PHYS], *retrypage0, *readpage1;
1604 1602 uint8_t port_flags;
1605 1603
1606 1604 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1607 1605 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page0 "
1608 1606 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1609 1607 iocstatus, iocloginfo);
1610 1608 rval = DDI_FAILURE;
1611 1609 return (rval);
1612 1610 }
1613 1611 readpage1 = va_arg(ap, uint32_t *);
1614 1612 retrypage0 = va_arg(ap, uint32_t *);
1615 1613
1616 1614 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp;
1617 1615
1618 1616 num_phys = ddi_get8(accessp, &sasioupage0->NumPhys);
1619 1617 /*
1620 1618 * ASSERT that the num_phys value in SAS IO Unit Page 0 is the same as
1621 1619 * was initially set. This should never change throughout the life of
1622 1620 * the driver.
1623 1621 */
1624 1622 ASSERT(num_phys == mpt->m_num_phys);
1625 1623 for (i = 0; i < num_phys; i++) {
1626 1624 cpdi[i] = ddi_get32(accessp,
1627 1625 &sasioupage0->PhyData[i].
1628 1626 ControllerPhyDeviceInfo);
1629 1627 port_flags = ddi_get8(accessp,
1630 1628 &sasioupage0->PhyData[i].PortFlags);
1631 1629 mpt->m_phy_info[i].port_num =
1632 1630 ddi_get8(accessp,
1633 1631 &sasioupage0->PhyData[i].Port);
1634 1632 mpt->m_phy_info[i].ctrl_devhdl =
1635 1633 ddi_get16(accessp, &sasioupage0->
1636 1634 PhyData[i].ControllerDevHandle);
1637 1635 mpt->m_phy_info[i].attached_devhdl =
1638 1636 ddi_get16(accessp, &sasioupage0->
1639 1637 PhyData[i].AttachedDevHandle);
1640 1638 mpt->m_phy_info[i].phy_device_type = cpdi[i];
1641 1639 mpt->m_phy_info[i].port_flags = port_flags;
1642 1640
1643 1641 if (port_flags & DISCOVERY_IN_PROGRESS) {
1644 1642 *retrypage0 = *retrypage0 + 1;
1645 1643 break;
1646 1644 } else {
1647 1645 *retrypage0 = 0;
1648 1646 }
1649 1647 if (!(port_flags & AUTO_PORT_CONFIGURATION)) {
1650 1648 /*
1651 1649 * some PHY configuration described in
1652 1650 * SAS IO Unit Page1
1653 1651 */
1654 1652 *readpage1 = 1;
1655 1653 }
1656 1654 }
1657 1655
1658 1656 return (rval);
1659 1657 }
1660 1658
1661 1659 static int
1662 1660 mptsas_sasiou_page_1_cb(mptsas_t *mpt, caddr_t page_memp,
1663 1661 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1664 1662 va_list ap)
1665 1663 {
1666 1664 #ifndef __lock_lint
1667 1665 _NOTE(ARGUNUSED(ap))
1668 1666 #endif
1669 1667 int rval = DDI_SUCCESS;
1670 1668 pMpi2SasIOUnitPage1_t sasioupage1;
1671 1669 int i, num_phys;
1672 1670 uint32_t cpdi[MPTSAS_MAX_PHYS];
1673 1671 uint8_t port_flags;
1674 1672
1675 1673 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1676 1674 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page1 "
1677 1675 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1678 1676 iocstatus, iocloginfo);
1679 1677 rval = DDI_FAILURE;
1680 1678 return (rval);
1681 1679 }
1682 1680
1683 1681 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp;
1684 1682 num_phys = ddi_get8(accessp, &sasioupage1->NumPhys);
1685 1683 /*
1686 1684 * ASSERT that the num_phys value in SAS IO Unit Page 1 is the same as
1687 1685 * was initially set. This should never change throughout the life of
1688 1686 * the driver.
1689 1687 */
1690 1688 ASSERT(num_phys == mpt->m_num_phys);
1691 1689 for (i = 0; i < num_phys; i++) {
1692 1690 cpdi[i] = ddi_get32(accessp, &sasioupage1->PhyData[i].
1693 1691 ControllerPhyDeviceInfo);
1694 1692 port_flags = ddi_get8(accessp,
1695 1693 &sasioupage1->PhyData[i].PortFlags);
1696 1694 mpt->m_phy_info[i].port_num =
1697 1695 ddi_get8(accessp,
1698 1696 &sasioupage1->PhyData[i].Port);
1699 1697 mpt->m_phy_info[i].port_flags = port_flags;
1700 1698 mpt->m_phy_info[i].phy_device_type = cpdi[i];
1701 1699 }
1702 1700 return (rval);
1703 1701 }
1704 1702
1705 1703 /*
1706 1704 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit
1707 1705 * page1 to update the PHY information. This is the message passing method of
1708 1706 * this function which should be called except during initialization.
1709 1707 */
1710 1708 int
1711 1709 mptsas_get_sas_io_unit_page(mptsas_t *mpt)
1712 1710 {
1713 1711 int rval = DDI_SUCCESS, state;
1714 1712 uint32_t readpage1 = 0, retrypage0 = 0;
1715 1713
1716 1714 ASSERT(mutex_owned(&mpt->m_mutex));
1717 1715
1718 1716 /*
1719 1717 * Now we cycle through the state machine. Here's what happens:
1720 1718 * 1. Read IO unit page 0 and set phy information
1721 1719 * 2. See if Read IO unit page1 is needed because of port configuration
1722 1720 * 3. Read IO unit page 1 and update phy information.
1723 1721 */
1724 1722 state = IOUC_READ_PAGE0;
1725 1723 while (state != IOUC_DONE) {
1726 1724 if (state == IOUC_READ_PAGE0) {
1727 1725 rval = mptsas_access_config_page(mpt,
1728 1726 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1729 1727 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, 0,
1730 1728 mptsas_sasiou_page_0_cb, &readpage1,
1731 1729 &retrypage0);
1732 1730 } else if (state == IOUC_READ_PAGE1) {
1733 1731 rval = mptsas_access_config_page(mpt,
1734 1732 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1735 1733 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 1, 0,
1736 1734 mptsas_sasiou_page_1_cb);
1737 1735 }
1738 1736
1739 1737 if (rval == DDI_SUCCESS) {
1740 1738 switch (state) {
1741 1739 case IOUC_READ_PAGE0:
1742 1740 /*
1743 1741 * retry 30 times if discovery is in process
1744 1742 */
1745 1743 if (retrypage0 && (retrypage0 < 30)) {
1746 1744 drv_usecwait(1000 * 100);
1747 1745 state = IOUC_READ_PAGE0;
1748 1746 break;
1749 1747 } else if (retrypage0 == 30) {
1750 1748 mptsas_log(mpt, CE_WARN,
1751 1749 "!Discovery in progress, can't "
1752 1750 "verify IO unit config, then "
1753 1751 "after 30 times retry, give "
1754 1752 "up!");
1755 1753 state = IOUC_DONE;
1756 1754 rval = DDI_FAILURE;
1757 1755 break;
1758 1756 }
1759 1757
1760 1758 if (readpage1 == 0) {
1761 1759 state = IOUC_DONE;
1762 1760 rval = DDI_SUCCESS;
1763 1761 break;
1764 1762 }
1765 1763
1766 1764 state = IOUC_READ_PAGE1;
1767 1765 break;
1768 1766
1769 1767 case IOUC_READ_PAGE1:
1770 1768 state = IOUC_DONE;
1771 1769 rval = DDI_SUCCESS;
1772 1770 break;
1773 1771 }
1774 1772 } else {
1775 1773 return (rval);
1776 1774 }
1777 1775 }
1778 1776
1779 1777 return (rval);
1780 1778 }
1781 1779
1782 1780 static int
1783 1781 mptsas_biospage_3_cb(mptsas_t *mpt, caddr_t page_memp,
1784 1782 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1785 1783 va_list ap)
1786 1784 {
1787 1785 #ifndef __lock_lint
1788 1786 _NOTE(ARGUNUSED(ap))
1789 1787 #endif
1790 1788 pMpi2BiosPage3_t sasbiospage;
1791 1789 int rval = DDI_SUCCESS;
1792 1790 uint32_t *bios_version;
1793 1791
1794 1792 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1795 1793 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1796 1794 mptsas_log(mpt, CE_WARN, "mptsas_get_bios_page3 header: "
1797 1795 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus, iocloginfo);
1798 1796 rval = DDI_FAILURE;
1799 1797 return (rval);
1800 1798 }
1801 1799 bios_version = va_arg(ap, uint32_t *);
1802 1800 sasbiospage = (pMpi2BiosPage3_t)page_memp;
1803 1801 *bios_version = ddi_get32(accessp, &sasbiospage->BiosVersion);
1804 1802
1805 1803 return (rval);
1806 1804 }
1807 1805
1808 1806 /*
1809 1807 * Request MPI configuration page BIOS page 3 to get BIOS version. Since all
1810 1808 * other information in this page is not needed, just ignore it.
1811 1809 */
1812 1810 int
1813 1811 mptsas_get_bios_page3(mptsas_t *mpt, uint32_t *bios_version)
1814 1812 {
1815 1813 int rval = DDI_SUCCESS;
1816 1814
1817 1815 ASSERT(mutex_owned(&mpt->m_mutex));
1818 1816
1819 1817 /*
1820 1818 * Get the header and config page. reply contains the reply frame,
1821 1819 * which holds status info for the request.
1822 1820 */
1823 1821 rval = mptsas_access_config_page(mpt,
1824 1822 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, MPI2_CONFIG_PAGETYPE_BIOS, 3,
1825 1823 0, mptsas_biospage_3_cb, bios_version);
1826 1824
1827 1825 return (rval);
1828 1826 }
1829 1827
1830 1828 /*
1831 1829 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit
1832 1830 * page1 to update the PHY information. This is the handshaking version of
1833 1831 * this function, which should be called during initialization only.
1834 1832 */
1835 1833 int
1836 1834 mptsas_get_sas_io_unit_page_hndshk(mptsas_t *mpt)
1837 1835 {
1838 1836 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
1839 1837 ddi_dma_cookie_t page_cookie;
1840 1838 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
1841 1839 ddi_acc_handle_t recv_accessp, page_accessp;
1842 1840 pMpi2ConfigReply_t configreply;
1843 1841 pMpi2SasIOUnitPage0_t sasioupage0;
1844 1842 pMpi2SasIOUnitPage1_t sasioupage1;
1845 1843 int recv_numbytes;
1846 1844 caddr_t recv_memp, page_memp;
1847 1845 int i, num_phys, start_phy = 0;
1848 1846 int page0_size =
1849 1847 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_0) +
1850 1848 (sizeof (MPI2_SAS_IO_UNIT0_PHY_DATA) * (MPTSAS_MAX_PHYS - 1));
1851 1849 int page1_size =
1852 1850 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_1) +
1853 1851 (sizeof (MPI2_SAS_IO_UNIT1_PHY_DATA) * (MPTSAS_MAX_PHYS - 1));
1854 1852 uint32_t flags_length;
1855 1853 uint32_t cpdi[MPTSAS_MAX_PHYS];
1856 1854 uint32_t readpage1 = 0, retrypage0 = 0;
1857 1855 uint16_t iocstatus;
1858 1856 uint8_t port_flags, page_number, action;
1859 1857 uint32_t reply_size = 256; /* Big enough for any page */
1860 1858 uint_t state;
1861 1859 int rval = DDI_FAILURE;
1862 1860
1863 1861 /*
1864 1862 * Initialize our "state machine". This is a bit convoluted,
1865 1863 * but it keeps us from having to do the ddi allocations numerous
1866 1864 * times.
1867 1865 */
1868 1866
1869 1867 NDBG20(("mptsas_get_sas_io_unit_page_hndshk enter"));
1870 1868 ASSERT(mutex_owned(&mpt->m_mutex));
1871 1869 state = IOUC_READ_PAGE0;
1872 1870
1873 1871 /*
1874 1872 * dynamically create a customized dma attribute structure
1875 1873 * that describes mpt's config reply page request structure.
1876 1874 */
1877 1875 recv_dma_attrs = mpt->m_msg_dma_attr;
1878 1876 recv_dma_attrs.dma_attr_sgllen = 1;
1879 1877 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
1880 1878
1881 1879 if (mptsas_dma_addr_create(mpt, recv_dma_attrs,
1882 1880 &recv_dma_handle, &recv_accessp, &recv_memp,
1883 1881 (sizeof (MPI2_CONFIG_REPLY)), NULL) == FALSE) {
1884 1882 mptsas_log(mpt, CE_WARN,
1885 1883 "mptsas_get_sas_io_unit_page_hndshk: recv dma failed");
1886 1884 goto cleanup;
1887 1885 }
1888 1886
1889 1887 page_dma_attrs = mpt->m_msg_dma_attr;
1890 1888 page_dma_attrs.dma_attr_sgllen = 1;
1891 1889 page_dma_attrs.dma_attr_granular = reply_size;
1892 1890
1893 1891 if (mptsas_dma_addr_create(mpt, page_dma_attrs,
1894 1892 &page_dma_handle, &page_accessp, &page_memp,
1895 1893 reply_size, &page_cookie) == FALSE) {
1896 1894 mptsas_log(mpt, CE_WARN,
1897 1895 "mptsas_get_sas_io_unit_page_hndshk: page dma failed");
1898 1896 goto cleanup;
1899 1897 }
1900 1898
1901 1899 /*
1902 1900 * Now we cycle through the state machine. Here's what happens:
1903 1901 * 1. Read IO unit page 0 and set phy information
1904 1902 * 2. See if Read IO unit page1 is needed because of port configuration
1905 1903 * 3. Read IO unit page 1 and update phy information.
1906 1904 */
1907 1905
1908 1906 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp;
1909 1907 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp;
1910 1908
1911 1909 while (state != IOUC_DONE) {
1912 1910 switch (state) {
1913 1911 case IOUC_READ_PAGE0:
1914 1912 page_number = 0;
1915 1913 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1916 1914 flags_length = (uint32_t)page0_size;
1917 1915 flags_length |= ((uint32_t)(
1918 1916 MPI2_SGE_FLAGS_LAST_ELEMENT |
1919 1917 MPI2_SGE_FLAGS_END_OF_BUFFER |
1920 1918 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1921 1919 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
1922 1920 MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1923 1921 MPI2_SGE_FLAGS_IOC_TO_HOST |
1924 1922 MPI2_SGE_FLAGS_END_OF_LIST) <<
1925 1923 MPI2_SGE_FLAGS_SHIFT);
1926 1924
1927 1925 break;
1928 1926
1929 1927 case IOUC_READ_PAGE1:
1930 1928 page_number = 1;
1931 1929 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1932 1930 flags_length = (uint32_t)page1_size;
1933 1931 flags_length |= ((uint32_t)(
1934 1932 MPI2_SGE_FLAGS_LAST_ELEMENT |
1935 1933 MPI2_SGE_FLAGS_END_OF_BUFFER |
1936 1934 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1937 1935 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
1938 1936 MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1939 1937 MPI2_SGE_FLAGS_IOC_TO_HOST |
1940 1938 MPI2_SGE_FLAGS_END_OF_LIST) <<
1941 1939 MPI2_SGE_FLAGS_SHIFT);
1942 1940
1943 1941 break;
1944 1942 default:
1945 1943 break;
1946 1944 }
1947 1945
1948 1946 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
1949 1947 configreply = (pMpi2ConfigReply_t)recv_memp;
1950 1948 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
1951 1949
1952 1950 if (mptsas_send_extended_config_request_msg(mpt,
1953 1951 MPI2_CONFIG_ACTION_PAGE_HEADER,
1954 1952 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT,
1955 1953 0, page_number, 0, 0, 0, 0)) {
1956 1954 goto cleanup;
1957 1955 }
1958 1956
1959 1957 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
1960 1958 recv_accessp)) {
1961 1959 goto cleanup;
1962 1960 }
1963 1961
1964 1962 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus);
1965 1963 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
1966 1964
1967 1965 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1968 1966 mptsas_log(mpt, CE_WARN,
1969 1967 "mptsas_get_sas_io_unit_page_hndshk: read page "
1970 1968 "header iocstatus = 0x%x", iocstatus);
1971 1969 goto cleanup;
1972 1970 }
1973 1971
1974 1972 if (action != MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
1975 1973 bzero(page_memp, reply_size);
1976 1974 }
1977 1975
1978 1976 if (mptsas_send_extended_config_request_msg(mpt, action,
1979 1977 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, page_number,
1980 1978 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
1981 1979 ddi_get16(recv_accessp, &configreply->ExtPageLength),
1982 1980 flags_length, page_cookie.dmac_address)) {
1983 1981 goto cleanup;
1984 1982 }
1985 1983
1986 1984 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
1987 1985 recv_accessp)) {
1988 1986 goto cleanup;
1989 1987 }
1990 1988
1991 1989 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus);
1992 1990 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
1993 1991
1994 1992 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1995 1993 mptsas_log(mpt, CE_WARN,
1996 1994 "mptsas_get_sas_io_unit_page_hndshk: IO unit "
1997 1995 "config failed for action %d, iocstatus = 0x%x",
1998 1996 action, iocstatus);
1999 1997 goto cleanup;
2000 1998 }
2001 1999
2002 2000 switch (state) {
2003 2001 case IOUC_READ_PAGE0:
2004 2002 if ((ddi_dma_sync(page_dma_handle, 0, 0,
2005 2003 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) {
2006 2004 goto cleanup;
2007 2005 }
2008 2006
2009 2007 num_phys = ddi_get8(page_accessp,
2010 2008 &sasioupage0->NumPhys);
2011 2009 ASSERT(num_phys == mpt->m_num_phys);
2012 2010 if (num_phys > MPTSAS_MAX_PHYS) {
2013 2011 mptsas_log(mpt, CE_WARN, "Number of phys "
2014 2012 "supported by HBA (%d) is more than max "
2015 2013 "supported by driver (%d). Driver will "
2016 2014 "not attach.", num_phys,
2017 2015 MPTSAS_MAX_PHYS);
2018 2016 rval = DDI_FAILURE;
2019 2017 goto cleanup;
2020 2018 }
2021 2019 for (i = start_phy; i < num_phys; i++, start_phy = i) {
2022 2020 cpdi[i] = ddi_get32(page_accessp,
2023 2021 &sasioupage0->PhyData[i].
2024 2022 ControllerPhyDeviceInfo);
2025 2023 port_flags = ddi_get8(page_accessp,
2026 2024 &sasioupage0->PhyData[i].PortFlags);
2027 2025
2028 2026 mpt->m_phy_info[i].port_num =
2029 2027 ddi_get8(page_accessp,
2030 2028 &sasioupage0->PhyData[i].Port);
2031 2029 mpt->m_phy_info[i].ctrl_devhdl =
2032 2030 ddi_get16(page_accessp, &sasioupage0->
2033 2031 PhyData[i].ControllerDevHandle);
2034 2032 mpt->m_phy_info[i].attached_devhdl =
2035 2033 ddi_get16(page_accessp, &sasioupage0->
2036 2034 PhyData[i].AttachedDevHandle);
2037 2035 mpt->m_phy_info[i].phy_device_type = cpdi[i];
2038 2036 mpt->m_phy_info[i].port_flags = port_flags;
2039 2037
2040 2038 if (port_flags & DISCOVERY_IN_PROGRESS) {
2041 2039 retrypage0++;
2042 2040 NDBG20(("Discovery in progress, can't "
2043 2041 "verify IO unit config, then NO.%d"
2044 2042 " times retry", retrypage0));
2045 2043 break;
2046 2044 } else {
2047 2045 retrypage0 = 0;
2048 2046 }
2049 2047 if (!(port_flags & AUTO_PORT_CONFIGURATION)) {
2050 2048 /*
2051 2049 * some PHY configuration described in
2052 2050 * SAS IO Unit Page1
2053 2051 */
2054 2052 readpage1 = 1;
2055 2053 }
2056 2054 }
2057 2055
2058 2056 /*
2059 2057 * retry 30 times if discovery is in process
2060 2058 */
2061 2059 if (retrypage0 && (retrypage0 < 30)) {
2062 2060 drv_usecwait(1000 * 100);
2063 2061 state = IOUC_READ_PAGE0;
2064 2062 break;
2065 2063 } else if (retrypage0 == 30) {
2066 2064 mptsas_log(mpt, CE_WARN,
2067 2065 "!Discovery in progress, can't "
2068 2066 "verify IO unit config, then after"
2069 2067 " 30 times retry, give up!");
2070 2068 state = IOUC_DONE;
2071 2069 rval = DDI_FAILURE;
2072 2070 break;
2073 2071 }
2074 2072
2075 2073 if (readpage1 == 0) {
2076 2074 state = IOUC_DONE;
2077 2075 rval = DDI_SUCCESS;
2078 2076 break;
2079 2077 }
2080 2078
2081 2079 state = IOUC_READ_PAGE1;
2082 2080 break;
2083 2081
2084 2082 case IOUC_READ_PAGE1:
2085 2083 if ((ddi_dma_sync(page_dma_handle, 0, 0,
2086 2084 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) {
2087 2085 goto cleanup;
2088 2086 }
2089 2087
2090 2088 num_phys = ddi_get8(page_accessp,
2091 2089 &sasioupage1->NumPhys);
2092 2090 ASSERT(num_phys == mpt->m_num_phys);
2093 2091 if (num_phys > MPTSAS_MAX_PHYS) {
2094 2092 mptsas_log(mpt, CE_WARN, "Number of phys "
2095 2093 "supported by HBA (%d) is more than max "
2096 2094 "supported by driver (%d). Driver will "
2097 2095 "not attach.", num_phys,
2098 2096 MPTSAS_MAX_PHYS);
2099 2097 rval = DDI_FAILURE;
2100 2098 goto cleanup;
2101 2099 }
2102 2100 for (i = 0; i < num_phys; i++) {
2103 2101 cpdi[i] = ddi_get32(page_accessp,
2104 2102 &sasioupage1->PhyData[i].
2105 2103 ControllerPhyDeviceInfo);
2106 2104 port_flags = ddi_get8(page_accessp,
2107 2105 &sasioupage1->PhyData[i].PortFlags);
2108 2106 mpt->m_phy_info[i].port_num =
2109 2107 ddi_get8(page_accessp,
2110 2108 &sasioupage1->PhyData[i].Port);
2111 2109 mpt->m_phy_info[i].port_flags = port_flags;
2112 2110 mpt->m_phy_info[i].phy_device_type = cpdi[i];
2113 2111
2114 2112 }
2115 2113
2116 2114 state = IOUC_DONE;
2117 2115 rval = DDI_SUCCESS;
2118 2116 break;
2119 2117 }
2120 2118 }
2121 2119 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2122 2120 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2123 2121 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2124 2122 rval = DDI_FAILURE;
2125 2123 goto cleanup;
2126 2124 }
2127 2125 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2128 2126 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2129 2127 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2130 2128 rval = DDI_FAILURE;
2131 2129 goto cleanup;
2132 2130 }
2133 2131
2134 2132 cleanup:
2135 2133 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2136 2134 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2137 2135 if (rval != DDI_SUCCESS) {
2138 2136 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
2139 2137 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
2140 2138 }
2141 2139 return (rval);
2142 2140 }
2143 2141
2144 2142 /*
2145 2143 * mptsas_get_manufacture_page5
2146 2144 *
2147 2145 * This function will retrieve the base WWID from the adapter. Since this
2148 2146 * function is only called during the initialization process, use handshaking.
2149 2147 */
2150 2148 int
2151 2149 mptsas_get_manufacture_page5(mptsas_t *mpt)
2152 2150 {
2153 2151 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
2154 2152 ddi_dma_cookie_t page_cookie;
2155 2153 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
2156 2154 ddi_acc_handle_t recv_accessp, page_accessp;
2157 2155 pMpi2ConfigReply_t configreply;
2158 2156 caddr_t recv_memp, page_memp;
2159 2157 int recv_numbytes;
2160 2158 pMpi2ManufacturingPage5_t m5;
2161 2159 uint32_t flagslength;
2162 2160 int rval = DDI_SUCCESS;
2163 2161 uint_t iocstatus;
2164 2162
2165 2163 MPTSAS_DISABLE_INTR(mpt);
2166 2164
2167 2165 if (mptsas_send_config_request_msg(mpt, MPI2_CONFIG_ACTION_PAGE_HEADER,
2168 2166 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5, 0, 0, 0, 0)) {
2169 2167 rval = DDI_FAILURE;
2170 2168 goto done;
2171 2169 }
2172 2170
2173 2171 /*
2174 2172 * dynamically create a customized dma attribute structure
2175 2173 * that describes the MPT's config reply page request structure.
2176 2174 */
2177 2175 recv_dma_attrs = mpt->m_msg_dma_attr;
2178 2176 recv_dma_attrs.dma_attr_sgllen = 1;
2179 2177 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
2180 2178
2181 2179 if (mptsas_dma_addr_create(mpt, recv_dma_attrs,
2182 2180 &recv_dma_handle, &recv_accessp, &recv_memp,
2183 2181 (sizeof (MPI2_CONFIG_REPLY)), NULL) == FALSE) {
2184 2182 goto done;
2185 2183 }
2186 2184
2187 2185 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2188 2186 configreply = (pMpi2ConfigReply_t)recv_memp;
2189 2187 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2190 2188
2191 2189 /*
2192 2190 * get config reply message
2193 2191 */
2194 2192 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2195 2193 recv_accessp)) {
2196 2194 rval = DDI_FAILURE;
2197 2195 goto done;
2198 2196 }
2199 2197
2200 2198 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2201 2199 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 update: "
2202 2200 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2203 2201 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2204 2202 goto done;
2205 2203 }
2206 2204
2207 2205 /*
2208 2206 * dynamically create a customized dma attribute structure
2209 2207 * that describes the MPT's config page structure.
2210 2208 */
2211 2209 page_dma_attrs = mpt->m_msg_dma_attr;
2212 2210 page_dma_attrs.dma_attr_sgllen = 1;
2213 2211 page_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_PAGE_MAN_5));
2214 2212
2215 2213 if (mptsas_dma_addr_create(mpt, page_dma_attrs, &page_dma_handle,
2216 2214 &page_accessp, &page_memp, (sizeof (MPI2_CONFIG_PAGE_MAN_5)),
2217 2215 &page_cookie) == FALSE) {
2218 2216 goto done;
2219 2217 }
2220 2218 bzero(page_memp, sizeof (MPI2_CONFIG_PAGE_MAN_5));
2221 2219 m5 = (pMpi2ManufacturingPage5_t)page_memp;
2222 2220
2223 2221 /*
2224 2222 * Give reply address to IOC to store config page in and send
2225 2223 * config request out.
2226 2224 */
2227 2225
2228 2226 flagslength = sizeof (MPI2_CONFIG_PAGE_MAN_5);
2229 2227 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
2230 2228 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2231 2229 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
2232 2230 MPI2_SGE_FLAGS_IOC_TO_HOST |
2233 2231 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
2234 2232
2235 2233 if (mptsas_send_config_request_msg(mpt,
2236 2234 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2237 2235 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5,
2238 2236 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2239 2237 ddi_get8(recv_accessp, &configreply->Header.PageLength),
2240 2238 flagslength, page_cookie.dmac_address)) {
2241 2239 rval = DDI_FAILURE;
2242 2240 goto done;
2243 2241 }
2244 2242
2245 2243 /*
2246 2244 * get reply view handshake
2247 2245 */
2248 2246 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2249 2247 recv_accessp)) {
2250 2248 rval = DDI_FAILURE;
2251 2249 goto done;
2252 2250 }
2253 2251
2254 2252 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2255 2253 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 config: "
2256 2254 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2257 2255 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2258 2256 goto done;
2259 2257 }
2260 2258
2261 2259 (void) ddi_dma_sync(page_dma_handle, 0, 0, DDI_DMA_SYNC_FORCPU);
2262 2260
2263 2261 /*
2264 2262 * Fusion-MPT stores fields in little-endian format. This is
2265 2263 * why the low-order 32 bits are stored first.
2266 2264 */
2267 2265 mpt->un.sasaddr.m_base_wwid_lo =
2268 2266 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID);
2269 2267 mpt->un.sasaddr.m_base_wwid_hi =
2270 2268 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID + 1);
2271 2269
2272 2270 if (ddi_prop_update_int64(DDI_DEV_T_NONE, mpt->m_dip,
2273 2271 "base-wwid", mpt->un.m_base_wwid) != DDI_PROP_SUCCESS) {
2274 2272 NDBG2(("%s%d: failed to create base-wwid property",
2275 2273 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip)));
2276 2274 }
2277 2275
2278 2276 /*
2279 2277 * Set the number of PHYs present.
2280 2278 */
2281 2279 mpt->m_num_phys = ddi_get8(page_accessp, (uint8_t *)&m5->NumPhys);
2282 2280
2283 2281 if (ddi_prop_update_int(DDI_DEV_T_NONE, mpt->m_dip,
2284 2282 "num-phys", mpt->m_num_phys) != DDI_PROP_SUCCESS) {
2285 2283 NDBG2(("%s%d: failed to create num-phys property",
2286 2284 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip)));
2287 2285 }
2288 2286
2289 2287 mptsas_log(mpt, CE_NOTE, "!mpt%d: Initiator WWNs: 0x%016llx-0x%016llx",
2290 2288 mpt->m_instance, (unsigned long long)mpt->un.m_base_wwid,
2291 2289 (unsigned long long)mpt->un.m_base_wwid + mpt->m_num_phys - 1);
2292 2290
2293 2291 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2294 2292 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2295 2293 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2296 2294 rval = DDI_FAILURE;
2297 2295 goto done;
2298 2296 }
2299 2297 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2300 2298 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2301 2299 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2302 2300 rval = DDI_FAILURE;
2303 2301 }
2304 2302 done:
2305 2303 /*
2306 2304 * free up memory
2307 2305 */
2308 2306 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2309 2307 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2310 2308 MPTSAS_ENABLE_INTR(mpt);
2311 2309
2312 2310 return (rval);
2313 2311 }
2314 2312
2315 2313 static int
2316 2314 mptsas_sasphypage_0_cb(mptsas_t *mpt, caddr_t page_memp,
2317 2315 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
2318 2316 va_list ap)
2319 2317 {
2320 2318 #ifndef __lock_lint
2321 2319 _NOTE(ARGUNUSED(ap))
2322 2320 #endif
2323 2321 pMpi2SasPhyPage0_t sasphypage;
2324 2322 int rval = DDI_SUCCESS;
2325 2323 uint16_t *owner_devhdl, *attached_devhdl;
2326 2324 uint8_t *attached_phy_identify;
2327 2325 uint32_t *attached_phy_info;
2328 2326 uint8_t *programmed_link_rate;
2329 2327 uint8_t *hw_link_rate;
2330 2328 uint8_t *change_count;
2331 2329 uint32_t *phy_info;
2332 2330 uint8_t *negotiated_link_rate;
2333 2331 uint32_t page_address;
2334 2332
2335 2333 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
2336 2334 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
2337 2335 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page0 "
2338 2336 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
2339 2337 iocstatus, iocloginfo);
2340 2338 rval = DDI_FAILURE;
2341 2339 return (rval);
2342 2340 }
2343 2341 page_address = va_arg(ap, uint32_t);
2344 2342 /*
2345 2343 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
2346 2344 * are no more pages. If everything is OK up to this point but the
2347 2345 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
2348 2346 * signal that device traversal is complete.
2349 2347 */
2350 2348 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
2351 2349 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
2352 2350 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
2353 2351 mpt->m_done_traverse_smp = 1;
2354 2352 }
2355 2353 rval = DDI_FAILURE;
2356 2354 return (rval);
2357 2355 }
2358 2356 owner_devhdl = va_arg(ap, uint16_t *);
2359 2357 attached_devhdl = va_arg(ap, uint16_t *);
2360 2358 attached_phy_identify = va_arg(ap, uint8_t *);
2361 2359 attached_phy_info = va_arg(ap, uint32_t *);
2362 2360 programmed_link_rate = va_arg(ap, uint8_t *);
2363 2361 hw_link_rate = va_arg(ap, uint8_t *);
2364 2362 change_count = va_arg(ap, uint8_t *);
2365 2363 phy_info = va_arg(ap, uint32_t *);
2366 2364 negotiated_link_rate = va_arg(ap, uint8_t *);
2367 2365
2368 2366 sasphypage = (pMpi2SasPhyPage0_t)page_memp;
2369 2367
2370 2368 *owner_devhdl =
2371 2369 ddi_get16(accessp, &sasphypage->OwnerDevHandle);
2372 2370 *attached_devhdl =
2373 2371 ddi_get16(accessp, &sasphypage->AttachedDevHandle);
2374 2372 *attached_phy_identify =
2375 2373 ddi_get8(accessp, &sasphypage->AttachedPhyIdentifier);
2376 2374 *attached_phy_info =
2377 2375 ddi_get32(accessp, &sasphypage->AttachedPhyInfo);
2378 2376 *programmed_link_rate =
2379 2377 ddi_get8(accessp, &sasphypage->ProgrammedLinkRate);
2380 2378 *hw_link_rate =
2381 2379 ddi_get8(accessp, &sasphypage->HwLinkRate);
2382 2380 *change_count =
2383 2381 ddi_get8(accessp, &sasphypage->ChangeCount);
2384 2382 *phy_info =
2385 2383 ddi_get32(accessp, &sasphypage->PhyInfo);
2386 2384 *negotiated_link_rate =
2387 2385 ddi_get8(accessp, &sasphypage->NegotiatedLinkRate);
2388 2386
2389 2387 return (rval);
2390 2388 }
2391 2389
2392 2390 /*
2393 2391 * Request MPI configuration page SAS phy page 0 to get DevHandle, phymask
2394 2392 * and SAS address.
2395 2393 */
2396 2394 int
2397 2395 mptsas_get_sas_phy_page0(mptsas_t *mpt, uint32_t page_address,
2398 2396 smhba_info_t *info)
2399 2397 {
2400 2398 int rval = DDI_SUCCESS;
2401 2399
2402 2400 ASSERT(mutex_owned(&mpt->m_mutex));
2403 2401
2404 2402 /*
2405 2403 * Get the header and config page. reply contains the reply frame,
2406 2404 * which holds status info for the request.
2407 2405 */
2408 2406 rval = mptsas_access_config_page(mpt,
2409 2407 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2410 2408 MPI2_CONFIG_EXTPAGETYPE_SAS_PHY, 0, page_address,
2411 2409 mptsas_sasphypage_0_cb, page_address, &info->owner_devhdl,
2412 2410 &info->attached_devhdl, &info->attached_phy_identify,
2413 2411 &info->attached_phy_info, &info->programmed_link_rate,
2414 2412 &info->hw_link_rate, &info->change_count,
2415 2413 &info->phy_info, &info->negotiated_link_rate);
2416 2414
2417 2415 return (rval);
2418 2416 }
2419 2417
2420 2418 static int
2421 2419 mptsas_sasphypage_1_cb(mptsas_t *mpt, caddr_t page_memp,
2422 2420 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
2423 2421 va_list ap)
2424 2422 {
2425 2423 #ifndef __lock_lint
2426 2424 _NOTE(ARGUNUSED(ap))
2427 2425 #endif
2428 2426 pMpi2SasPhyPage1_t sasphypage;
2429 2427 int rval = DDI_SUCCESS;
2430 2428
2431 2429 uint32_t *invalid_dword_count;
2432 2430 uint32_t *running_disparity_error_count;
2433 2431 uint32_t *loss_of_dword_sync_count;
2434 2432 uint32_t *phy_reset_problem_count;
2435 2433 uint32_t page_address;
2436 2434
2437 2435 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
2438 2436 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
2439 2437 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page1 "
2440 2438 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
2441 2439 iocstatus, iocloginfo);
2442 2440 rval = DDI_FAILURE;
2443 2441 return (rval);
2444 2442 }
2445 2443 page_address = va_arg(ap, uint32_t);
2446 2444 /*
2447 2445 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
2448 2446 * are no more pages. If everything is OK up to this point but the
2449 2447 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
2450 2448 * signal that device traversal is complete.
2451 2449 */
2452 2450 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
2453 2451 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
2454 2452 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
2455 2453 mpt->m_done_traverse_smp = 1;
2456 2454 }
2457 2455 rval = DDI_FAILURE;
2458 2456 return (rval);
2459 2457 }
2460 2458
2461 2459 invalid_dword_count = va_arg(ap, uint32_t *);
2462 2460 running_disparity_error_count = va_arg(ap, uint32_t *);
2463 2461 loss_of_dword_sync_count = va_arg(ap, uint32_t *);
2464 2462 phy_reset_problem_count = va_arg(ap, uint32_t *);
2465 2463
2466 2464 sasphypage = (pMpi2SasPhyPage1_t)page_memp;
2467 2465
2468 2466 *invalid_dword_count =
2469 2467 ddi_get32(accessp, &sasphypage->InvalidDwordCount);
2470 2468 *running_disparity_error_count =
2471 2469 ddi_get32(accessp, &sasphypage->RunningDisparityErrorCount);
2472 2470 *loss_of_dword_sync_count =
2473 2471 ddi_get32(accessp, &sasphypage->LossDwordSynchCount);
2474 2472 *phy_reset_problem_count =
2475 2473 ddi_get32(accessp, &sasphypage->PhyResetProblemCount);
2476 2474
2477 2475 return (rval);
2478 2476 }
2479 2477
2480 2478 /*
2481 2479 * Request MPI configuration page SAS phy page 0 to get DevHandle, phymask
2482 2480 * and SAS address.
2483 2481 */
2484 2482 int
2485 2483 mptsas_get_sas_phy_page1(mptsas_t *mpt, uint32_t page_address,
2486 2484 smhba_info_t *info)
2487 2485 {
2488 2486 int rval = DDI_SUCCESS;
2489 2487
2490 2488 ASSERT(mutex_owned(&mpt->m_mutex));
2491 2489
2492 2490 /*
2493 2491 * Get the header and config page. reply contains the reply frame,
2494 2492 * which holds status info for the request.
2495 2493 */
2496 2494 rval = mptsas_access_config_page(mpt,
2497 2495 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2498 2496 MPI2_CONFIG_EXTPAGETYPE_SAS_PHY, 1, page_address,
2499 2497 mptsas_sasphypage_1_cb, page_address,
2500 2498 &info->invalid_dword_count,
2501 2499 &info->running_disparity_error_count,
2502 2500 &info->loss_of_dword_sync_count,
2503 2501 &info->phy_reset_problem_count);
2504 2502
2505 2503 return (rval);
2506 2504 }
2507 2505 /*
2508 2506 * mptsas_get_manufacture_page0
2509 2507 *
2510 2508 * This function will retrieve the base
2511 2509 * Chip name, Board Name,Board Trace number from the adapter.
2512 2510 * Since this function is only called during the
2513 2511 * initialization process, use handshaking.
2514 2512 */
2515 2513 int
2516 2514 mptsas_get_manufacture_page0(mptsas_t *mpt)
2517 2515 {
2518 2516 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
2519 2517 ddi_dma_cookie_t page_cookie;
2520 2518 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
2521 2519 ddi_acc_handle_t recv_accessp, page_accessp;
2522 2520 pMpi2ConfigReply_t configreply;
2523 2521 caddr_t recv_memp, page_memp;
2524 2522 int recv_numbytes;
2525 2523 pMpi2ManufacturingPage0_t m0;
2526 2524 uint32_t flagslength;
2527 2525 int rval = DDI_SUCCESS;
2528 2526 uint_t iocstatus;
2529 2527 uint8_t i = 0;
2530 2528
2531 2529 MPTSAS_DISABLE_INTR(mpt);
2532 2530
2533 2531 if (mptsas_send_config_request_msg(mpt, MPI2_CONFIG_ACTION_PAGE_HEADER,
2534 2532 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 0, 0, 0, 0, 0)) {
2535 2533 rval = DDI_FAILURE;
2536 2534 goto done;
2537 2535 }
2538 2536
2539 2537 /*
2540 2538 * dynamically create a customized dma attribute structure
2541 2539 * that describes the MPT's config reply page request structure.
2542 2540 */
2543 2541 recv_dma_attrs = mpt->m_msg_dma_attr;
2544 2542 recv_dma_attrs.dma_attr_sgllen = 1;
2545 2543 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
2546 2544
2547 2545 if (mptsas_dma_addr_create(mpt, recv_dma_attrs, &recv_dma_handle,
2548 2546 &recv_accessp, &recv_memp, (sizeof (MPI2_CONFIG_REPLY)),
2549 2547 NULL) == FALSE) {
2550 2548 goto done;
2551 2549 }
2552 2550 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2553 2551 configreply = (pMpi2ConfigReply_t)recv_memp;
2554 2552 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2555 2553
2556 2554 /*
2557 2555 * get config reply message
2558 2556 */
2559 2557 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2560 2558 recv_accessp)) {
2561 2559 rval = DDI_FAILURE;
2562 2560 goto done;
2563 2561 }
2564 2562
2565 2563 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2566 2564 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 update: "
2567 2565 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2568 2566 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2569 2567 goto done;
2570 2568 }
2571 2569
2572 2570 /*
2573 2571 * dynamically create a customized dma attribute structure
2574 2572 * that describes the MPT's config page structure.
2575 2573 */
2576 2574 page_dma_attrs = mpt->m_msg_dma_attr;
2577 2575 page_dma_attrs.dma_attr_sgllen = 1;
2578 2576 page_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_PAGE_MAN_0));
2579 2577
2580 2578 if (mptsas_dma_addr_create(mpt, page_dma_attrs, &page_dma_handle,
2581 2579 &page_accessp, &page_memp, (sizeof (MPI2_CONFIG_PAGE_MAN_0)),
2582 2580 &page_cookie) == FALSE) {
2583 2581 goto done;
2584 2582 }
2585 2583 bzero(page_memp, sizeof (MPI2_CONFIG_PAGE_MAN_0));
2586 2584 m0 = (pMpi2ManufacturingPage0_t)page_memp;
2587 2585
2588 2586 /*
2589 2587 * Give reply address to IOC to store config page in and send
2590 2588 * config request out.
2591 2589 */
2592 2590
2593 2591 flagslength = sizeof (MPI2_CONFIG_PAGE_MAN_0);
2594 2592 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
2595 2593 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2596 2594 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
2597 2595 MPI2_SGE_FLAGS_IOC_TO_HOST |
2598 2596 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
2599 2597
2600 2598 if (mptsas_send_config_request_msg(mpt,
2601 2599 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2602 2600 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 0,
2603 2601 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2604 2602 ddi_get8(recv_accessp, &configreply->Header.PageLength),
2605 2603 flagslength, page_cookie.dmac_address)) {
2606 2604 rval = DDI_FAILURE;
2607 2605 goto done;
2608 2606 }
2609 2607
2610 2608 /*
2611 2609 * get reply view handshake
2612 2610 */
2613 2611 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2614 2612 recv_accessp)) {
2615 2613 rval = DDI_FAILURE;
2616 2614 goto done;
2617 2615 }
2618 2616
2619 2617 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2620 2618 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page0 config: "
2621 2619 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2622 2620 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2623 2621 goto done;
2624 2622 }
2625 2623
2626 2624 (void) ddi_dma_sync(page_dma_handle, 0, 0, DDI_DMA_SYNC_FORCPU);
2627 2625
2628 2626 /*
2629 2627 * Fusion-MPT stores fields in little-endian format. This is
2630 2628 * why the low-order 32 bits are stored first.
2631 2629 */
2632 2630
2633 2631 for (i = 0; i < 16; i++) {
2634 2632 mpt->m_MANU_page0.ChipName[i] =
2635 2633 ddi_get8(page_accessp,
2636 2634 (uint8_t *)(void *)&m0->ChipName[i]);
2637 2635 }
2638 2636
2639 2637 for (i = 0; i < 8; i++) {
2640 2638 mpt->m_MANU_page0.ChipRevision[i] =
2641 2639 ddi_get8(page_accessp,
2642 2640 (uint8_t *)(void *)&m0->ChipRevision[i]);
2643 2641 }
2644 2642
2645 2643 for (i = 0; i < 16; i++) {
2646 2644 mpt->m_MANU_page0.BoardName[i] =
2647 2645 ddi_get8(page_accessp,
2648 2646 (uint8_t *)(void *)&m0->BoardName[i]);
2649 2647 }
2650 2648
2651 2649 for (i = 0; i < 16; i++) {
2652 2650 mpt->m_MANU_page0.BoardAssembly[i] =
2653 2651 ddi_get8(page_accessp,
2654 2652 (uint8_t *)(void *)&m0->BoardAssembly[i]);
2655 2653 }
2656 2654
2657 2655 for (i = 0; i < 16; i++) {
2658 2656 mpt->m_MANU_page0.BoardTracerNumber[i] =
2659 2657 ddi_get8(page_accessp,
2660 2658 (uint8_t *)(void *)&m0->BoardTracerNumber[i]);
2661 2659 }
2662 2660
2663 2661 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2664 2662 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2665 2663 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2666 2664 rval = DDI_FAILURE;
2667 2665 goto done;
2668 2666 }
2669 2667 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2670 2668 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2671 2669 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2672 2670 rval = DDI_FAILURE;
2673 2671 }
2674 2672 done:
2675 2673 /*
2676 2674 * free up memory
2677 2675 */
2678 2676 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2679 2677 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2680 2678 MPTSAS_ENABLE_INTR(mpt);
2681 2679
2682 2680 return (rval);
2683 2681 }
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