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6064 ixgbe needs X550 support
@@ -27,15 +27,17 @@
* Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, Joyent, Inc. All rights reserved.
* Copyright 2012 Nexenta Systems, Inc. All rights reserved.
* Copyright (c) 2013 Saso Kiselkov. All rights reserved.
* Copyright (c) 2013 OSN Online Service Nuernberg GmbH. All rights reserved.
+ * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
*/
#include "ixgbe_sw.h"
static char ixgbe_ident[] = "Intel 10Gb Ethernet";
+/* LINTED E_STATIC_UNUSED */
static char ixgbe_version[] = "ixgbe 1.1.7";
/*
* Local function protoypes
*/
@@ -312,22 +314,51 @@
200, /* default interrupt throttle rate */
64, /* maximum total msix vectors */
16, /* maximum number of ring vectors */
2, /* maximum number of other vectors */
(IXGBE_EICR_LSC
- | IXGBE_EICR_GPI_SDP1
- | IXGBE_EICR_GPI_SDP2), /* "other" interrupt types handled */
+ | IXGBE_EICR_GPI_SDP1_X540
+ | IXGBE_EICR_GPI_SDP2_X540), /* "other" interrupt types handled */
- (IXGBE_SDP1_GPIEN
- | IXGBE_SDP2_GPIEN), /* "other" interrupt types enable mask */
+ (IXGBE_SDP1_GPIEN_X540
+ | IXGBE_SDP2_GPIEN_X540), /* "other" interrupt types enable mask */
(IXGBE_FLAG_DCA_CAPABLE
| IXGBE_FLAG_RSS_CAPABLE
| IXGBE_FLAG_VMDQ_CAPABLE
| IXGBE_FLAG_RSC_CAPABLE) /* capability flags */
};
+static adapter_info_t ixgbe_X550_cap = {
+ 128, /* maximum number of rx queues */
+ 1, /* minimum number of rx queues */
+ 128, /* default number of rx queues */
+ 64, /* maximum number of rx groups */
+ 1, /* minimum number of rx groups */
+ 1, /* default number of rx groups */
+ 128, /* maximum number of tx queues */
+ 1, /* minimum number of tx queues */
+ 8, /* default number of tx queues */
+ 15500, /* maximum MTU size */
+ 0xFF8, /* maximum interrupt throttle rate */
+ 0, /* minimum interrupt throttle rate */
+ 200, /* default interrupt throttle rate */
+ 64, /* maximum total msix vectors */
+ 16, /* maximum number of ring vectors */
+ 2, /* maximum number of other vectors */
+ (IXGBE_EICR_LSC
+ | IXGBE_SDP1_GPIEN_X550
+ | IXGBE_SDP2_GPIEN_X550), /* "other" interrupt types handled */
+
+ (IXGBE_SDP1_GPIEN_X550
+ | IXGBE_SDP2_GPIEN_X550), /* "other" interrupt types enable mask */
+
+ (IXGBE_FLAG_RSS_CAPABLE
+ | IXGBE_FLAG_VMDQ_CAPABLE
+ | IXGBE_FLAG_RSC_CAPABLE) /* capability flags */
+};
+
/*
* Module Initialization Functions.
*/
int
@@ -603,11 +634,11 @@
ixgbe_error(ixgbe, "Failed to enable DDI interrupts");
goto attach_fail;
}
ixgbe->attach_progress |= ATTACH_PROGRESS_ENABLE_INTR;
- ixgbe_log(ixgbe, "%s, %s", ixgbe_ident, ixgbe_version);
+ ixgbe_log(ixgbe, "%s", ixgbe_ident);
atomic_or_32(&ixgbe->ixgbe_state, IXGBE_INITIALIZED);
return (DDI_SUCCESS);
attach_fail:
@@ -955,10 +986,20 @@
* For now, X540 is all set in its capab structure.
* As other X540 variants show up, things can change here.
*/
break;
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
+ IXGBE_DEBUGLOG_0(ixgbe, "identify X550 adapter\n");
+ ixgbe->capab = &ixgbe_X550_cap;
+
+ if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP)
+ ixgbe->capab->flags |= IXGBE_FLAG_SFP_PLUG_CAPABLE;
+
+ break;
+
default:
IXGBE_DEBUGLOG_1(ixgbe,
"adapter not supported in ixgbe_identify_hardware(): %d\n",
hw->mac.type);
return (IXGBE_FAILURE);
@@ -2189,18 +2230,20 @@
* WTHRESH defaults to 1 (writeback each descriptor)
*/
reg_val = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->hw_index));
reg_val |= IXGBE_RXDCTL_ENABLE; /* enable queue */
- /* Not a valid value for 82599 or X540 */
+ /* Not a valid value for 82599, X540 or X550 */
if (hw->mac.type == ixgbe_mac_82598EB) {
reg_val |= 0x0020; /* pthresh */
}
IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->hw_index), reg_val);
if (hw->mac.type == ixgbe_mac_82599EB ||
- hw->mac.type == ixgbe_mac_X540) {
+ hw->mac.type == ixgbe_mac_X540 ||
+ hw->mac.type == ixgbe_mac_X550 ||
+ hw->mac.type == ixgbe_mac_X550EM_x) {
reg_val = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
reg_val |= (IXGBE_RDRXCTL_CRCSTRIP | IXGBE_RDRXCTL_AGGDIS);
IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg_val);
}
@@ -2494,10 +2537,12 @@
ring_mapping);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
IXGBE_WRITE_REG(hw, IXGBE_TQSM(i >> 2),
ring_mapping);
break;
default:
@@ -2513,10 +2558,12 @@
IXGBE_WRITE_REG(hw, IXGBE_TQSMR(i >> 2), ring_mapping);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
IXGBE_WRITE_REG(hw, IXGBE_TQSM(i >> 2), ring_mapping);
break;
default:
break;
@@ -2529,14 +2576,16 @@
reg_val = IXGBE_READ_REG(hw, IXGBE_HLREG0);
reg_val |= IXGBE_HLREG0_TXCRCEN | IXGBE_HLREG0_TXPADEN;
IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_val);
/*
- * enable DMA for 82599 and X540 parts
+ * enable DMA for 82599, X540 and X550 parts
*/
if (hw->mac.type == ixgbe_mac_82599EB ||
- hw->mac.type == ixgbe_mac_X540) {
+ hw->mac.type == ixgbe_mac_X540 ||
+ hw->mac.type == ixgbe_mac_X550 ||
+ hw->mac.type == ixgbe_mac_X550EM_x) {
/* DMATXCTL.TE must be set after all Tx config is complete */
reg_val = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
reg_val |= IXGBE_DMATXCTL_TE;
IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_val);
@@ -2645,10 +2694,12 @@
IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
/*
* Enable VMDq-only.
*/
vmdctl = IXGBE_MRQC_VMDQEN;
IXGBE_WRITE_REG(hw, IXGBE_MRQC, vmdctl);
@@ -2739,10 +2790,12 @@
IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
/*
* Enable RSS & Setup RSS Hash functions
*/
mrqc = IXGBE_MRQC_RSS_FIELD_IPV4 |
IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
@@ -2785,11 +2838,13 @@
rxcsum |= IXGBE_RXCSUM_PCSD;
rxcsum &= ~IXGBE_RXCSUM_IPPCSE;
IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
if (hw->mac.type == ixgbe_mac_82599EB ||
- hw->mac.type == ixgbe_mac_X540) {
+ hw->mac.type == ixgbe_mac_X540 ||
+ hw->mac.type == ixgbe_mac_X550 ||
+ hw->mac.type == ixgbe_mac_X550EM_x) {
/*
* Enable Virtualization and Replication.
*/
vtctl = IXGBE_VT_CTL_VT_ENABLE | IXGBE_VT_CTL_REPLEN;
IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vtctl);
@@ -2997,20 +3052,22 @@
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
/*
* 82599 supports the following combination:
* vmdq no. x rss no.
* [33..64] x [1..2]
* [2..32] x [1..4]
* 1 x [1..16]
* However 8 rss queue per pool (vmdq) is sufficient for
* most cases.
*
- * For now, treat X540 like the 82599.
+ * For now, treat X540 and X550 like the 82599.
*/
ring_per_group = ixgbe->num_rx_rings / ixgbe->num_rx_groups;
if (ixgbe->num_rx_groups == 1) {
ixgbe->num_rx_rings = min(8, ring_per_group);
} else if (ixgbe->num_rx_groups <= 32) {
@@ -3169,13 +3226,15 @@
ixgbe->tx_head_wb_enable = ixgbe_get_prop(ixgbe, PROP_TX_HEAD_WB_ENABLE,
0, 1, DEFAULT_TX_HEAD_WB_ENABLE);
ixgbe->relax_order_enable = ixgbe_get_prop(ixgbe,
PROP_RELAX_ORDER_ENABLE, 0, 1, DEFAULT_RELAX_ORDER_ENABLE);
- /* Head Write Back not recommended for 82599 and X540 */
+ /* Head Write Back not recommended for 82599, X540 and X550 */
if (hw->mac.type == ixgbe_mac_82599EB ||
- hw->mac.type == ixgbe_mac_X540) {
+ hw->mac.type == ixgbe_mac_X540 ||
+ hw->mac.type == ixgbe_mac_X550 ||
+ hw->mac.type == ixgbe_mac_X550EM_x) {
ixgbe->tx_head_wb_enable = B_FALSE;
}
/*
* ixgbe LSO needs the tx h/w checksum support.
@@ -3194,11 +3253,11 @@
if (ixgbe->rx_hcksum_enable == B_FALSE) {
ixgbe->lro_enable = B_FALSE;
}
/*
- * ixgbe LRO only been supported by 82599 and X540 now
+ * ixgbe LRO only supported by 82599, X540 and X550
*/
if (hw->mac.type == ixgbe_mac_82598EB) {
ixgbe->lro_enable = B_FALSE;
}
ixgbe->tx_copy_thresh = ixgbe_get_prop(ixgbe, PROP_TX_COPY_THRESHOLD,
@@ -3224,15 +3283,17 @@
ixgbe->intr_throttling[0] = ixgbe_get_prop(ixgbe, PROP_INTR_THROTTLING,
ixgbe->capab->min_intr_throttle,
ixgbe->capab->max_intr_throttle,
ixgbe->capab->def_intr_throttle);
/*
- * 82599 and X540 require the interrupt throttling rate is
- * a multiple of 8. This is enforced by the register
- * definiton.
+ * 82599, X540 and X550 require the interrupt throttling rate is
+ * a multiple of 8. This is enforced by the register definiton.
*/
- if (hw->mac.type == ixgbe_mac_82599EB || hw->mac.type == ixgbe_mac_X540)
+ if (hw->mac.type == ixgbe_mac_82599EB ||
+ hw->mac.type == ixgbe_mac_X540 ||
+ hw->mac.type == ixgbe_mac_X550 ||
+ hw->mac.type == ixgbe_mac_X550EM_x)
ixgbe->intr_throttling[0] = ixgbe->intr_throttling[0] & 0xFF8;
hw->allow_unsupported_sfp = ixgbe_get_prop(ixgbe,
PROP_ALLOW_UNSUPPORTED_SFP, 0, 1, DEFAULT_ALLOW_UNSUPPORTED_SFP);
}
@@ -3327,11 +3388,11 @@
IXGBE_LINK_SPEED_100_FULL;
}
if (setup_hw) {
if (ixgbe_setup_link(&ixgbe->hw, autoneg_advertised,
- ixgbe->param_adv_autoneg_cap, B_TRUE) != IXGBE_SUCCESS) {
+ ixgbe->param_adv_autoneg_cap) != IXGBE_SUCCESS) {
ixgbe_notice(ixgbe, "Setup link failed on this "
"device.");
return (IXGBE_FAILURE);
}
}
@@ -3420,29 +3481,29 @@
ixgbe_t *ixgbe = (ixgbe_t *)arg;
uint32_t eicr = ixgbe->eicr;
struct ixgbe_hw *hw = &ixgbe->hw;
mutex_enter(&ixgbe->gen_lock);
- if (eicr & IXGBE_EICR_GPI_SDP1) {
+ if (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw)) {
/* clear the interrupt */
- IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
+ IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
/* if link up, do multispeed fiber setup */
(void) ixgbe_setup_link(hw, IXGBE_LINK_SPEED_82599_AUTONEG,
- B_TRUE, B_TRUE);
+ B_TRUE);
ixgbe_driver_link_check(ixgbe);
ixgbe_get_hw_state(ixgbe);
- } else if (eicr & IXGBE_EICR_GPI_SDP2) {
+ } else if (eicr & IXGBE_EICR_GPI_SDP2_BY_MAC(hw)) {
/* clear the interrupt */
- IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
+ IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2_BY_MAC(hw));
/* if link up, do sfp module setup */
(void) hw->mac.ops.setup_sfp(hw);
/* do multispeed fiber setup */
(void) ixgbe_setup_link(hw, IXGBE_LINK_SPEED_82599_AUTONEG,
- B_TRUE, B_TRUE);
+ B_TRUE);
ixgbe_driver_link_check(ixgbe);
ixgbe_get_hw_state(ixgbe);
}
mutex_exit(&ixgbe->gen_lock);
@@ -3474,11 +3535,11 @@
/* make sure we know current state of link */
(void) ixgbe_check_link(hw, &speed, &link_up, false);
/* check over-temp condition */
- if (((eicr & IXGBE_EICR_GPI_SDP0) && (!link_up)) ||
+ if (((eicr & IXGBE_EICR_GPI_SDP0_BY_MAC(hw)) && (!link_up)) ||
(eicr & IXGBE_EICR_LSC)) {
if (hw->phy.ops.check_overtemp(hw) == IXGBE_ERR_OVERTEMP) {
atomic_or_32(&ixgbe->ixgbe_state, IXGBE_OVERTEMP);
/*
@@ -3670,11 +3731,11 @@
/*
* Finally(!), if there's a valid "mac-address" property (created
* if we netbooted from this interface), we must use this instead
* of any of the above to ensure that the NFS/install server doesn't
- * get confused by the address changing as Solaris takes over!
+ * get confused by the address changing as illumos takes over!
*/
err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, ixgbe->dip,
DDI_PROP_DONTPASS, "mac-address", &bytes, &nelts);
if (err == DDI_PROP_SUCCESS) {
if (nelts == ETHERADDRL) {
@@ -3860,12 +3921,12 @@
/* disable autoclear, leave gpie at default */
eiac = 0;
/*
* General purpose interrupt enable.
- * For 82599 or X540, extended interrupt automask enable
- * only in MSI or MSI-X mode
+ * For 82599, X540 and X550, extended interrupt
+ * automask enable only in MSI or MSI-X mode
*/
if ((hw->mac.type == ixgbe_mac_82598EB) ||
(ixgbe->intr_type == DDI_INTR_TYPE_MSI)) {
gpie |= IXGBE_GPIE_EIAME;
}
@@ -3877,10 +3938,12 @@
gpie |= ixgbe->capab->other_gpie;
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
gpie |= ixgbe->capab->other_gpie;
/* Enable RSC Delay 8us when LRO enabled */
if (ixgbe->lro_enable) {
gpie |= (1 << IXGBE_GPIE_RSC_DELAY_SHIFT);
@@ -4071,17 +4134,19 @@
atlas);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
reg = IXGBE_READ_REG(&ixgbe->hw, IXGBE_AUTOC);
reg |= (IXGBE_AUTOC_FLU |
IXGBE_AUTOC_10G_KX4);
IXGBE_WRITE_REG(&ixgbe->hw, IXGBE_AUTOC, reg);
(void) ixgbe_setup_link(&ixgbe->hw, IXGBE_LINK_SPEED_10GB_FULL,
- B_FALSE, B_TRUE);
+ B_FALSE);
break;
default:
break;
}
@@ -4137,10 +4202,12 @@
* ixgbe_intr_other_work - Process interrupt types other than tx/rx
*/
static void
ixgbe_intr_other_work(ixgbe_t *ixgbe, uint32_t eicr)
{
+ struct ixgbe_hw *hw = &ixgbe->hw;
+
ASSERT(mutex_owned(&ixgbe->gen_lock));
/*
* handle link status change
*/
@@ -4151,11 +4218,11 @@
/*
* check for fan failure on adapters with fans
*/
if ((ixgbe->capab->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
- (eicr & IXGBE_EICR_GPI_SDP1)) {
+ (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
atomic_or_32(&ixgbe->ixgbe_state, IXGBE_OVERTEMP);
/*
* Disable the adapter interrupts
*/
@@ -4172,18 +4239,19 @@
"because the fan has stopped.\n");
ixgbe_error(ixgbe,
"Action: Replace the adapter.\n");
/* re-enable the interrupt, which was automasked */
- ixgbe->eims |= IXGBE_EICR_GPI_SDP1;
+ ixgbe->eims |= IXGBE_EICR_GPI_SDP1_BY_MAC(hw);
}
/*
* Do SFP check for adapters with hot-plug capability
*/
if ((ixgbe->capab->flags & IXGBE_FLAG_SFP_PLUG_CAPABLE) &&
- ((eicr & IXGBE_EICR_GPI_SDP1) || (eicr & IXGBE_EICR_GPI_SDP2))) {
+ ((eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw)) ||
+ (eicr & IXGBE_EICR_GPI_SDP2_BY_MAC(hw)))) {
ixgbe->eicr = eicr;
if ((ddi_taskq_dispatch(ixgbe->sfp_taskq,
ixgbe_sfp_check, (void *)ixgbe,
DDI_NOSLEEP)) != DDI_SUCCESS) {
ixgbe_log(ixgbe, "No memory available to dispatch "
@@ -4193,11 +4261,11 @@
/*
* Do over-temperature check for adapters with temp sensor
*/
if ((ixgbe->capab->flags & IXGBE_FLAG_TEMP_SENSOR_CAPABLE) &&
- ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC))) {
+ ((eicr & IXGBE_EICR_GPI_SDP0_BY_MAC(hw)) || (eicr & IXGBE_EICR_LSC))) {
ixgbe->eicr = eicr;
if ((ddi_taskq_dispatch(ixgbe->overtemp_taskq,
ixgbe_overtemp_check, (void *)ixgbe,
DDI_NOSLEEP)) != DDI_SUCCESS) {
ixgbe_log(ixgbe, "No memory available to dispatch "
@@ -4290,10 +4358,12 @@
ixgbe->eims &= ~(eicr & IXGBE_OTHER_INTR);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
ixgbe->eimc = IXGBE_82599_OTHER_INTR;
IXGBE_WRITE_REG(hw, IXGBE_EIMC, ixgbe->eimc);
break;
default:
@@ -4384,10 +4454,12 @@
ixgbe->eims &= ~(eicr & IXGBE_OTHER_INTR);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
ixgbe->eimc = IXGBE_82599_OTHER_INTR;
IXGBE_WRITE_REG(hw, IXGBE_EIMC, ixgbe->eimc);
break;
default:
@@ -4464,10 +4536,12 @@
ixgbe_intr_other_work(ixgbe, eicr);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
ixgbe->eims |= IXGBE_EICR_RTX_QUEUE;
ixgbe_intr_other_work(ixgbe, eicr);
break;
default:
@@ -4865,10 +4939,12 @@
IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
if (cause == -1) {
/* other causes */
msix_vector |= IXGBE_IVAR_ALLOC_VAL;
index = (intr_alloc_entry & 1) * 8;
ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
@@ -4919,10 +4995,12 @@
IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
if (cause == -1) {
/* other causes */
index = (intr_alloc_entry & 1) * 8;
ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
ivar |= (IXGBE_IVAR_ALLOC_VAL << index);
@@ -4969,10 +5047,12 @@
IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
if (cause == -1) {
/* other causes */
index = (intr_alloc_entry & 1) * 8;
ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
ivar &= ~(IXGBE_IVAR_ALLOC_VAL << index);
@@ -5012,10 +5092,12 @@
case ixgbe_mac_82598EB:
return (sw_rx_index);
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
return (sw_rx_index * 2);
default:
break;
}
@@ -5028,10 +5110,12 @@
16 + (sw_rx_index % rx_ring_per_group);
return (hw_rx_index);
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
if (ixgbe->num_rx_groups > 32) {
hw_rx_index = (sw_rx_index /
rx_ring_per_group) * 2 +
(sw_rx_index % rx_ring_per_group);
} else {
@@ -5133,10 +5217,12 @@
IXGBE_WRITE_REG(hw, IXGBE_IVAR(v_idx), 0);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
+ case ixgbe_mac_X550:
+ case ixgbe_mac_X550EM_x:
for (v_idx = 0; v_idx < 64; v_idx++)
IXGBE_WRITE_REG(hw, IXGBE_IVAR(v_idx), 0);
IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, 0);
break;