93 /*
94 * (the rest of these are defined by the hardware)
95 */
96 greg_t r_err;
97 greg_t r_rip;
98 greg_t r_cs;
99 greg_t r_rfl;
100 greg_t r_rsp;
101 greg_t r_ss;
102 };
103
104 #define r_r0 r_rax /* r0 for portability */
105 #define r_r1 r_rdx /* r1 for portability */
106 #define r_fp r_rbp /* kernel frame pointer */
107 #define r_sp r_rsp /* user stack pointer */
108 #define r_pc r_rip /* user's instruction pointer */
109 #define r_ps r_rfl /* user's RFLAGS */
110
111 #ifdef _KERNEL
112 #define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
113 #endif /* _KERNEL */
114
115 #else /* !_ASM */
116
117 #if defined(_MACHDEP)
118
119 #include <sys/machprivregs.h>
120 #include <sys/pcb.h>
121
122 /*
123 * We can not safely sample {fs,gs}base on the hypervisor. The rdmsr
124 * instruction triggers a #gp fault which is emulated in the hypervisor
125 * on behalf of the guest. This is normally ok but if the guest is in
126 * the special failsafe handler it must not fault again or the hypervisor
127 * will kill the domain. We could use something different than INTR_PUSH
128 * in xen_failsafe_callback but for now we will not sample them.
129 */
130 #if defined(DEBUG) && !defined(__xpv)
131 #define __SAVE_BASES \
132 movl $MSR_AMD_FSBASE, %ecx; \
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93 /*
94 * (the rest of these are defined by the hardware)
95 */
96 greg_t r_err;
97 greg_t r_rip;
98 greg_t r_cs;
99 greg_t r_rfl;
100 greg_t r_rsp;
101 greg_t r_ss;
102 };
103
104 #define r_r0 r_rax /* r0 for portability */
105 #define r_r1 r_rdx /* r1 for portability */
106 #define r_fp r_rbp /* kernel frame pointer */
107 #define r_sp r_rsp /* user stack pointer */
108 #define r_pc r_rip /* user's instruction pointer */
109 #define r_ps r_rfl /* user's RFLAGS */
110
111 #ifdef _KERNEL
112 #define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
113 #define lwptofpu(lwp) ((kfpu_t *)((lwp)->lwp_fpu))
114 #endif /* _KERNEL */
115
116 #else /* !_ASM */
117
118 #if defined(_MACHDEP)
119
120 #include <sys/machprivregs.h>
121 #include <sys/pcb.h>
122
123 /*
124 * We can not safely sample {fs,gs}base on the hypervisor. The rdmsr
125 * instruction triggers a #gp fault which is emulated in the hypervisor
126 * on behalf of the guest. This is normally ok but if the guest is in
127 * the special failsafe handler it must not fault again or the hypervisor
128 * will kill the domain. We could use something different than INTR_PUSH
129 * in xen_failsafe_callback but for now we will not sample them.
130 */
131 #if defined(DEBUG) && !defined(__xpv)
132 #define __SAVE_BASES \
133 movl $MSR_AMD_FSBASE, %ecx; \
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