Print this page
XXX AVX procfs
Split |
Close |
Expand all |
Collapse all |
--- old/usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c
+++ new/usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License, Version 1.0 only
6 6 * (the "License"). You may not use this file except in compliance
7 7 * with the License.
8 8 *
9 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 10 * or http://www.opensolaris.org/os/licensing.
11 11 * See the License for the specific language governing permissions
12 12 * and limitations under the License.
13 13 *
14 14 * When distributing Covered Code, include this CDDL HEADER in each
15 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 16 * If applicable, add the following below this CDDL HEADER, with the
↓ open down ↓ |
16 lines elided |
↑ open up ↑ |
17 17 * fields enclosed by brackets "[]" replaced with your own identifying
18 18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 19 *
20 20 * CDDL HEADER END
21 21 */
22 22 /*
23 23 * Copyright 2004 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 -#pragma ident "%Z%%M% %I% %E% SMI"
28 -
29 27 /*
30 28 * User Process Target Intel 32-bit component
31 29 *
32 30 * This file provides the ISA-dependent portion of the user process target.
33 31 * For more details on the implementation refer to mdb_proc.c.
34 32 */
35 33
36 34 #include <mdb/mdb_proc.h>
37 35 #include <mdb/mdb_kreg.h>
38 36 #include <mdb/mdb_err.h>
39 37 #include <mdb/mdb_amd64util.h>
40 38 #include <mdb/mdb.h>
41 39
42 40 #include <sys/frame.h>
43 41 #include <libproc.h>
44 42 #include <sys/fp.h>
45 43 #include <ieeefp.h>
46 44
47 45 const mdb_tgt_regdesc_t pt_regdesc[] = {
48 46 { "r15", REG_R15, MDB_TGT_R_EXPORT },
49 47 { "r14", REG_R14, MDB_TGT_R_EXPORT },
50 48 { "r13", REG_R13, MDB_TGT_R_EXPORT },
51 49 { "r12", REG_R12, MDB_TGT_R_EXPORT },
52 50 { "r11", REG_R11, MDB_TGT_R_EXPORT },
53 51 { "r10", REG_R10, MDB_TGT_R_EXPORT },
54 52 { "r9", REG_R9, MDB_TGT_R_EXPORT },
55 53 { "r8", REG_R8, MDB_TGT_R_EXPORT },
56 54 { "rdi", REG_RDI, MDB_TGT_R_EXPORT },
57 55 { "rsi", REG_RSI, MDB_TGT_R_EXPORT },
58 56 { "rbp", REG_RBP, MDB_TGT_R_EXPORT },
59 57 { "rbx", REG_RBX, MDB_TGT_R_EXPORT },
60 58 { "rdx", REG_RDX, MDB_TGT_R_EXPORT },
61 59 { "rcx", REG_RCX, MDB_TGT_R_EXPORT },
62 60 { "rax", REG_RAX, MDB_TGT_R_EXPORT },
63 61 { "trapno", REG_TRAPNO, MDB_TGT_R_EXPORT },
64 62 { "err", REG_ERR, MDB_TGT_R_EXPORT },
65 63 { "rip", REG_RIP, MDB_TGT_R_EXPORT },
66 64 { "cs", REG_CS, MDB_TGT_R_EXPORT },
67 65 { "rflags", REG_RFL, MDB_TGT_R_EXPORT },
68 66 { "rsp", REG_RSP, MDB_TGT_R_EXPORT },
69 67 { "ss", REG_SS, MDB_TGT_R_EXPORT },
70 68 { "fs", REG_FS, MDB_TGT_R_EXPORT },
71 69 { "gs", REG_GS, MDB_TGT_R_EXPORT },
72 70 { "es", REG_ES, MDB_TGT_R_EXPORT },
73 71 { "ds", REG_DS, MDB_TGT_R_EXPORT },
74 72 { "fsbase", REG_FSBASE, MDB_TGT_R_EXPORT },
75 73 { "gsbase", REG_GSBASE, MDB_TGT_R_EXPORT },
76 74 { NULL, 0, 0 }
77 75 };
78 76
79 77 /*
80 78 * We cannot rely on pr_instr, because if we hit a breakpoint or the user has
81 79 * artifically modified memory, it will no longer be correct.
82 80 */
83 81 static uint8_t
84 82 pt_read_instr(mdb_tgt_t *t)
85 83 {
86 84 const lwpstatus_t *psp = &Pstatus(t->t_pshandle)->pr_lwp;
87 85 uint8_t ret = 0;
88 86
89 87 (void) mdb_tgt_vread(t, &ret, sizeof (ret), psp->pr_reg[REG_RIP]);
90 88
91 89 return (ret);
92 90 }
93 91
94 92 /*ARGSUSED*/
95 93 int
96 94 pt_regs(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv)
97 95 {
98 96 mdb_tgt_t *t = mdb.m_target;
99 97 mdb_tgt_tid_t tid;
100 98 prgregset_t grs;
101 99 prgreg_t rflags;
102 100
103 101 if (argc != 0)
104 102 return (DCMD_USAGE);
105 103
106 104 if (t->t_pshandle == NULL || Pstate(t->t_pshandle) == PS_UNDEAD) {
107 105 mdb_warn("no process active\n");
108 106 return (DCMD_ERR);
109 107 }
110 108
111 109 if (Pstate(t->t_pshandle) == PS_LOST) {
112 110 mdb_warn("debugger has lost control of process\n");
113 111 return (DCMD_ERR);
114 112 }
115 113
116 114 if (flags & DCMD_ADDRSPEC)
117 115 tid = (mdb_tgt_tid_t)addr;
118 116 else
119 117 tid = PTL_TID(t);
120 118
121 119 if (PTL_GETREGS(t, tid, grs) != 0) {
122 120 mdb_warn("failed to get current register set");
123 121 return (DCMD_ERR);
124 122 }
125 123
126 124 rflags = grs[REG_RFL];
127 125
128 126 mdb_printf("%%rax = 0x%0?p\t%%r8 = 0x%0?p\n",
129 127 grs[REG_RAX], grs[REG_R8]);
130 128 mdb_printf("%%rbx = 0x%0?p\t%%r9 = 0x%0?p\n",
131 129 grs[REG_RBX], grs[REG_R9]);
132 130 mdb_printf("%%rcx = 0x%0?p\t%%r10 = 0x%0?p\n",
133 131 grs[REG_RCX], grs[REG_R10]);
134 132 mdb_printf("%%rdx = 0x%0?p\t%%r11 = 0x%0?p\n",
135 133 grs[REG_RDX], grs[REG_R11]);
136 134 mdb_printf("%%rsi = 0x%0?p\t%%r12 = 0x%0?p\n",
137 135 grs[REG_RSI], grs[REG_R12]);
138 136 mdb_printf("%%rdi = 0x%0?p\t%%r13 = 0x%0?p\n",
139 137 grs[REG_RDI], grs[REG_R13]);
140 138 mdb_printf(" %?s\t%%r14 = 0x%0?p\n",
141 139 "", grs[REG_R14]);
142 140 mdb_printf(" %?s\t%%r15 = 0x%0?p\n",
143 141 "", grs[REG_R15]);
144 142
145 143 mdb_printf("\n");
146 144
147 145 mdb_printf("%%cs = 0x%04x\t%%fs = 0x%04x\t%%gs = 0x%04x\n",
148 146 grs[REG_CS], grs[REG_FS], grs[REG_GS]);
149 147 mdb_printf("%%ds = 0x%04x\t%%es = 0x%04x\t%%ss = 0x%04x\n",
150 148 grs[REG_DS], grs[REG_ES], grs[REG_SS]);
151 149
152 150 mdb_printf("\n");
153 151
154 152 mdb_printf("%%rip = 0x%0?p %A\n", grs[REG_RIP], grs[REG_RIP]);
155 153 mdb_printf("%%rbp = 0x%0?p\n", grs[REG_RBP], grs[REG_RBP]);
156 154 mdb_printf("%%rsp = 0x%0?p\n", grs[REG_RSP], grs[REG_RSP]);
157 155
158 156 mdb_printf("\n");
159 157
160 158 mdb_printf("%%rflags = 0x%08x\n", rflags);
161 159
162 160 mdb_printf(" id=%u vip=%u vif=%u ac=%u vm=%u rf=%u nt=%u iopl=0x%x\n",
163 161 (rflags & KREG_EFLAGS_ID_MASK) >> KREG_EFLAGS_ID_SHIFT,
164 162 (rflags & KREG_EFLAGS_VIP_MASK) >> KREG_EFLAGS_VIP_SHIFT,
165 163 (rflags & KREG_EFLAGS_VIF_MASK) >> KREG_EFLAGS_VIF_SHIFT,
166 164 (rflags & KREG_EFLAGS_AC_MASK) >> KREG_EFLAGS_AC_SHIFT,
167 165 (rflags & KREG_EFLAGS_VM_MASK) >> KREG_EFLAGS_VM_SHIFT,
168 166 (rflags & KREG_EFLAGS_RF_MASK) >> KREG_EFLAGS_RF_SHIFT,
169 167 (rflags & KREG_EFLAGS_NT_MASK) >> KREG_EFLAGS_NT_SHIFT,
170 168 (rflags & KREG_EFLAGS_IOPL_MASK) >> KREG_EFLAGS_IOPL_SHIFT);
171 169
172 170 mdb_printf(" status=<%s,%s,%s,%s,%s,%s,%s,%s,%s>\n",
173 171 (rflags & KREG_EFLAGS_OF_MASK) ? "OF" : "of",
174 172 (rflags & KREG_EFLAGS_DF_MASK) ? "DF" : "df",
175 173 (rflags & KREG_EFLAGS_IF_MASK) ? "IF" : "if",
176 174 (rflags & KREG_EFLAGS_TF_MASK) ? "TF" : "tf",
177 175 (rflags & KREG_EFLAGS_SF_MASK) ? "SF" : "sf",
178 176 (rflags & KREG_EFLAGS_ZF_MASK) ? "ZF" : "zf",
179 177 (rflags & KREG_EFLAGS_AF_MASK) ? "AF" : "af",
↓ open down ↓ |
141 lines elided |
↑ open up ↑ |
180 178 (rflags & KREG_EFLAGS_PF_MASK) ? "PF" : "pf",
181 179 (rflags & KREG_EFLAGS_CF_MASK) ? "CF" : "cf");
182 180
183 181 mdb_printf("\n");
184 182
185 183 mdb_printf("%%gsbase = 0x%0?p\n", grs[REG_GSBASE]);
186 184 mdb_printf("%%fsbase = 0x%0?p\n", grs[REG_FSBASE]);
187 185 mdb_printf("%%trapno = 0x%x\n", grs[REG_TRAPNO]);
188 186 mdb_printf(" %%err = 0x%x\n", grs[REG_ERR]);
189 187
190 - return (set_errno(ENOTSUP));
188 + return (DCMD_OK);
191 189 }
192 190
193 191 static const char *
194 192 fpcw2str(uint32_t cw, char *buf, size_t nbytes)
195 193 {
196 194 char *end = buf + nbytes;
197 195 char *p = buf;
198 196
199 197 buf[0] = '\0';
200 198
201 199 /*
202 200 * Decode all masks in the 80387 control word.
203 201 */
204 202 if (cw & FPIM)
205 203 p += mdb_snprintf(p, (size_t)(end - p), "|IM");
206 204 if (cw & FPDM)
207 205 p += mdb_snprintf(p, (size_t)(end - p), "|DM");
208 206 if (cw & FPZM)
209 207 p += mdb_snprintf(p, (size_t)(end - p), "|ZM");
210 208 if (cw & FPOM)
211 209 p += mdb_snprintf(p, (size_t)(end - p), "|OM");
212 210 if (cw & FPUM)
213 211 p += mdb_snprintf(p, (size_t)(end - p), "|UM");
214 212 if (cw & FPPM)
215 213 p += mdb_snprintf(p, (size_t)(end - p), "|PM");
216 214 if (cw & FPPC)
217 215 p += mdb_snprintf(p, (size_t)(end - p), "|PC");
218 216 if (cw & FPRC)
219 217 p += mdb_snprintf(p, (size_t)(end - p), "|RC");
220 218 if (cw & FPIC)
221 219 p += mdb_snprintf(p, (size_t)(end - p), "|IC");
222 220
223 221 /*
224 222 * Decode precision, rounding, and infinity options in control word.
225 223 */
226 224 if (cw & FPSIG24)
227 225 p += mdb_snprintf(p, (size_t)(end - p), "|SIG24");
228 226 if (cw & FPSIG53)
229 227 p += mdb_snprintf(p, (size_t)(end - p), "|SIG53");
230 228 if (cw & FPSIG64)
231 229 p += mdb_snprintf(p, (size_t)(end - p), "|SIG64");
232 230
233 231 if ((cw & FPRC) == (FPRD|FPRU))
234 232 p += mdb_snprintf(p, (size_t)(end - p), "|RTZ");
235 233 else if (cw & FPRD)
236 234 p += mdb_snprintf(p, (size_t)(end - p), "|RD");
237 235 else if (cw & FPRU)
238 236 p += mdb_snprintf(p, (size_t)(end - p), "|RU");
239 237 else
240 238 p += mdb_snprintf(p, (size_t)(end - p), "|RTN");
241 239
242 240 if (cw & FPA)
243 241 p += mdb_snprintf(p, (size_t)(end - p), "|A");
244 242 else
245 243 p += mdb_snprintf(p, (size_t)(end - p), "|P");
246 244 if (cw & WFPB17)
247 245 p += mdb_snprintf(p, (size_t)(end - p), "|WFPB17");
248 246 if (cw & WFPB24)
249 247 p += mdb_snprintf(p, (size_t)(end - p), "|WFPB24");
250 248
251 249 if (buf[0] == '|')
252 250 return (buf + 1);
253 251
254 252 return ("0");
255 253 }
256 254
257 255 static const char *
258 256 fpsw2str(uint32_t cw, char *buf, size_t nbytes)
259 257 {
260 258 char *end = buf + nbytes;
261 259 char *p = buf;
262 260
263 261 buf[0] = '\0';
264 262
265 263 /*
266 264 * Decode all masks in the 80387 status word.
267 265 */
268 266 if (cw & FPS_IE)
269 267 p += mdb_snprintf(p, (size_t)(end - p), "|IE");
270 268 if (cw & FPS_DE)
271 269 p += mdb_snprintf(p, (size_t)(end - p), "|DE");
272 270 if (cw & FPS_ZE)
273 271 p += mdb_snprintf(p, (size_t)(end - p), "|ZE");
274 272 if (cw & FPS_OE)
275 273 p += mdb_snprintf(p, (size_t)(end - p), "|OE");
276 274 if (cw & FPS_UE)
277 275 p += mdb_snprintf(p, (size_t)(end - p), "|UE");
278 276 if (cw & FPS_PE)
279 277 p += mdb_snprintf(p, (size_t)(end - p), "|PE");
280 278 if (cw & FPS_SF)
281 279 p += mdb_snprintf(p, (size_t)(end - p), "|SF");
282 280 if (cw & FPS_ES)
283 281 p += mdb_snprintf(p, (size_t)(end - p), "|ES");
284 282 if (cw & FPS_C0)
285 283 p += mdb_snprintf(p, (size_t)(end - p), "|C0");
286 284 if (cw & FPS_C1)
287 285 p += mdb_snprintf(p, (size_t)(end - p), "|C1");
288 286 if (cw & FPS_C2)
289 287 p += mdb_snprintf(p, (size_t)(end - p), "|C2");
290 288 if (cw & FPS_C3)
291 289 p += mdb_snprintf(p, (size_t)(end - p), "|C3");
292 290 if (cw & FPS_B)
293 291 p += mdb_snprintf(p, (size_t)(end - p), "|B");
294 292
295 293 if (buf[0] == '|')
296 294 return (buf + 1);
297 295
298 296 return ("0");
299 297 }
300 298
301 299 static const char *
302 300 fpmxcsr2str(uint32_t mxcsr, char *buf, size_t nbytes)
303 301 {
304 302 char *end = buf + nbytes;
305 303 char *p = buf;
306 304
307 305 buf[0] = '\0';
308 306
309 307 /*
310 308 * Decode the MXCSR word
311 309 */
312 310 if (mxcsr & SSE_IE)
313 311 p += mdb_snprintf(p, (size_t)(end - p), "|IE");
314 312 if (mxcsr & SSE_DE)
315 313 p += mdb_snprintf(p, (size_t)(end - p), "|DE");
316 314 if (mxcsr & SSE_ZE)
317 315 p += mdb_snprintf(p, (size_t)(end - p), "|ZE");
318 316 if (mxcsr & SSE_OE)
319 317 p += mdb_snprintf(p, (size_t)(end - p), "|OE");
320 318 if (mxcsr & SSE_UE)
321 319 p += mdb_snprintf(p, (size_t)(end - p), "|UE");
322 320 if (mxcsr & SSE_PE)
323 321 p += mdb_snprintf(p, (size_t)(end - p), "|PE");
324 322
325 323 if (mxcsr & SSE_DAZ)
326 324 p += mdb_snprintf(p, (size_t)(end - p), "|DAZ");
327 325
328 326 if (mxcsr & SSE_IM)
329 327 p += mdb_snprintf(p, (size_t)(end - p), "|IM");
330 328 if (mxcsr & SSE_DM)
331 329 p += mdb_snprintf(p, (size_t)(end - p), "|DM");
332 330 if (mxcsr & SSE_ZM)
333 331 p += mdb_snprintf(p, (size_t)(end - p), "|ZM");
334 332 if (mxcsr & SSE_OM)
335 333 p += mdb_snprintf(p, (size_t)(end - p), "|OM");
336 334 if (mxcsr & SSE_UM)
337 335 p += mdb_snprintf(p, (size_t)(end - p), "|UM");
338 336 if (mxcsr & SSE_PM)
339 337 p += mdb_snprintf(p, (size_t)(end - p), "|PM");
340 338
341 339 if ((mxcsr & SSE_RC) == (SSE_RD|SSE_RU))
342 340 p += mdb_snprintf(p, (size_t)(end - p), "|RTZ");
343 341 else if (mxcsr & SSE_RD)
344 342 p += mdb_snprintf(p, (size_t)(end - p), "|RD");
345 343 else if (mxcsr & SSE_RU)
346 344 p += mdb_snprintf(p, (size_t)(end - p), "|RU");
347 345 else
348 346 p += mdb_snprintf(p, (size_t)(end - p), "|RTN");
349 347
350 348 if (mxcsr & SSE_FZ)
351 349 p += mdb_snprintf(p, (size_t)(end - p), "|FZ");
352 350
353 351 if (buf[0] == '|')
354 352 return (buf + 1);
355 353 return ("0");
356 354 }
357 355
358 356 /*ARGSUSED*/
359 357 int
360 358 pt_fpregs(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv)
361 359 {
362 360 mdb_tgt_t *t = mdb.m_target;
363 361 mdb_tgt_tid_t tid;
364 362 prfpregset_t fprs;
365 363 struct fpchip_state fps;
366 364 char buf[256];
367 365 uint_t top;
368 366 int i;
369 367
370 368 /*
371 369 * Union for overlaying _fpreg structure on to quad-precision
372 370 * floating-point value (long double).
373 371 */
374 372 union {
375 373 struct _fpreg reg;
376 374 long double ld;
377 375 } fpru;
378 376
379 377 /*
380 378 * Array of strings corresponding to FPU tag word values (see
381 379 * section 7.3.6 of the Intel Programmer's Reference Manual).
382 380 */
383 381 const char *tag_strings[] = { "valid", "zero", "special", "empty" };
384 382
385 383 if (argc != 0)
386 384 return (DCMD_USAGE);
387 385
388 386 if (t->t_pshandle == NULL || Pstate(t->t_pshandle) == PS_UNDEAD) {
389 387 mdb_warn("no process active\n");
390 388 return (DCMD_ERR);
391 389 }
392 390
393 391 if (Pstate(t->t_pshandle) == PS_LOST) {
394 392 mdb_warn("debugger has lost control of process\n");
395 393 return (DCMD_ERR);
396 394 }
397 395
398 396 if (flags & DCMD_ADDRSPEC)
399 397 tid = (mdb_tgt_tid_t)addr;
400 398 else
401 399 tid = PTL_TID(t);
402 400
403 401 mdb_printf("AMD64 (80486 chip with SSE)\n");
404 402
405 403 if (PTL_GETFPREGS(t, tid, &fprs) != 0) {
406 404 mdb_warn("failed to get floating point registers");
407 405 return (DCMD_ERR);
408 406 }
409 407
410 408 bcopy(&fprs.fp_reg_set.fpchip_state, &fps, sizeof (fps));
411 409
412 410 fps.status &= 0xffff; /* saved status word is really 16 bits */
413 411
414 412 mdb_printf("cw 0x%04x (%s)\n", fps.cw,
415 413 fpcw2str(fps.cw, buf, sizeof (buf)));
416 414
417 415 top = (fps.sw & FPS_TOP) >> 11;
418 416 mdb_printf("sw 0x%04x (TOP=0t%u) (%s)\n", fps.sw,
419 417 top, fpsw2str(fps.sw, buf, sizeof (buf)));
420 418
421 419 mdb_printf("xcp sw 0x%04x (%s)\n\n", fps.status,
422 420 fpsw2str(fps.status, buf, sizeof (buf)));
423 421
424 422 mdb_printf("fop 0x%x\n", fps.fop);
425 423 mdb_printf("rip 0x%x\n", fps.rip);
426 424 mdb_printf("rdp 0x%x\n\n", fps.rdp);
427 425
428 426 for (i = 0; i < 8; i++) {
429 427 /*
430 428 * Recall that we need to use the current TOP-of-stack value to
431 429 * associate the _st[] index back to a physical register number,
432 430 * since tag word indices are physical register numbers. Then
433 431 * to get the tag value, we shift over two bits for each tag
434 432 * index, and then grab the bottom two bits.
435 433 */
436 434 uint_t tag_index = (i + top) & 7;
437 435 uint_t tag_fctw = (fps.fctw >> tag_index) & 1;
438 436 uint_t tag_value;
439 437 uint_t exp;
440 438
441 439 /*
442 440 * AMD64 stores the tag in a compressed form. It is
443 441 * necessary to extract the original 2-bit tag value.
444 442 * See AMD64 Architecture Programmer's Manual Volume 2:
445 443 * System Programming, Chapter 11.
446 444 */
447 445
448 446 fpru.ld = fps.st[i].__fpr_pad._q;
449 447 exp = fpru.reg.exponent & 0x7fff;
450 448
451 449 if (tag_fctw == 0) {
452 450 tag_value = 3; /* empty */
453 451 } else if (exp == 0) {
454 452 if (fpru.reg.significand[0] == 0 &&
455 453 fpru.reg.significand[1] == 0 &&
456 454 fpru.reg.significand[2] == 0 &&
457 455 fpru.reg.significand[3] == 0)
458 456 tag_value = 1; /* zero */
459 457 else
460 458 tag_value = 2; /* special: denormal */
461 459 } else if (exp == 0x7fff) {
462 460 tag_value = 2; /* special: infinity or NaN */
463 461 } else if (fpru.reg.significand[3] & 0x8000) {
464 462 tag_value = 0; /* valid */
465 463 } else {
466 464 tag_value = 2; /* special: unnormal */
467 465 }
468 466
469 467 mdb_printf("%%st%d 0x%04x.%04x%04x%04x%04x = %lg %s\n",
470 468 i, fpru.reg.exponent,
471 469 fpru.reg.significand[3], fpru.reg.significand[2],
472 470 fpru.reg.significand[1], fpru.reg.significand[0],
473 471 fpru.ld, tag_strings[tag_value]);
474 472 }
475 473
476 474 mdb_printf("\nmxcsr 0x%04x (%s)\n", fps.mxcsr,
477 475 fpmxcsr2str(fps.mxcsr, buf, sizeof (buf)));
478 476 mdb_printf("xcp 0x%04x (%s)\n\n", fps.xstatus,
479 477 fpmxcsr2str(fps.xstatus, buf, sizeof (buf)));
480 478
481 479 for (i = 0; i < 8; i++)
482 480 mdb_printf("%%xmm%d 0x%08x%08x%08x%08x\n", i,
483 481 fps.xmm[i]._l[3], fps.xmm[i]._l[2],
484 482 fps.xmm[i]._l[1], fps.xmm[i]._l[0]);
485 483
486 484 return (DCMD_OK);
487 485 }
488 486
489 487 /*ARGSUSED*/
490 488 int
491 489 pt_getfpreg(mdb_tgt_t *t, mdb_tgt_tid_t tid, ushort_t rd_num,
492 490 ushort_t rd_flags, mdb_tgt_reg_t *rp)
493 491 {
494 492 return (set_errno(ENOTSUP));
495 493 }
496 494
497 495 /*ARGSUSED*/
498 496 int
499 497 pt_putfpreg(mdb_tgt_t *t, mdb_tgt_tid_t tid, ushort_t rd_num,
500 498 ushort_t rd_flags, mdb_tgt_reg_t rval)
501 499 {
502 500 return (set_errno(ENOTSUP));
503 501 }
504 502
505 503 /*ARGSUSED*/
506 504 void
507 505 pt_addfpregs(mdb_tgt_t *t)
508 506 {
509 507 /* not implemented */
510 508 }
511 509
512 510 /*ARGSUSED*/
513 511 int
514 512 pt_frameregs(void *arglim, uintptr_t pc, uint_t argc, const long *argv,
515 513 const mdb_tgt_gregset_t *gregs, boolean_t pc_faked)
516 514 {
517 515 return (set_errno(ENOTSUP));
518 516 }
519 517
520 518 /*ARGSUSED*/
521 519 const char *
522 520 pt_disasm(const GElf_Ehdr *ehp)
523 521 {
524 522 return ("amd64");
525 523 }
526 524
527 525 /*
528 526 * Determine the return address for the current frame.
529 527 */
530 528 int
531 529 pt_step_out(mdb_tgt_t *t, uintptr_t *p)
532 530 {
533 531 const lwpstatus_t *psp = &Pstatus(t->t_pshandle)->pr_lwp;
534 532
535 533 if (Pstate(t->t_pshandle) != PS_STOP)
536 534 return (set_errno(EMDB_TGTBUSY));
537 535
538 536 return (mdb_amd64_step_out(t, p, psp->pr_reg[EIP], psp->pr_reg[EBP],
539 537 psp->pr_reg[UESP], psp->pr_instr));
540 538 }
541 539
542 540 /*
543 541 * Return the address of the next instruction following a call, or return -1
544 542 * and set errno to EAGAIN if the target should just single-step.
545 543 */
546 544 int
547 545 pt_next(mdb_tgt_t *t, uintptr_t *p)
548 546 {
549 547 const lwpstatus_t *psp = &Pstatus(t->t_pshandle)->pr_lwp;
550 548
551 549 if (Pstate(t->t_pshandle) != PS_STOP)
552 550 return (set_errno(EMDB_TGTBUSY));
553 551
554 552 return (mdb_amd64_next(t, p, psp->pr_reg[REG_RIP], pt_read_instr(t)));
555 553 }
↓ open down ↓ |
355 lines elided |
↑ open up ↑ |
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX